OpenOCD
target Directory Reference
Directory dependency graph for target:
target

Directories

directory  espressif
 
directory  openrisc
 
directory  riscv
 
directory  xtensa
 

Files

file  a64_disassembler.c [code]
 
file  a64_disassembler.h [code]
 
file  aarch64.c [code]
 
file  aarch64.h [code]
 
file  adi_v5_dapdirect.c [code]
 Utilities to support in-circuit debuggers that provide APIs to access directly ARM DAP, hiding the access to the underlining transport used for the physical connection (either JTAG or SWD).
 
file  adi_v5_jtag.c [code]
 This file implements JTAG transport support for cores implementing the ARM Debug Interface version 5 (ADIv5) and version 6 (ADIv6).
 
file  adi_v5_swd.c [code]
 Utilities to support ARM "Serial Wire Debug" (SWD), a low pin-count debug link protocol used in cases where JTAG is not wanted.
 
file  algorithm.c [code]
 
file  algorithm.h [code]
 
file  arc.c [code]
 
file  arc.h [code]
 
file  arc_cmd.c [code]
 
file  arc_cmd.h [code]
 
file  arc_jtag.c [code]
 
file  arc_jtag.h [code]
 
file  arc_mem.c [code]
 
file  arc_mem.h [code]
 
file  arm.h [code]
 Holds the interface to ARM cores.
 
file  arm11.c [code]
 
file  arm11.h [code]
 
file  arm11_dbgtap.c [code]
 
file  arm11_dbgtap.h [code]
 
file  arm720t.c [code]
 
file  arm720t.h [code]
 
file  arm7_9_common.c [code]
 Hold common code supporting the ARM7 and ARM9 core generations.
 
file  arm7_9_common.h [code]
 
file  arm7tdmi.c [code]
 
file  arm7tdmi.h [code]
 
file  arm920t.c [code]
 
file  arm920t.h [code]
 
file  arm926ejs.c [code]
 
file  arm926ejs.h [code]
 
file  arm946e.c [code]
 
file  arm946e.h [code]
 
file  arm966e.c [code]
 
file  arm966e.h [code]
 
file  arm9tdmi.c [code]
 
file  arm9tdmi.h [code]
 
file  arm_adi_v5.c [code]
 This file implements support for the ARM Debug Interface version 5 (ADIv5) debugging architecture.
 
file  arm_adi_v5.h [code]
 This defines formats and data structures used to talk to ADIv5 entities.
 
file  arm_coresight.h [code]
 
file  arm_cti.c [code]
 
file  arm_cti.h [code]
 
file  arm_dap.c [code]
 
file  arm_disassembler.c [code]
 
file  arm_disassembler.h [code]
 
file  arm_dpm.c [code]
 Implements various ARM DPM operations using architectural debug registers.
 
file  arm_dpm.h [code]
 This is the interface to the Debug Programmers Model for ARMv6 and ARMv7 processors.
 
file  arm_jtag.c [code]
 
file  arm_jtag.h [code]
 
file  arm_opcodes.h [code]
 Macros used to generate various ARM or Thumb opcodes.
 
file  arm_semihosting.c [code]
 Hold ARM semihosting support.
 
file  arm_semihosting.h [code]
 
file  arm_simulator.c [code]
 
file  arm_simulator.h [code]
 
file  arm_tpiu_swo.c [code]
 This file implements support for the ARM CoreSight components Trace Port Interface Unit (TPIU) and Serial Wire Output (SWO).
 
file  arm_tpiu_swo.h [code]
 
file  armv4_5.c [code]
 
file  armv4_5.h [code]
 
file  armv4_5_cache.c [code]
 
file  armv4_5_cache.h [code]
 
file  armv4_5_mmu.c [code]
 
file  armv4_5_mmu.h [code]
 
file  armv7a.c [code]
 
file  armv7a.h [code]
 
file  armv7a_cache.c [code]
 
file  armv7a_cache.h [code]
 
file  armv7a_cache_l2x.c [code]
 
file  armv7a_cache_l2x.h [code]
 
file  armv7a_mmu.c [code]
 
file  armv7a_mmu.h [code]
 
file  armv7m.c [code]
 
file  armv7m.h [code]
 
file  armv7m_trace.c [code]
 
file  armv7m_trace.h [code]
 Holds the interface to ITM and DWT configuration functions.
 
file  armv8.c [code]
 
file  armv8.h [code]
 
file  armv8_cache.c [code]
 
file  armv8_cache.h [code]
 
file  armv8_dpm.c [code]
 Implements various ARM DPM operations using architectural debug registers.
 
file  armv8_dpm.h [code]
 
file  armv8_opcodes.c [code]
 
file  armv8_opcodes.h [code]
 
file  avr32_ap7k.c [code]
 
file  avr32_ap7k.h [code]
 
file  avr32_jtag.c [code]
 
file  avr32_jtag.h [code]
 
file  avr32_mem.c [code]
 
file  avr32_mem.h [code]
 
file  avr32_regs.c [code]
 
file  avr32_regs.h [code]
 
file  avrt.c [code]
 
file  avrt.h [code]
 
file  breakpoints.c [code]
 
file  breakpoints.h [code]
 
file  cortex_a.c [code]
 
file  cortex_a.h [code]
 
file  cortex_m.c [code]
 
file  cortex_m.h [code]
 
file  dsp563xx.c [code]
 
file  dsp563xx.h [code]
 
file  dsp563xx_once.c [code]
 
file  dsp563xx_once.h [code]
 
file  dsp5680xx.c [code]
 
file  dsp5680xx.h [code]
 Basic support for the 5680xx DSP from Freescale. The chip has two taps in the JTAG chain, the Master tap and the Core tap. In this code the Master tap is only used to unlock the flash memory by executing a JTAG instruction.
 
file  embeddedice.c [code]
 This provides lowlevel glue to the EmbeddedICE (or EmbeddedICE-RT) module found on scan chain 2 in ARM7, ARM9, and some other families of ARM cores.
 
file  embeddedice.h [code]
 
file  esirisc.c [code]
 
file  esirisc.h [code]
 
file  esirisc_jtag.c [code]
 
file  esirisc_jtag.h [code]
 
file  esirisc_regs.h [code]
 
file  esirisc_trace.c [code]
 
file  esirisc_trace.h [code]
 
file  etb.c [code]
 
file  etb.h [code]
 
file  etm.c [code]
 
file  etm.h [code]
 
file  etm_dummy.c [code]
 
file  etm_dummy.h [code]
 
file  fa526.c [code]
 
file  feroceon.c [code]
 
file  hla_target.c [code]
 
file  image.c [code]
 
file  image.h [code]
 
file  lakemont.c [code]
 
file  lakemont.h [code]
 
file  ls1_sap.c [code]
 
file  mem_ap.c [code]
 
file  mips32.c [code]
 
file  mips32.h [code]
 
file  mips32_dmaacc.c [code]
 
file  mips32_dmaacc.h [code]
 
file  mips32_pracc.c [code]
 
file  mips32_pracc.h [code]
 
file  mips64.c [code]
 
file  mips64.h [code]
 
file  mips64_pracc.c [code]
 
file  mips64_pracc.h [code]
 
file  mips_ejtag.c [code]
 
file  mips_ejtag.h [code]
 
file  mips_m4k.c [code]
 
file  mips_m4k.h [code]
 
file  mips_mips64.c [code]
 
file  mips_mips64.h [code]
 
file  nds32.c [code]
 
file  nds32.h [code]
 Holds the interface to Andes cores.
 
file  nds32_aice.c [code]
 
file  nds32_aice.h [code]
 
file  nds32_cmd.c [code]
 
file  nds32_cmd.h [code]
 
file  nds32_disassembler.c [code]
 
file  nds32_disassembler.h [code]
 
file  nds32_edm.h [code]
 This is the interface to the Embedded Debug Module for Andes cores.
 
file  nds32_insn.h [code]
 
file  nds32_reg.c [code]
 
file  nds32_reg.h [code]
 
file  nds32_tlb.c [code]
 
file  nds32_tlb.h [code]
 
file  nds32_v2.c [code]
 
file  nds32_v2.h [code]
 
file  nds32_v3.c [code]
 
file  nds32_v3.h [code]
 
file  nds32_v3_common.c [code]
 
file  nds32_v3_common.h [code]
 
file  nds32_v3m.c [code]
 
file  nds32_v3m.h [code]
 
file  quark_d20xx.c [code]
 
file  quark_x10xx.c [code]
 
file  register.c [code]
 Holds utilities to work with register caches.
 
file  register.h [code]
 
file  target/rtt.c [code]
 
file  target/rtt.h [code]
 
file  semihosting_common.c [code]
 Common ARM semihosting support.
 
file  semihosting_common.h [code]
 
file  smp.c [code]
 
file  smp.h [code]
 
file  stm8.c [code]
 
file  stm8.h [code]
 
file  target.c [code]
 
file  target.h [code]
 
file  target_request.c [code]
 
file  target_request.h [code]
 
file  target_type.h [code]
 
file  testee.c [code]
 
file  trace.c [code]
 
file  trace.h [code]
 
file  x86_32_common.c [code]
 
file  x86_32_common.h [code]
 
file  xscale.c [code]
 
file  xscale.h [code]