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arm7_9_common.h File Reference
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Data Structures

struct  arm7_9_common
 Structure for items that are common between both ARM7 and ARM9 targets. More...
 

Macros

#define ARM7_9_COMMON_MAGIC   0x0a790a79U
 

Functions

int arm7_9_add_breakpoint (struct target *target, struct breakpoint *breakpoint)
 Add a breakpoint to an ARM7/9 target. More...
 
int arm7_9_add_watchpoint (struct target *target, struct watchpoint *watchpoint)
 Add a watchpoint to an ARM7/9 target. More...
 
int arm7_9_assert_reset (struct target *target)
 Asserts the reset (SRST) on an ARM7/9 target. More...
 
int arm7_9_bulk_write_memory (struct target *target, target_addr_t address, uint32_t count, const uint8_t *buffer)
 
int arm7_9_check_reset (struct target *target)
 
int arm7_9_deassert_reset (struct target *target)
 Deassert the reset (SRST) signal on an ARM7/9 target. More...
 
void arm7_9_deinit (struct target *target)
 
void arm7_9_disable_eice_step (struct target *target)
 
int arm7_9_early_halt (struct target *target)
 
void arm7_9_enable_eice_step (struct target *target, uint32_t next_pc)
 
int arm7_9_endianness_callback (jtag_callback_data_t pu8_in, jtag_callback_data_t i_size, jtag_callback_data_t i_be, jtag_callback_data_t i_flip)
 
int arm7_9_examine (struct target *target)
 Perform per-target setup that requires JTAG access. More...
 
int arm7_9_execute_sys_speed (struct target *target)
 Restarts the target by sending a RESTART instruction and moving the JTAG state to IDLE. More...
 
int arm7_9_halt (struct target *target)
 Halt an ARM7/9 target. More...
 
int arm7_9_init_arch_info (struct target *target, struct arm7_9_common *arm7_9)
 
int arm7_9_poll (struct target *target)
 Polls an ARM7/9 target for its current status. More...
 
int arm7_9_read_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 
int arm7_9_remove_breakpoint (struct target *target, struct breakpoint *breakpoint)
 Removes a breakpoint from an ARM7/9 target. More...
 
int arm7_9_remove_watchpoint (struct target *target, struct watchpoint *watchpoint)
 Remove a watchpoint from an ARM7/9 target. More...
 
int arm7_9_reset_request_halt (struct target *target)
 
int arm7_9_resume (struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution)
 
int arm7_9_run_algorithm (struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_prams, struct reg_param *reg_param, uint32_t entry_point, void *arch_info)
 
int arm7_9_soft_reset_halt (struct target *target)
 Issue a software reset and halt to an ARM7/9 target. More...
 
int arm7_9_step (struct target *target, int current, target_addr_t address, int handle_breakpoints)
 
int arm7_9_target_request_data (struct target *target, uint32_t size, uint8_t *buffer)
 Get some data from the ARM7/9 target. More...
 
int arm7_9_write_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
 
int arm7_9_write_memory_no_opt (struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
 
int arm7_9_write_memory_opt (struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
 
static bool is_arm7_9 (struct arm7_9_common *arm7_9)
 
static struct arm7_9_commontarget_to_arm7_9 (struct target *target)
 

Variables

const struct command_registration arm7_9_command_handlers []
 

Macro Definition Documentation

◆ ARM7_9_COMMON_MAGIC

#define ARM7_9_COMMON_MAGIC   0x0a790a79U

Definition at line 23 of file arm7_9_common.h.

Function Documentation

◆ arm7_9_add_breakpoint()

int arm7_9_add_breakpoint ( struct target target,
struct breakpoint breakpoint 
)

Add a breakpoint to an ARM7/9 target.

This makes sure that there are no dangling breakpoints and that the desired breakpoint can be added.

Parameters
targetPointer to the target ARM7/9 device to add a breakpoint to
breakpointPointer to the breakpoint to be added
Returns
An error status if there is a problem adding the breakpoint or the result of setting the breakpoint

Definition at line 376 of file arm7_9_common.c.

References arm7_9_assign_wp(), arm7_9_clear_watchpoints(), arm7_9_set_breakpoint(), BKPT_HARD, arm7_9_common::breakpoint_count, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, breakpoint::length, LOG_INFO, target_to_arm7_9(), breakpoint::type, and arm7_9_common::wp_available.

◆ arm7_9_add_watchpoint()

int arm7_9_add_watchpoint ( struct target target,
struct watchpoint watchpoint 
)

Add a watchpoint to an ARM7/9 target.

If there are no watchpoint units available, an error response is returned.

Parameters
targetPointer to the ARM7/9 target to add a watchpoint to
watchpointPointer to the watchpoint to be added
Returns
Error status while trying to add the watchpoint

Definition at line 562 of file arm7_9_common.c.

References ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, watchpoint::length, target_to_arm7_9(), and arm7_9_common::wp_available.

◆ arm7_9_assert_reset()

int arm7_9_assert_reset ( struct target target)

Asserts the reset (SRST) on an ARM7/9 target.

Some -S targets (ARM966E-S in the STR912 isn't affected, ARM926EJ-S in the LPC3180 and AT91SAM9260 is affected) completely stop the JTAG clock while the core is held in reset (SRST). It isn't possible to program the halt condition once reset is asserted, hence a hook that allows the target to set up its reset-halt condition is setup prior to asserting reset.

Parameters
targetPointer to an ARM7/9 target to assert reset on
Returns
ERROR_FAIL if the JTAG device does not have SRST, otherwise ERROR_OK

Definition at line 861 of file arm7_9_common.c.

References arm7_9_common::arm, arm::core_cache, DBG_REASON_DBGRQ, target::debug_reason, arm7_9_common::eice_cache, EICE_VEC_CATCH, EICE_W0_ADDR_MASK, EICE_W0_ADDR_VALUE, EICE_W0_CONTROL_MASK, EICE_W0_CONTROL_VALUE, EICE_W0_DATA_MASK, EICE_W_CTRL_ENABLE, EICE_W_CTRL_NOPC, embeddedice_write_reg(), ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_EXAMINED, arm7_9_common::has_vector_catch, jtag_add_reset(), jtag_add_runtest(), jtag_add_sleep(), jtag_get_reset_config(), jtag_reset_config, LOG_DEBUG, LOG_ERROR, LOG_WARNING, reg_cache::reg_list, register_cache_invalidate(), target::reset_halt, RESET_HAS_SRST, RESET_SRST_NO_GATING, RESET_SRST_PULLS_TRST, srst_asserted, target::state, TAP_IDLE, TARGET_EVENT_RESET_ASSERT, target_handle_event(), target_has_event_action(), target_name(), TARGET_RESET, target_state_name(), target_to_arm7_9(), and target_was_examined().

Referenced by feroceon_assert_reset().

◆ arm7_9_bulk_write_memory()

◆ arm7_9_check_reset()

◆ arm7_9_deassert_reset()

int arm7_9_deassert_reset ( struct target target)

Deassert the reset (SRST) signal on an ARM7/9 target.

If SRST pulls TRST and the target is being reset into a halt, a warning will be triggered because it is not possible to reset into a halted mode in this case. The target is halted using the target's functions.

Parameters
targetPointer to the target to have the reset deasserted
Returns
ERROR_OK or an error from polling or halting the target

Definition at line 966 of file arm7_9_common.c.

References ERROR_OK, jtag_add_reset(), jtag_get_reset_config(), jtag_reset_config, LOG_DEBUG, LOG_WARNING, target::reset_halt, RESET_SRST_PULLS_TRST, target_examine_one(), target_halt(), target_poll(), and target_state_name().

◆ arm7_9_deinit()

◆ arm7_9_disable_eice_step()

◆ arm7_9_early_halt()

int arm7_9_early_halt ( struct target target)

◆ arm7_9_enable_eice_step()

◆ arm7_9_endianness_callback()

◆ arm7_9_examine()

◆ arm7_9_execute_sys_speed()

int arm7_9_execute_sys_speed ( struct target target)

Restarts the target by sending a RESTART instruction and moving the JTAG state to IDLE.

This includes a timeout waiting for DBGACK and SYSCOMP to be asserted by the processor.

Parameters
targetPointer to target to issue commands to
Returns
Error status if there is a timeout or a problem while executing the JTAG queue

Definition at line 610 of file arm7_9_common.c.

References alive_sleep(), arm_jtag_set_instr(), buf_get_u32(), debug_level, arm7_9_common::eice_cache, EICE_DBG_STAT, EICE_DBG_STATUS_DBGACK, EICE_DBG_STATUS_SYSCOMP, embeddedice_read_reg(), ERROR_OK, ERROR_TARGET_TIMEOUT, jtag_execute_queue(), arm7_9_common::jtag_info, keep_alive(), LOG_ERROR, arm7_9_common::need_bypass_before_restart, NULL, reg_cache::reg_list, reg::size, arm_jtag::tap, TAP_IDLE, target_to_arm7_9(), timeval_ms(), and reg::value.

Referenced by arm7_9_read_memory(), arm7_9_resume(), arm7_9_step(), arm7_9_write_memory(), arm920t_execute_cp15(), feroceon_read_cp15(), and feroceon_write_cp15().

◆ arm7_9_halt()

int arm7_9_halt ( struct target target)

Halt an ARM7/9 target.

This is accomplished by either asserting the DBGRQ line or by programming a watchpoint to trigger on any address. It is considered a bug to call this function while the target is in the TARGET_RESET state.

Parameters
targetPointer to the ARM7/9 target to be halted
Returns
Always ERROR_OK

Definition at line 1166 of file arm7_9_common.c.

References buf_set_u32(), DBG_REASON_DBGRQ, target::debug_reason, arm7_9_common::eice_cache, EICE_DBG_CONTROL_DBGRQ, EICE_DBG_CTRL, EICE_W0_ADDR_MASK, EICE_W0_CONTROL_MASK, EICE_W0_CONTROL_VALUE, EICE_W0_DATA_MASK, EICE_W_CTRL_ENABLE, EICE_W_CTRL_NOPC, embeddedice_store_reg(), embeddedice_write_reg(), ERROR_OK, LOG_DEBUG, LOG_ERROR, LOG_WARNING, reg_cache::reg_list, arm7_9_common::set_special_dbgrq, target::state, TARGET_HALTED, TARGET_RESET, target_state_name(), target_to_arm7_9(), TARGET_UNKNOWN, arm7_9_common::use_dbgrq, and reg::value.

Referenced by feroceon_assert_reset().

◆ arm7_9_init_arch_info()

int arm7_9_init_arch_info ( struct target target,
struct arm7_9_common arm7_9 
)

◆ arm7_9_poll()

int arm7_9_poll ( struct target target)

Polls an ARM7/9 target for its current status.

If DBGACK is set, the target is manipulated to the right halted state based on its current state. This is what happens:

StateAction
TARGET_RUNNING | TARGET_RESET Enters debug mode. If TARGET_RESET, pc may be checked
TARGET_UNKNOWNWarning is logged
TARGET_DEBUG_RUNNINGEnters debug mode
TARGET_HALTEDNothing

If the target does not end up in the halted state, a warning is produced. If DBGACK is cleared, then the target is expected to either be running or running in debug.

Parameters
targetPointer to the ARM7/9 target to poll
Returns
ERROR_OK or an error status if a command fails

Definition at line 795 of file arm7_9_common.c.

References arm7_9_debug_entry(), arm_semihosting(), buf_get_u32(), arm7_9_common::eice_cache, EICE_DBG_STAT, EICE_DBG_STATUS_DBGACK, embeddedice_read_reg(), ERROR_OK, jtag_execute_queue(), LOG_DEBUG, LOG_WARNING, reg_cache::reg_list, target::state, target_call_event_callbacks(), TARGET_DEBUG_RUNNING, TARGET_EVENT_DEBUG_HALTED, TARGET_EVENT_HALTED, TARGET_HALTED, TARGET_RESET, TARGET_RUNNING, target_to_arm7_9(), TARGET_UNKNOWN, and reg::value.

◆ arm7_9_read_memory()

◆ arm7_9_remove_breakpoint()

int arm7_9_remove_breakpoint ( struct target target,
struct breakpoint breakpoint 
)

Removes a breakpoint from an ARM7/9 target.

This will make sure there are no dangling breakpoints and updates available watchpoints if it is a hardware breakpoint.

Parameters
targetPointer to the target to have a breakpoint removed
breakpointPointer to the breakpoint to be removed
Returns
Error status if there was a problem unsetting the breakpoint or the watchpoints could not be cleared

Definition at line 415 of file arm7_9_common.c.

References arm7_9_clear_watchpoints(), arm7_9_unset_breakpoint(), BKPT_HARD, arm7_9_common::breakpoint_count, ERROR_OK, target_to_arm7_9(), breakpoint::type, and arm7_9_common::wp_available.

◆ arm7_9_remove_watchpoint()

int arm7_9_remove_watchpoint ( struct target target,
struct watchpoint watchpoint 
)

Remove a watchpoint from an ARM7/9 target.

The watchpoint will be unset and the used watchpoint unit will be reopened.

Parameters
targetPointer to the target to remove a watchpoint from
watchpointPointer to the watchpoint to be removed
Returns
Result of trying to unset the watchpoint

Definition at line 585 of file arm7_9_common.c.

References arm7_9_unset_watchpoint(), ERROR_OK, watchpoint::is_set, target_to_arm7_9(), and arm7_9_common::wp_available.

◆ arm7_9_reset_request_halt()

int arm7_9_reset_request_halt ( struct target target)

◆ arm7_9_resume()

◆ arm7_9_run_algorithm()

int arm7_9_run_algorithm ( struct target target,
int  num_mem_params,
struct mem_param mem_params,
int  num_reg_prams,
struct reg_param reg_param,
uint32_t  entry_point,
void *  arch_info 
)

◆ arm7_9_soft_reset_halt()

int arm7_9_soft_reset_halt ( struct target target)

Issue a software reset and halt to an ARM7/9 target.

The target is halted and then there is a wait until the processor shows the halt. This wait can timeout and results in an error being returned. The software reset involves clearing the halt, updating the debug control register, changing to ARM mode, reset of the program counter, and reset of all of the registers.

Parameters
targetPointer to the ARM7/9 target to be reset and halted by software
Returns
Error status if any of the commands fail, otherwise ERROR_OK

Definition at line 1061 of file arm7_9_common.c.

References alive_sleep(), arm7_9_common::arm, arm7_9_clear_halt(), arm_reg_current(), arm_set_cpsr(), ARM_STATE_THUMB, buf_get_u32(), buf_set_u32(), arm7_9_common::change_to_arm, arm::core_cache, arm::core_state, arm::cpsr, debug_level, reg::dirty, arm7_9_common::eice_cache, EICE_DBG_CONTROL_DBGACK, EICE_DBG_CONTROL_DBGRQ, EICE_DBG_CONTROL_INTDIS, EICE_DBG_CTRL, EICE_DBG_STAT, EICE_DBG_STATUS_DBGACK, EICE_DBG_STATUS_ITBIT, embeddedice_read_reg(), embeddedice_store_reg(), ERROR_OK, ERROR_TARGET_TIMEOUT, jtag_execute_queue(), keep_alive(), LOG_DEBUG, LOG_ERROR, arm::pc, reg_cache::reg_list, register_cache_invalidate(), target::state, target_call_event_callbacks(), TARGET_EVENT_HALTED, target_halt(), TARGET_HALTED, target_to_arm7_9(), timeval_ms(), reg::valid, and reg::value.

◆ arm7_9_step()

◆ arm7_9_target_request_data()

int arm7_9_target_request_data ( struct target target,
uint32_t  size,
uint8_t *  buffer 
)

Get some data from the ARM7/9 target.

Parameters
targetPointer to the ARM7/9 target to read data from
sizeThe number of 32bit words to be read
bufferPointer to the buffer that will hold the data
Returns
The result of receiving data from the Embedded ICE unit

Definition at line 708 of file arm7_9_common.c.

References buffer, embeddedice_receive(), ERROR_OK, h_u32_to_le(), arm7_9_common::jtag_info, size, and target_to_arm7_9().

◆ arm7_9_write_memory()

◆ arm7_9_write_memory_no_opt()

int arm7_9_write_memory_no_opt ( struct target target,
uint32_t  address,
uint32_t  size,
uint32_t  count,
const uint8_t *  buffer 
)

◆ arm7_9_write_memory_opt()

int arm7_9_write_memory_opt ( struct target target,
target_addr_t  address,
uint32_t  size,
uint32_t  count,
const uint8_t *  buffer 
)

◆ is_arm7_9()

static bool is_arm7_9 ( struct arm7_9_common arm7_9)
inlinestatic

◆ target_to_arm7_9()

static struct arm7_9_common* target_to_arm7_9 ( struct target target)
inlinestatic

Definition at line 125 of file arm7_9_common.h.

References target::arch_info, and container_of.

Referenced by arm7_9_add_breakpoint(), arm7_9_add_watchpoint(), arm7_9_assert_reset(), arm7_9_bulk_write_memory(), arm7_9_check_reset(), arm7_9_clear_halt(), arm7_9_dcc_completion(), arm7_9_debug_entry(), arm7_9_deinit(), arm7_9_disable_eice_step(), arm7_9_enable_eice_step(), arm7_9_examine(), arm7_9_execute_fast_sys_speed(), arm7_9_execute_sys_speed(), arm7_9_full_context(), arm7_9_halt(), arm7_9_handle_target_request(), arm7_9_poll(), arm7_9_read_core_reg(), arm7_9_read_memory(), arm7_9_remove_breakpoint(), arm7_9_remove_watchpoint(), arm7_9_restart_core(), arm7_9_restore_context(), arm7_9_resume(), arm7_9_set_breakpoint(), arm7_9_set_watchpoint(), arm7_9_setup(), arm7_9_setup_semihosting(), arm7_9_soft_reset_halt(), arm7_9_step(), arm7_9_target_request_data(), arm7_9_unset_breakpoint(), arm7_9_unset_watchpoint(), arm7_9_write_core_reg(), arm7_9_write_memory(), arm7_9_write_memory_no_opt(), arm7_9_write_memory_opt(), arm7tdmi_branch_resume(), arm7tdmi_branch_resume_thumb(), arm7tdmi_change_to_arm(), arm7tdmi_examine_debug_reason(), arm7tdmi_load_byte_reg(), arm7tdmi_load_hword_reg(), arm7tdmi_load_word_regs(), arm7tdmi_read_core_regs(), arm7tdmi_read_core_regs_target_buffer(), arm7tdmi_read_xpsr(), arm7tdmi_store_byte_reg(), arm7tdmi_store_hword_reg(), arm7tdmi_store_word_regs(), arm7tdmi_write_core_regs(), arm7tdmi_write_pc(), arm7tdmi_write_xpsr(), arm7tdmi_write_xpsr_im8(), arm920t_soft_reset_halt(), arm926ejs_cp15_read(), arm926ejs_cp15_write(), arm926ejs_examine_debug_reason(), arm926ejs_soft_reset_halt(), arm946e_read_cp15(), arm946e_write_cp15(), arm966e_read_cp15(), arm966e_write_cp15(), arm9tdmi_branch_resume(), arm9tdmi_branch_resume_thumb(), arm9tdmi_change_to_arm(), arm9tdmi_deinit_target(), arm9tdmi_disable_single_step(), arm9tdmi_enable_single_step(), arm9tdmi_examine_debug_reason(), arm9tdmi_load_byte_reg(), arm9tdmi_load_hword_reg(), arm9tdmi_load_word_regs(), arm9tdmi_read_core_regs(), arm9tdmi_read_core_regs_target_buffer(), arm9tdmi_read_xpsr(), arm9tdmi_store_byte_reg(), arm9tdmi_store_hword_reg(), arm9tdmi_store_word_regs(), arm9tdmi_write_core_regs(), arm9tdmi_write_pc(), arm9tdmi_write_xpsr(), arm9tdmi_write_xpsr_im8(), arm_semihosting(), COMMAND_HANDLER(), embeddedice_setup(), fa526_read_core_regs(), fa526_read_core_regs_target_buffer(), fa526_read_xpsr(), fa526_write_core_regs(), fa526_write_pc(), fa526_write_xpsr(), fa526_write_xpsr_im8(), FLASH_BANK_COMMAND_HANDLER(), and post_result().

Variable Documentation

◆ arm7_9_command_handlers

const struct command_registration arm7_9_command_handlers[]
extern

Definition at line 2847 of file arm7_9_common.c.