Detailed Description
Field Documentation
◆ arch_info
| void* target::arch_info |
Definition at line 169 of file target.h.
Referenced by arc_init_arch_info(), arm_init_arch_info(), arm_nandread(), arm_nandwrite(), armv7a_init_arch_info(), armv8_init_arch_info(), avr32_ap7k_target_create(), avr_target_create(), avrf_erase(), avrf_info(), avrf_mass_erase(), avrf_probe(), avrf_write(), COMMAND_HANDLER(), deinit_target(), dragonite_target_create(), dsp563xx_target_create(), dsp5680xx_target_create(), esirisc_target_create(), feroceon_assert_reset(), feroceon_branch_resume(), feroceon_branch_resume_thumb(), feroceon_bulk_write_memory(), feroceon_change_to_arm(), feroceon_common_setup(), feroceon_disable_single_step(), feroceon_enable_single_step(), feroceon_read_core_regs(), feroceon_read_core_regs_target_buffer(), feroceon_read_cp15(), feroceon_read_xpsr(), feroceon_set_dbgrq(), feroceon_target_create(), feroceon_write_core_regs(), feroceon_write_cp15(), feroceon_write_xpsr(), feroceon_write_xpsr_im8(), get_info(), get_target_type(), ls1_sap_target_create(), mem_ap_deinit_target(), mem_ap_examine(), mem_ap_read_memory(), mem_ap_target_create(), mips32_init_arch_info(), mips64_arch_state(), mips64_build_reg_cache(), mips64_configure_break_unit(), mips64_configure_d_break_unit(), mips64_configure_i_break_unit(), mips64_examine(), mips64_get_core_reg(), mips64_get_gdb_reg_list(), mips64_invalidate_core_regs(), mips64_read_core_reg(), mips64_restore_context(), mips64_save_context(), mips64_write_core_reg(), mips_mips64_add_breakpoint(), mips_mips64_add_watchpoint(), mips_mips64_assert_reset(), mips_mips64_bulk_write_memory(), mips_mips64_debug_entry(), mips_mips64_examine(), mips_mips64_halt(), mips_mips64_poll(), mips_mips64_read_memory(), mips_mips64_remove_breakpoint(), mips_mips64_remove_watchpoint(), mips_mips64_resume(), mips_mips64_set_hwbp(), mips_mips64_set_watchpoint(), mips_mips64_single_step_core(), mips_mips64_step(), mips_mips64_target_create(), mips_mips64_unset_hwbp(), mips_mips64_unset_watchpoint(), mips_mips64_write_memory(), nds32_init_arch_info(), or1k_target_create(), pic32mx_info(), pic32mx_probe(), riscv_create_target(), riscv_deinit_target(), riscv_info(), stm8_init_arch_info(), target_create(), target_run_algorithm(), target_run_flash_async_algorithm(), target_run_read_async_algorithm(), target_start_algorithm(), target_to_aarch64(), target_to_ap7k(), target_to_arc(), target_to_arm(), target_to_arm720(), target_to_arm7_9(), target_to_arm920(), target_to_arm926(), target_to_arm946(), target_to_arm966(), target_to_armv7a(), target_to_armv7m(), target_to_armv7m_safe(), target_to_armv8(), target_to_cm(), target_to_cortex_a(), target_to_dsp563xx(), target_to_esirisc(), target_to_esp32(), target_to_esp_xtensa(), target_to_esp_xtensa_smp(), target_to_m4k(), target_to_mips32(), target_to_nds32(), target_to_or1k(), target_to_stm8(), target_to_x86_32(), target_to_xscale(), target_to_xtensa(), target_to_xtensa_chip(), target_wait_algorithm(), x86_32_common_init_arch_info(), xscale_get_reg(), xscale_set_reg(), and xtensa_init_arch_info().
◆ backoff
| struct backoff_timer target::backoff |
Definition at line 189 of file target.h.
Referenced by handle_target().
◆ backup_working_area
| uint32_t target::backup_working_area |
Definition at line 157 of file target.h.
Referenced by target_alloc_working_area_try(), target_configure(), target_create(), and target_restore_working_area().
◆ breakpoints
| struct breakpoint* target::breakpoints |
Definition at line 164 of file target.h.
Referenced by arc_reset_actionpoints(), arm11_resume(), arm7_9_enable_breakpoints(), breakpoint_add_internal(), breakpoint_clear_target_internal(), breakpoint_find(), breakpoint_free(), breakpoint_remove_all_internal(), breakpoint_remove_internal(), context_breakpoint_add_internal(), cortex_m_enable_breakpoints(), esirisc_add_breakpoints(), handle_bp_command_list(), hybrid_breakpoint_add_internal(), is_any_soft_breakpoint(), lakemont_resume(), mips_m4k_enable_breakpoints(), mips_mips64_enable_breakpoints(), nds32_v2_activate_hardware_breakpoint(), nds32_v2_deactivate_hardware_breakpoint(), nds32_v3_activate_hardware_breakpoint(), nds32_v3_deactivate_hardware_breakpoint(), nds32_v3m_activate_hardware_breakpoint(), nds32_v3m_deactivate_hardware_breakpoint(), stm8_enable_breakpoints(), target_create(), x86_32_common_reset_breakpoints_watchpoints(), x86_32_common_write_phys_mem(), xscale_deassert_reset(), and xscale_enable_breakpoints().
◆ cmd_name
| char* target::cmd_name |
Definition at line 122 of file target.h.
Referenced by armv7a_read_midr(), cortex_a_examine_first(), jim_nds32_multi_write(), jim_nds32_read_edm_sr(), nds32_profiling(), target_create(), target_destroy(), target_gdb_fileio_end(), target_get_gdb_fileio_info(), target_hit_watchpoint(), and target_name().
◆ coreid
| int32_t target::coreid |
Definition at line 125 of file target.h.
Referenced by aarch64_examine_first(), add_trigger(), armv8_flush_all_data(), assert_reset(), breakpoint_add_internal(), COMMAND_HANDLER(), cortex_a_examine_first(), deassert_reset(), esp_xtensa_smp_soft_reset_halt(), esp_xtensa_smp_update_halt_gdb(), examine(), gdb_write_smp_packet(), get_cortex_a(), get_current(), get_dm(), get_halted_esp_xtensa_smp(), get_mips_m4k(), handle_reset_halt(), hwthread_get_thread_reg(), ipc_poll_lock_stat(), linux_gdb_h_packet(), linux_os_create(), linux_os_smp_init(), linux_thread_packet(), mips_m4k_halt_smp(), mips_m4k_restore_smp(), nds32_gdb_attach(), remove_trigger(), resume_prep(), riscv013_get_register(), riscv013_set_register(), riscv_add_breakpoint(), riscv_assert_reset(), riscv_deassert_reset(), riscv_halt(), riscv_info_init(), riscv_invalidate_register_cache(), riscv_remove_watchpoint(), riscv_select_current_hart(), select_prepped_harts(), target_configure(), target_create(), update_halt_gdb(), watchpoint_add_internal(), and xtensa_examine().
◆ dap_configured
| bool target::dap_configured |
Definition at line 184 of file target.h.
Referenced by adiv5_jim_configure(), and target_create().
◆ dbg_msg_enabled
| uint32_t target::dbg_msg_enabled |
Definition at line 168 of file target.h.
Referenced by aarch64_handle_target_request(), add_debug_msg_receiver(), arm7_9_handle_target_request(), cortex_a_handle_target_request(), cortex_m_fast_read_all_regs(), cortex_m_handle_target_request(), cortex_m_load_core_reg_u32(), cortex_m_store_core_reg_u32(), delete_debug_msg_receiver(), hl_handle_target_request(), and target_create().
◆ dbgbase
| uint32_t target::dbgbase |
Definition at line 180 of file target.h.
Referenced by aarch64_examine_first(), cortex_a_examine_first(), target_configure(), and xtensa_chip_target_create().
◆ dbgbase_set
| bool target::dbgbase_set |
Definition at line 179 of file target.h.
Referenced by aarch64_examine_first(), cortex_a_examine_first(), and target_configure().
◆ dbgmsg
| struct debug_msg_receiver* target::dbgmsg |
Definition at line 167 of file target.h.
Referenced by add_debug_msg_receiver(), delete_debug_msg_receiver(), find_debug_msg_receiver(), target_asciimsg(), target_create(), and target_hexmsg().
◆ debug_reason
| enum target_debug_reason target::debug_reason |
Definition at line 158 of file target.h.
Referenced by aarch64_debug_entry(), aarch64_do_restart_one(), aarch64_examine_first(), aarch64_hit_watchpoint(), aarch64_poll(), aarch64_prepare_halt_smp(), aarch64_resume(), aarch64_step_restart_smp(), adapter_examine_debug_reason(), adapter_halt(), adapter_resume(), adapter_step(), arc_examine_debug_reason(), arc_halt(), arc_init_target(), arc_resume(), arc_step(), arm11_arch_state(), arm11_check_init(), arm11_debug_entry(), arm11_poll(), arm11_resume(), arm11_step(), arm7_9_assert_reset(), arm7_9_debug_entry(), arm7_9_halt(), arm7_9_resume(), arm7_9_step(), arm7tdmi_examine_debug_reason(), arm926ejs_examine_debug_reason(), arm9tdmi_examine_debug_reason(), arm_dpm_report_dscr(), arm_semihosting(), arm_semihosting_resume(), armv8_dpm_report_dscr(), avr32_ap7k_halt(), avr32_ap7k_resume(), cortex_a_debug_entry(), cortex_a_halt(), cortex_a_internal_restart(), cortex_a_internal_restore(), cortex_a_step(), cortex_m_examine_debug_reason(), cortex_m_halt(), cortex_m_hit_watchpoint(), cortex_m_poll(), cortex_m_resume(), cortex_m_step(), debug_reason_name(), do_resume(), dsp563xx_halt(), dsp563xx_step(), esirisc_debug_entry(), esirisc_examine(), esirisc_halt(), esirisc_resume_or_step(), esp32_target_create(), esp_xtensa_smp_resume(), feroceon_examine_debug_reason(), gdb_last_signal(), gdb_signal_reply(), halt_go(), halt_prep(), handle_halt(), hl_assert_reset(), hwthread_update_threads(), lakemont_halt(), lakemont_init_target(), lakemont_poll(), lakemont_step(), mem_ap_assert_reset(), mem_ap_deassert_reset(), mem_ap_examine(), mem_ap_halt(), mem_ap_init_target(), mem_ap_poll(), mem_ap_resume(), mem_ap_step(), mips_m4k_examine_debug_reason(), mips_m4k_halt(), mips_m4k_internal_restore(), mips_m4k_step(), mips_mips64_examine_debug_reason(), mips_mips64_halt(), mips_mips64_resume(), mips_mips64_step(), nds32_examine_debug_reason(), nds32_poll(), nds32_resume(), nds32_v2_examine(), nds32_v3_examine(), nds32_v3m_examine(), or1k_examine(), or1k_halt(), or1k_resume_or_step(), resume_finish(), resume_prep(), riscv013_halt_go(), riscv_init_target(), riscv_openocd_poll(), riscv_openocd_step(), set_debug_reason(), stm8_examine_debug_reason(), stm8_halt(), stm8_reset_assert(), stm8_resume(), stm8_step(), target_create(), update_halt_gdb(), xscale_debug_entry(), xscale_halt(), xscale_resume(), xscale_step(), xscale_step_inner(), xtensa_chip_target_create(), xtensa_do_step(), xtensa_poll(), and xtensa_resume().
◆ defer_examine
| bool target::defer_examine |
Should we defer examine to later.
Definition at line 128 of file target.h.
Referenced by cortex_m_assert_reset(), hl_assert_reset(), jim_target_examine(), jim_target_examine_deferred(), jim_target_reset(), target_configure(), target_examine(), and target_state_name().
◆ endianness
| enum target_endianness target::endianness |
Definition at line 158 of file target.h.
Referenced by arc_read_instruction_u32(), arc_write_instruction_u32(), arm7_9_dcc_completion(), arm7tdmi_read_core_regs_target_buffer(), arm9tdmi_read_core_regs_target_buffer(), chibios_update_memory_signature(), COMMAND_HANDLER(), esirisc_identify(), fa526_read_core_regs_target_buffer(), feroceon_read_core_regs_target_buffer(), gdb_reg_pos(), initialize_nf_controller(), mips32_configure_break_unit(), mips32_init_arch_info(), or1k_adv_jtag_read_memory(), or1k_adv_jtag_write_memory(), rtos_cortex_m_stack_align(), stm8_init_arch_info(), target_buffer_get_u16(), target_buffer_get_u24(), target_buffer_get_u32(), target_buffer_get_u64(), target_buffer_set_u16(), target_buffer_set_u24(), target_buffer_set_u32(), target_buffer_set_u64(), target_configure(), target_create(), target_endianness(), validate_target_state(), xscale_send(), xtensa_read_memory(), and xtensa_write_memory().
◆ event_action
| struct target_event_action* target::event_action |
Definition at line 147 of file target.h.
Referenced by COMMAND_HANDLER(), target_configure(), target_destroy(), and target_handle_event().
◆ examined
| bool target::examined |
Indicates whether this target has been examined.
Do not access this field directly, use target_was_examined() or target_set_examined().
Definition at line 136 of file target.h.
Referenced by target_reset_examined(), target_set_examined(), target_was_examined(), and xtensa_poll().
◆ fileio_info
| struct gdb_fileio_info* target::fileio_info |
Definition at line 203 of file target.h.
Referenced by gdb_fileio_reply(), gdb_frontend_halted(), nds32_v3_init_target(), semihosting_common(), semihosting_common_fileio_end(), semihosting_common_init(), target_destroy(), and target_get_gdb_fileio_info().
◆ gdb_max_connections
| int target::gdb_max_connections |
Definition at line 207 of file target.h.
Referenced by gdb_target_start(), target_configure(), target_create(), and target_supports_gdb_connection().
◆ gdb_port_override
| char* target::gdb_port_override |
Definition at line 205 of file target.h.
Referenced by gdb_target_add_one(), mem_ap_target_create(), target_configure(), target_create(), and target_destroy().
◆ gdb_service
| struct gdb_service* target::gdb_service |
Definition at line 200 of file target.h.
Referenced by COMMAND_HANDLER(), cortex_a_poll(), cortex_a_resume(), esp_xtensa_smp_poll(), esp_xtensa_smp_resume(), esp_xtensa_smp_update_halt_gdb(), gdb_read_smp_packet(), gdb_target_add_one(), gdb_target_start(), gdb_write_smp_packet(), mips_m4k_poll(), mips_m4k_resume(), and update_halt_gdb().
◆ halt_issued
| bool target::halt_issued |
Definition at line 175 of file target.h.
Referenced by target_create(), target_halt(), and target_poll().
◆ halt_issued_time
| int64_t target::halt_issued_time |
Definition at line 176 of file target.h.
Referenced by target_halt(), and target_poll().
◆ has_dap
| bool target::has_dap |
Definition at line 183 of file target.h.
Referenced by adiv5_jim_configure(), target_configure(), target_create(), and xtensa_chip_jim_configure().
◆ next
| struct target* target::next |
Definition at line 171 of file target.h.
Referenced by aarch64_halt_smp(), aice_init_targets(), aice_scan_jtag_chain(), COMMAND_HANDLER(), delete_debug_msg_receiver(), find_debug_msg_receiver(), gdb_new_connection(), gdb_target_add_all(), get_target(), get_target_by_num(), handle_target(), jim_target_names(), new_target_number(), target_create(), target_examine(), target_init(), target_process_reset(), and target_quit().
◆ private_config
| void* target::private_config |
Definition at line 170 of file target.h.
Referenced by aarch64_deinit_target(), aarch64_examine_first(), aarch64_jim_configure(), aarch64_target_create(), adapter_target_create(), adiv5_jim_configure(), cortex_a_deinit_target(), cortex_a_examine_first(), cortex_a_target_create(), cortex_m_deinit_target(), cortex_m_target_create(), cortex_r4_target_create(), mem_ap_deinit_target(), mem_ap_target_create(), and xtensa_chip_target_create().
◆ reg_cache
| struct reg_cache* target::reg_cache |
Definition at line 163 of file target.h.
Referenced by access_register_command(), arc_build_bcr_reg_cache(), arc_build_reg_cache(), arc_configure(), arc_get_gdb_reg_list(), arc_get_register_value(), arc_reg_get_field(), arc_set_register_value(), arm11_examine(), arm7_9_examine(), arm7tdmi_build_reg_cache(), arm9tdmi_build_reg_cache(), arm_dpm_setup(), armv7m_build_reg_cache(), armv8_build_reg_cache(), avr32_build_reg_cache(), COMMAND_HANDLER(), cortex_m_dwt_free(), cortex_m_dwt_setup(), dsp563xx_build_reg_cache(), esirisc_build_reg_cache(), execute_resume(), get_register(), hwthread_get_thread_reg(), hwthread_set_reg(), lakemont_build_reg_cache(), mips32_build_reg_cache(), mips64_build_reg_cache(), nds32_arch_state(), nds32_reg_cache_init(), or1k_build_reg_cache(), reg_cache_get(), reg_cache_set(), register_read(), register_size(), register_write_direct(), resume_finish(), riscv_free_registers(), riscv_get_gdb_reg_list_internal(), riscv_get_register(), riscv_init_registers(), riscv_invalidate_register_cache(), riscv_openocd_step(), riscv_run_algorithm(), riscv_set_register(), stm8_build_reg_cache(), target_create(), target_jim_get_reg(), target_jim_set_reg(), target_profiling_default(), update_mstatus_actual(), xscale_build_reg_cache(), xtensa_build_reg_cache(), and xtensa_free_reg_cache().
◆ reset_halt
| bool target::reset_halt |
Definition at line 149 of file target.h.
Referenced by aarch64_assert_reset(), aarch64_deassert_reset(), arc_assert_reset(), arm11_assert_reset(), arm11_deassert_reset(), arm7_9_assert_reset(), arm7_9_deassert_reset(), assert_reset(), COMMAND_HANDLER(), cortex_a_assert_reset(), cortex_a_deassert_reset(), cortex_m_assert_reset(), deassert_reset(), dsp563xx_assert_reset(), dsp563xx_deassert_reset(), esirisc_deassert_reset(), esp32_soc_reset(), esp32s2_soc_reset(), esp32s3_soc_reset(), feroceon_assert_reset(), hl_assert_reset(), hl_deassert_reset(), jim_target_reset(), lakemont_reset_assert(), lakemont_reset_deassert(), mem_ap_deassert_reset(), mips_m4k_assert_reset(), mips_mips64_assert_reset(), nds32_assert_reset(), quark_d20xx_reset_deassert(), stm8_reset_assert(), stm8_reset_deassert(), xscale_assert_reset(), xscale_deassert_reset(), and xtensa_deassert_reset().
◆ rtos
| struct rtos* target::rtos |
Definition at line 188 of file target.h.
Referenced by assert_reset(), chibios_create(), chibios_detect_rtos(), chromium_ec_create(), chromium_ec_detect_rtos(), clean_threadlist(), COMMAND_HANDLER(), deassert_reset(), ecos_create(), ecos_detect_rtos(), embkernel_create(), embkernel_detect_rtos(), freertos_create(), freertos_detect_rtos(), gdb_generate_thread_list(), gdb_get_register_packet(), gdb_get_registers_packet(), gdb_handle_vcont_packet(), gdb_input_inner(), gdb_new_connection(), gdb_read_memory_packet(), gdb_set_register_packet(), gdb_signal_reply(), gdb_thread_packet(), gdb_write_memory_binary_packet(), gdb_write_memory_packet(), get_current(), get_target_with_common_rtos_type(), hwthread_create(), hwthread_smp_init(), hwthread_thread_packet(), insert_into_threadlist(), linux_compute_virt2phys(), linux_gdb_h_packet(), linux_gdb_t_packet(), linux_gdb_thread_packet(), linux_gdb_thread_update(), linux_get_tasks(), linux_identify_current_threads(), linux_os_clean(), linux_os_create(), linux_os_smp_init(), linux_os_thread_reg_list(), linux_ps_command(), linux_read_memory(), linux_task_update(), linux_thread_extra_info(), linux_thread_packet(), mqx_create(), mqx_detect_rtos(), mqx_target_read_buffer(), nuttx_create(), nuttx_detect_rtos(), os_alloc(), os_alloc_create(), os_free(), riot_create(), riot_detect_rtos(), rtos_get_gdb_reg(), rtos_get_gdb_reg_list(), rtos_qsymbol(), rtos_read_buffer(), rtos_set_reg(), rtos_smp_init(), rtos_thread_packet(), rtos_try_next(), rtos_update_threads(), rtos_write_buffer(), target_create(), threadx_create(), threadx_detect_rtos(), ucos_iii_create(), ucos_iii_detect_rtos(), ucos_iii_reset_handler(), zephyr_create(), and zephyr_detect_rtos().
◆ rtos_auto_detect
| bool target::rtos_auto_detect |
Definition at line 189 of file target.h.
Referenced by rtos_create(), rtos_qsymbol(), rtos_thread_packet(), and target_create().
◆ running_alg
| bool target::running_alg |
true if the target is currently running a downloaded "algorithm" instead of arbitrary user code.
OpenOCD code invoking algorithms is trusted to maintain correctness of any cached state (e.g. for flash status), which arbitrary code will have no reason to know about.
Definition at line 145 of file target.h.
Referenced by sromalgo_release(), target_process_reset(), target_run_algorithm(), target_start_algorithm(), and target_wait_algorithm().
◆ semihosting
| struct semihosting* target::semihosting |
Definition at line 210 of file target.h.
Referenced by arm_arch_state(), arm_semihosting(), armv7m_arch_state(), armv8_aarch64_state(), COMMAND_HANDLER(), esp_semihosting_basedir_command(), esp_semihosting_common(), esp_semihosting_sys_seek(), esp_xtensa_semihosting(), esp_xtensa_semihosting_init(), esp_xtensa_semihosting_post_result(), gdb_handle_vrun_packet(), post_result(), riscv_semihosting_post_result(), riscv_semihosting_setup(), semihosting_common(), semihosting_common_fileio_end(), semihosting_common_fileio_info(), semihosting_common_init(), semihosting_get_field(), semihosting_read_fields(), semihosting_set_field(), semihosting_write_fields(), and target_destroy().
◆ smp
| int target::smp |
Definition at line 192 of file target.h.
Referenced by aarch64_halt(), aarch64_poll(), aarch64_resume(), aarch64_step(), armv7a_cache_auto_flush_all_data(), armv7a_l1_i_cache_inval_all(), armv8_flush_all_data(), breakpoint_add(), breakpoint_clear_target(), breakpoint_remove(), breakpoint_remove_all(), breakpoint_remove_internal(), COMMAND_HANDLER(), context_breakpoint_add(), cortex_a_poll(), cortex_a_resume(), esp32_soc_reset(), esp32s3_soc_reset(), esp_xtensa_smp_deassert_reset(), esp_xtensa_smp_poll(), esp_xtensa_smp_resume(), esp_xtensa_smp_resume_cores(), esp_xtensa_smp_soft_reset_halt(), esp_xtensa_smp_step(), esp_xtensa_smp_target_init(), esp_xtensa_smp_update_halt_gdb(), esp_xtensa_smp_watchpoint_add(), esp_xtensa_smp_watchpoint_remove(), examine(), gdb_read_smp_packet(), gdb_target_add_one(), gdb_write_smp_packet(), hwthread_find_thread(), hwthread_update_threads(), hybrid_breakpoint_add(), jim_target_smp(), mips_m4k_poll(), mips_m4k_resume(), riscv_halt(), riscv_openocd_poll(), riscv_resume(), rtos_get_gdb_reg(), rtos_get_gdb_reg_list(), set_haltgroup(), smp_reg_list_noread(), target_destroy(), update_halt_gdb(), watchpoint_add(), watchpoint_remove(), and watchpoint_remove_internal().
◆ smp_targets
| struct list_head* target::smp_targets |
Definition at line 193 of file target.h.
Referenced by aarch64_halt_smp(), aarch64_prep_restart_smp(), aarch64_prepare_halt_smp(), aarch64_resume(), aarch64_step_restart_smp(), armv7a_cache_auto_flush_all_data(), armv7a_l2x_cache_init(), armv8_flush_all_data(), breakpoint_add(), breakpoint_clear_target(), breakpoint_remove(), breakpoint_remove_all(), COMMAND_HANDLER(), context_breakpoint_add(), cortex_a_halt_smp(), cortex_a_restore_smp(), esp32_soc_reset(), esp32s3_soc_reset(), esp_xtensa_smp_poll(), esp_xtensa_smp_resume_cores(), esp_xtensa_smp_soft_reset_halt(), esp_xtensa_smp_target_init(), esp_xtensa_smp_update_halt_gdb(), esp_xtensa_smp_watchpoint_add(), esp_xtensa_smp_watchpoint_remove(), gdb_target_start(), get_cortex_a(), get_current(), get_halted_esp_xtensa_smp(), get_mips_m4k(), hwthread_find_thread(), hwthread_update_threads(), hybrid_breakpoint_add(), jim_target_smp(), linux_os_smp_init(), mips_m4k_halt_smp(), mips_m4k_restore_smp(), riscv_halt(), riscv_openocd_poll(), riscv_resume(), smp_reg_list_noread(), target_create(), target_destroy(), update_halt_gdb(), watchpoint_add(), and watchpoint_remove().
◆ state
| enum target_state target::state |
Definition at line 158 of file target.h.
Referenced by aarch64_assert_reset(), aarch64_deassert_reset(), aarch64_do_restart_one(), aarch64_examine_first(), aarch64_handle_target_request(), aarch64_mmu(), aarch64_poll(), aarch64_prep_restart_smp(), aarch64_prepare_halt_smp(), aarch64_read_cpu_memory(), aarch64_remove_breakpoint(), aarch64_resume(), aarch64_step(), aarch64_step_restart_smp(), aarch64_write_cpu_memory(), adapter_halt(), adapter_poll(), adapter_resume(), adapter_step(), ambiqmicro_exec_command(), ambiqmicro_mass_erase(), ambiqmicro_otp_program(), arc_add_auxreg_actionpoint(), arc_add_breakpoint(), arc_add_watchpoint(), arc_assert_reset(), arc_examine(), arc_get_register(), arc_halt(), arc_mem_read(), arc_mem_write(), arc_poll(), arc_remove_auxreg_actionpoint(), arc_remove_breakpoint(), arc_remove_watchpoint(), arc_resume(), arc_step(), arm11_assert_reset(), arm11_check_init(), arm11_deassert_reset(), arm11_debug_entry(), arm11_halt(), arm11_poll(), arm11_read_memory_inner(), arm11_resume(), arm11_step(), arm11_write_memory_inner(), arm720_mmu(), arm720t_soft_reset_halt(), arm7_9_assert_reset(), arm7_9_debug_entry(), arm7_9_full_context(), arm7_9_halt(), arm7_9_handle_target_request(), arm7_9_poll(), arm7_9_read_memory(), arm7_9_restore_context(), arm7_9_resume(), arm7_9_set_breakpoint(), arm7_9_set_watchpoint(), arm7_9_soft_reset_halt(), arm7_9_step(), arm7_9_unset_watchpoint(), arm7_9_write_memory(), arm7a_l2x_sanity_check(), arm920_mmu(), arm920t_soft_reset_halt(), arm926ejs_soft_reset_halt(), armv4_5_get_core_reg(), armv4_5_mmu_read_physical(), armv4_5_mmu_write_physical(), armv4_5_run_algorithm_completion(), armv4_5_run_algorithm_inner(), armv7a_cache_auto_flush_all_data(), armv7a_l1_d_cache_sanity_check(), armv7a_l1_i_cache_sanity_check(), armv7m_get_core_reg(), armv7m_set_core_reg(), armv7m_start_algorithm(), armv7m_wait_algorithm(), armv8_flush_all_data(), armv8_get_core_reg(), armv8_get_core_reg32(), armv8_mmu_translate_va_pa(), assert_reset(), at91sam9_halted(), ath79_erase(), ath79_read(), ath79_write(), avr32_ap7k_examine(), avr32_ap7k_halt(), avr32_ap7k_poll(), avr32_ap7k_read_memory(), avr32_ap7k_resume(), avr32_ap7k_write_memory(), avr32_get_core_reg(), avr_assert_reset(), avr_deassert_reset(), avr_poll(), avrf_erase(), avrf_mass_erase(), cc26xx_erase(), cc26xx_mass_erase(), cc26xx_write(), cc3220sf_erase(), cc3220sf_mass_erase(), cc3220sf_write(), check_not_halted(), COMMAND_HANDLER(), cortex_a_assert_reset(), cortex_a_deassert_reset(), cortex_a_examine_first(), cortex_a_halt_smp(), cortex_a_handle_target_request(), cortex_a_internal_restart(), cortex_a_internal_restore(), cortex_a_mmu(), cortex_a_poll(), cortex_a_read_cpu_memory(), cortex_a_remove_breakpoint(), cortex_a_restore_smp(), cortex_a_resume(), cortex_a_step(), cortex_a_write_cpu_memory(), cortex_m_assert_reset(), cortex_m_halt(), cortex_m_handle_target_request(), cortex_m_poll(), cortex_m_profiling(), cortex_m_remove_watchpoint(), cortex_m_resume(), cortex_m_soft_reset_halt(), cortex_m_step(), deassert_reset(), do_halt(), do_resume(), dsp563xx_add_custom_watchpoint(), dsp563xx_assert_reset(), dsp563xx_deassert_reset(), dsp563xx_get_core_reg(), dsp563xx_get_gdb_reg_list(), dsp563xx_halt(), dsp563xx_jtag_debug_request(), dsp563xx_poll(), dsp563xx_read_memory_core(), dsp563xx_resume(), dsp563xx_run_algorithm(), dsp563xx_step(), dsp563xx_step_ex(), dsp563xx_write_memory_core(), dsp5680xx_assert_reset(), dsp5680xx_deassert_reset(), dsp5680xx_f_lock(), dsp5680xx_f_unlock(), dsp5680xx_halt(), dsp5680xx_poll(), dsp5680xx_resume(), efm32x_erase(), efm32x_priv_write(), efm32x_protect(), efm32x_protect_check(), em357_mass_erase(), em357_protect(), em357_protect_check(), eonce_enter_debug_mode(), eonce_enter_debug_mode_without_reset(), esirisc_assert_reset(), esirisc_examine(), esirisc_flash_erase(), esirisc_flash_mass_erase(), esirisc_flash_probe(), esirisc_flash_ref_erase(), esirisc_flash_write(), esirisc_flush_caches(), esirisc_get_reg(), esirisc_halt(), esirisc_poll(), esirisc_resume_or_step(), esirisc_trace_clear_status(), esirisc_trace_get_status(), esirisc_trace_init(), esirisc_trace_read_buffer(), esirisc_trace_read_memory(), esirisc_trace_start(), esirisc_trace_stop(), esp32_soc_reset(), esp32_target_create(), esp32s2_poll(), esp32s2_soc_reset(), esp32s3_soc_reset(), esp_xtensa_smp_poll(), esp_xtensa_smp_resume(), esp_xtensa_smp_resume_cores(), esp_xtensa_smp_update_halt_gdb(), execute_resume(), fespi_erase(), fespi_read_flash_id(), fespi_write(), fm3_chip_erase(), fm3_erase(), fm4_flash_erase(), fm4_flash_write(), full_step(), gdb_handle_vcont_packet(), gdb_input_inner(), gdb_new_connection(), get_cortex_a(), get_halted_esp_xtensa_smp(), get_mips_m4k(), get_psoc4_info(), halt_go(), halted(), handle_halt(), handle_reset_halt(), hl_assert_reset(), hl_handle_target_request(), kinetis_check_run_mode(), kinetis_disable_wdog_algo(), kinetis_ke_stop_watchdog(), lakemont_halt(), lakemont_init_target(), lakemont_poll(), lakemont_reset_assert(), lakemont_reset_deassert(), lakemont_resume(), lakemont_step(), lakemont_update_after_probemode_entry(), lpc2900_probe(), lpc2900_write_index_page(), lpc3180_address(), lpc3180_command(), lpc3180_controller_ready(), lpc3180_init(), lpc3180_nand_ready(), lpc3180_read_data(), lpc3180_read_page(), lpc3180_reset(), lpc3180_tc_ready(), lpc3180_write_data(), lpc3180_write_page(), lpc32xx_address(), lpc32xx_command(), lpc32xx_controller_ready(), lpc32xx_init(), lpc32xx_nand_ready(), lpc32xx_read_data(), lpc32xx_read_page(), lpc32xx_reset(), lpc32xx_write_data(), lpc32xx_write_page(), lpcspifi_erase(), lpcspifi_read_flash_id(), lpcspifi_write(), ls1_sap_assert_reset(), ls1_sap_deassert_reset(), ls1_sap_poll(), max32xxx_mass_erase(), mem_ap_assert_reset(), mem_ap_deassert_reset(), mem_ap_examine(), mem_ap_halt(), mem_ap_init_target(), mem_ap_poll(), mem_ap_resume(), mem_ap_step(), mem_should_skip_progbuf(), mips32_get_core_reg(), mips32_run_algorithm(), mips32_run_and_wait(), mips32_set_core_reg(), mips64_get_core_reg(), mips64_set_core_reg(), mips_m4k_assert_reset(), mips_m4k_halt(), mips_m4k_halt_smp(), mips_m4k_internal_restore(), mips_m4k_poll(), mips_m4k_read_memory(), mips_m4k_remove_breakpoint(), mips_m4k_remove_watchpoint(), mips_m4k_restore_smp(), mips_m4k_step(), mips_m4k_write_memory(), mips_mips64_assert_reset(), mips_mips64_halt(), mips_mips64_poll(), mips_mips64_read_memory(), mips_mips64_remove_breakpoint(), mips_mips64_remove_watchpoint(), mips_mips64_resume(), mips_mips64_step(), mips_mips64_write_memory(), mrvlqspi_flash_erase(), mrvlqspi_flash_read(), mrvlqspi_flash_write(), mrvlqspi_probe(), msp432_erase(), msp432_mass_erase(), msp432_write(), nds32_assert_reset(), nds32_get_core_reg(), nds32_get_core_reg_64(), nds32_halt(), nds32_mmu(), nds32_poll(), nds32_profiling(), nds32_read_buffer(), nds32_restore_context(), nds32_resume(), nds32_set_core_reg(), nds32_step(), nds32_step_without_watchpoint(), nds32_v2_deassert_reset(), nds32_v2_debug_entry(), nds32_v2_examine(), nds32_v2_read_buffer(), nds32_v2_read_memory(), nds32_v2_write_buffer(), nds32_v3_deassert_reset(), nds32_v3_debug_entry(), nds32_v3_examine(), nds32_v3_read_buffer(), nds32_v3_read_memory(), nds32_v3_write_buffer(), nds32_v3_write_memory(), nds32_v3m_deassert_reset(), nds32_v3m_examine(), nds32_write_buffer(), niietcm4_protect(), npcx_chip_erase(), npcx_erase(), npcx_write(), numicro_erase(), numicro_init_isp(), numicro_protect_check(), numicro_write(), or1k_examine(), or1k_get_core_reg(), or1k_halt(), or1k_poll(), or1k_profiling(), or1k_read_memory(), or1k_resume_or_step(), or1k_write_memory(), pic32mx_protect(), pic32mx_protect_check(), poll_target(), psoc4_flash_prepare(), psoc5lp_erase_check(), psoc5lp_probe(), read_flash_id(), resume_finish(), riscv013_halt_go(), riscv013_halt_reason(), riscv_openocd_poll(), riscv_openocd_step(), riscv_run_algorithm(), rp2040_flash_erase(), rp2040_flash_probe(), rp2040_flash_write(), s3c2410_read_data(), s3c2410_write_data(), s3c2440_nand_ready(), s3c2440_read_block_data(), s3c24xx_address(), s3c24xx_command(), s3c24xx_read_data(), s3c24xx_reset(), s3c24xx_write_data(), samd_issue_nvmctrl_command(), same5_issue_nvmctrl_command(), same5_pre_write_check(), sh_qspi_erase(), sh_qspi_read(), sh_qspi_write(), sim3x_flash_protect(), sim3x_flash_write(), stellaris_mass_erase(), stellaris_protect(), stm32l4_mass_erase(), stm32l4_protect(), stm32lx_lock(), stm32lx_mass_erase(), stm32lx_obl_launch(), stm32lx_unlock(), stm32x_mass_erase(), stm32x_protect(), stm32x_set_rdp(), stm8_get_core_reg(), stm8_halt(), stm8_poll(), stm8_read_memory(), stm8_remove_breakpoint(), stm8_remove_watchpoint(), stm8_reset_assert(), stm8_reset_deassert(), stm8_resume(), stm8_run_algorithm(), stm8_run_and_wait(), stm8_set_core_reg(), stm8_step(), stm8_write_memory(), stmqspi_blank_check(), stmqspi_erase(), stmqspi_read(), stmqspi_verify(), stmqspi_write(), stmsmi_erase(), stmsmi_write(), swm050_erase(), swm050_mass_erase(), swm050_write(), target_add_breakpoint(), target_add_context_breakpoint(), target_add_hybrid_breakpoint(), target_add_watchpoint(), target_arch_state(), target_create(), target_gdb_fileio_end(), target_get_gdb_fileio_info(), target_hit_watchpoint(), target_poll(), target_profiling_default(), target_state_name(), target_wait_state(), tcl_new_connection(), tcl_target_callback_event_handler(), testee_halt(), testee_poll(), testee_reset_assert(), testee_reset_deassert(), tms470_erase_check(), tms470_protect(), tms470_protect_check(), tms470_write(), update_halt_gdb(), validate_target_state(), wait_for_state(), xmc1xxx_write(), xscale_assert_reset(), xscale_deassert_reset(), xscale_debug_entry(), xscale_full_context(), xscale_halt(), xscale_mmu(), xscale_poll(), xscale_read_memory(), xscale_read_trace(), xscale_remove_breakpoint(), xscale_remove_watchpoint(), xscale_restore_banked(), xscale_resume(), xscale_set_breakpoint(), xscale_set_watchpoint(), xscale_step(), xscale_unset_breakpoint(), xscale_unset_watchpoint(), xscale_write_memory(), xtensa_assert_reset(), xtensa_canonical_to_windowbase_offset(), xtensa_chip_poll(), xtensa_chip_target_create(), xtensa_core_reg_get(), xtensa_deassert_reset(), xtensa_do_step(), xtensa_halt(), xtensa_poll(), xtensa_prepare_resume(), xtensa_read_memory(), xtensa_resume(), xtensa_smpbreak_set(), xtensa_watchpoint_add(), and xtensa_write_memory().
◆ tap
| struct jtag_tap* target::tap |
Definition at line 124 of file target.h.
Referenced by adapter_target_create(), add_dbus_scan(), adiv5_jim_configure(), aice_init_targets(), aice_scan_jtag_chain(), arc_target_create(), arm11_add_debug_inst(), arm11_add_debug_scan_n(), arm11_add_ir(), arm11_debug_entry(), arm11_examine(), arm11_leave_debug_state(), arm11_read_dscr(), arm11_run_instr_data_from_core(), arm11_run_instr_data_to_core(), arm11_run_instr_data_to_core_noack(), arm11_sc7_run(), arm11_target_create(), arm11_write_dscr(), arm720t_target_create(), arm920t_target_create(), arm926ejs_target_create(), arm946e_target_create(), arm966e_target_create(), arm9tdmi_target_create(), assert_reset(), ath79_probe(), avr32_ap7k_init_target(), avr_target_create(), COMMAND_HANDLER(), dbus_scan(), deassert_reset(), dmi_scan(), dragonite_target_create(), drscan(), dsp563xx_add_custom_watchpoint(), dsp563xx_debug_init(), dsp563xx_debug_once_init(), dsp563xx_examine(), dsp563xx_jtag_debug_request(), dsp563xx_poll(), dsp563xx_read_memory_core(), dsp563xx_reg_read(), dsp563xx_reg_read_high_io(), dsp563xx_reg_write(), dsp563xx_reg_write_high_io(), dsp563xx_remove_custom_watchpoint(), dsp563xx_resume(), dsp563xx_step_ex(), dsp563xx_target_create(), dsp563xx_write_memory_core(), dsp5680xx_drscan(), dsp5680xx_f_sim_reset(), dsp5680xx_irscan(), dtmcontrol_scan(), dtmcontrol_scan_via_bscan(), esirisc_target_create(), esp32_target_create(), fa526_target_create(), feroceon_target_create(), fespi_probe(), find_target(), get_dm(), halt(), handle_target(), hl_interface_init_target(), idcode_scan(), irscan(), jim_target_examine(), jim_target_halt(), jim_target_poll(), jim_target_reset(), jim_target_wait_state(), jtag_enable_callback(), ls1_sap_read_memory(), ls1_sap_target_create(), mips_m4k_target_create(), mips_mips64_target_create(), or1k_init_target(), or1k_target_create(), poll_target(), read_memory(), riscv011_resume(), riscv_add_bscan_tunneled_scan(), riscv_batch_run(), riscv_init_target(), select_dmi(), select_dmi_via_bscan(), sh_qspi_probe(), step(), stm8_target_create(), stmsmi_probe(), target_configure(), target_create(), target_examine(), target_to_adapter(), target_to_aice(), write_memory(), x86_32_common_init_arch_info(), xscale_assert_reset(), xscale_invalidate_ic_line(), xscale_load_ic(), xscale_read_dcsr(), xscale_read_tx(), xscale_receive(), xscale_send(), xscale_target_create(), xscale_write_dcsr(), xscale_write_rx(), and xtensa_chip_target_create().
◆ tap_configured
| bool target::tap_configured |
Definition at line 185 of file target.h.
Referenced by adiv5_jim_configure(), target_configure(), and target_create().
◆ target_number
| int target::target_number |
Definition at line 123 of file target.h.
Referenced by COMMAND_HANDLER(), get_target(), get_target_by_num(), nds32_callback_event_handler(), nds32_init(), nds32_init_arch_info(), new_target_number(), target_create(), target_handle_event(), and xtensa_assert_reset().
◆ trace_info
| struct trace* target::trace_info |
Definition at line 166 of file target.h.
Referenced by COMMAND_HANDLER(), target_create(), target_destroy(), and trace_point().
◆ type
| struct target_type* target::type |
Definition at line 121 of file target.h.
Referenced by arm926ejs_write_memory(), arm_dpm_setup(), arm_dpm_write_dirty_registers(), armv7a_l2x_cache_clean_virt(), armv7a_l2x_cache_flush_virt(), armv7a_l2x_cache_inval_virt(), armv8_dpm_setup(), armv8_dpm_write_dirty_registers(), chibios_create(), chibios_get_thread_reg_list(), chromium_ec_create(), COMMAND_HANDLER(), ecos_create(), embkernel_create(), freertos_create(), gdb_handle_vcont_packet(), gdb_query_packet(), handle_bp_command_set(), jim_arm_tpiu_swo_enable(), jim_target_examine(), jim_target_halt(), jim_target_poll(), jim_target_reset(), linux_compute_virt2phys(), mqx_create(), nds32_add_software_breakpoint(), nds32_cache_sync(), nds32_get_gdb_fileio_info(), nds32_remove_software_breakpoint(), nds32_v2_translate_address(), nds32_v3_read_buffer(), nds32_v3_read_memory(), nds32_v3_write_buffer(), nds32_v3_write_memory(), nuttx_create(), riot_create(), riscv_read_memory(), riscv_write_memory(), semihosting_common_init(), target_add_breakpoint(), target_add_context_breakpoint(), target_add_hybrid_breakpoint(), target_add_watchpoint(), target_address_bits(), target_alloc_working_area_try(), target_arch_state(), target_asciimsg(), target_blank_check_memory(), target_checksum_memory(), target_configure(), target_create(), target_data_bits(), target_destroy(), target_examine_one(), target_gdb_fileio_end(), target_get_gdb_arch(), target_get_gdb_fileio_info(), target_get_gdb_reg_list(), target_get_gdb_reg_list_noread(), target_halt(), target_hexmsg(), target_hit_watchpoint(), target_init_one(), target_poll(), target_process_reset(), target_profiling(), target_read_buffer(), target_read_memory(), target_read_phys_memory(), target_remove_breakpoint(), target_remove_watchpoint(), target_request(), target_resume(), target_run_algorithm(), target_soft_reset_halt(), target_start_algorithm(), target_step(), target_supports_gdb_connection(), target_type_name(), target_wait_algorithm(), target_write_buffer(), target_write_memory(), target_write_phys_memory(), threadx_create(), and ucos_iii_create().
◆ verbose_halt_msg
| bool target::verbose_halt_msg |
Definition at line 173 of file target.h.
Referenced by COMMAND_HANDLER(), log_target_callback_event_handler(), and target_create().
◆ watchpoints
| struct watchpoint* target::watchpoints |
Definition at line 165 of file target.h.
Referenced by aarch64_hit_watchpoint(), arc_hit_watchpoint(), arc_reset_actionpoints(), arm7_9_enable_watchpoints(), COMMAND_HANDLER(), cortex_m_enable_watchpoints(), cortex_m_hit_watchpoint(), disable_triggers(), enable_triggers(), esirisc_add_watchpoints(), lakemont_resume(), mips_m4k_enable_watchpoints(), mips_mips64_enable_watchpoints(), nds32_v2_activate_hardware_watchpoint(), nds32_v2_deactivate_hardware_watchpoint(), nds32_v2_hit_watchpoint(), nds32_v3_activate_hardware_watchpoint(), nds32_v3_deactivate_hardware_watchpoint(), nds32_v3_get_exception_address(), nds32_v3_hit_watchpoint(), nds32_v3m_activate_hardware_watchpoint(), nds32_v3m_deactivate_hardware_watchpoint(), riscv_hit_watchpoint(), stm8_enable_watchpoints(), strict_step(), target_create(), watchpoint_add_internal(), watchpoint_clear_target(), watchpoint_free(), watchpoint_remove_internal(), x86_32_common_reset_breakpoints_watchpoints(), and xscale_enable_watchpoints().
◆ working_area
| target_addr_t target::working_area |
Definition at line 150 of file target.h.
Referenced by target_alloc_working_area_try(), and target_create().
◆ working_area_phys
| target_addr_t target::working_area_phys |
Definition at line 155 of file target.h.
Referenced by lpc3180_read_page(), lpc3180_write_page(), target_alloc_working_area_try(), and target_configure().
◆ working_area_phys_spec
| bool target::working_area_phys_spec |
Definition at line 154 of file target.h.
Referenced by target_alloc_working_area_try(), and target_configure().
◆ working_area_size
| uint32_t target::working_area_size |
Definition at line 156 of file target.h.
Referenced by arm7_9_check_reset(), fm3_write_block(), lpc3180_read_page(), lpc3180_write_page(), numicro_writeblock(), psoc5lp_write(), rsl10_ll_flash_erase(), rsl10_ll_flash_write(), rsl10_mass_erase(), target_alloc_working_area_try(), target_configure(), target_create(), and target_get_working_area_avail().
◆ working_area_virt
| target_addr_t target::working_area_virt |
Definition at line 153 of file target.h.
Referenced by target_alloc_working_area_try(), and target_configure().
◆ working_area_virt_spec
| bool target::working_area_virt_spec |
Definition at line 152 of file target.h.
Referenced by target_alloc_working_area_try(), and target_configure().
◆ working_areas
| struct working_area* target::working_areas |
Definition at line 158 of file target.h.
Referenced by print_wa_layout(), target_alloc_working_area_try(), target_create(), target_free_all_working_areas(), target_free_all_working_areas_restore(), target_get_working_area_avail(), and target_merge_working_areas().
The documentation for this struct was generated from the following file:
