OpenOCD
arm7_9_common.h
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 /***************************************************************************
4  * Copyright (C) 2005 by Dominic Rath *
5  * Dominic.Rath@gmx.de *
6  * *
7  * Copyright (C) 2007,2008 Øyvind Harboe *
8  * oyvind.harboe@zylin.com *
9  * *
10  * Copyright (C) 2008 by Spencer Oliver *
11  * spen@spen-soft.co.uk *
12  * *
13  * Copyright (C) 2008 by Hongtao Zheng *
14  * hontor@126.com *
15  ***************************************************************************/
16 
17 #ifndef OPENOCD_TARGET_ARM7_9_COMMON_H
18 #define OPENOCD_TARGET_ARM7_9_COMMON_H
19 
20 #include "arm.h"
21 #include "arm_jtag.h"
22 
23 #define ARM7_9_COMMON_MAGIC 0x0a790a79U
28 struct arm7_9_common {
29  unsigned int common_magic;
30 
31  struct arm arm;
32 
33  struct arm_jtag jtag_info;
36  uint32_t arm_bkpt;
37  uint16_t thumb_bkpt;
44  int wp0_used;
45  int wp1_used;
48  bool use_dbgrq;
59 
61 
65  void (*change_to_arm)(struct target *target, uint32_t *r0, uint32_t *pc);
68  void (*read_core_regs)(struct target *target, uint32_t mask, uint32_t *core_regs[16]);
71  void (*read_core_regs_target_buffer)(struct target *target, uint32_t mask,
72  void *buffer, int size);
73  void (*read_xpsr)(struct target *target, uint32_t *xpsr, int spsr);
76  void (*write_xpsr)(struct target *target, uint32_t xpsr, int spsr);
79  void (*write_xpsr_im8)(struct target *target, uint8_t xpsr_im, int rot, int spsr);
82  void (*write_core_regs)(struct target *target, uint32_t mask, uint32_t core_regs[16]);
83 
84  void (*load_word_regs)(struct target *target, uint32_t mask);
85  void (*load_hword_reg)(struct target *target, int num);
86  void (*load_byte_reg)(struct target *target, int num);
87 
88  void (*store_word_regs)(struct target *target, uint32_t mask);
89  void (*store_hword_reg)(struct target *target, int num);
90  void (*store_byte_reg)(struct target *target, int num);
91 
92  void (*write_pc)(struct target *target, uint32_t pc);
95  void (*branch_resume)(struct target *target);
96  void (*branch_resume_thumb)(struct target *target);
97 
98  void (*enable_single_step)(struct target *target, uint32_t next_pc);
99  void (*disable_single_step)(struct target *target);
100 
101  void (*set_special_dbgrq)(struct target *target);
104  int (*post_debug_entry)(struct target *target);
115  int (*write_memory)(struct target *target, target_addr_t address,
116  uint32_t size, uint32_t count, const uint8_t *buffer);
121  int (*bulk_write_memory)(struct target *target, target_addr_t address,
122  uint32_t count, const uint8_t *buffer);
123 };
124 
125 static inline struct arm7_9_common *target_to_arm7_9(struct target *target)
126 {
127  return container_of(target->arch_info, struct arm7_9_common, arm);
128 }
129 
130 static inline bool is_arm7_9(struct arm7_9_common *arm7_9)
131 {
132  return arm7_9->common_magic == ARM7_9_COMMON_MAGIC;
133 }
134 
135 extern const struct command_registration arm7_9_command_handlers[];
136 
137 int arm7_9_poll(struct target *target);
138 
139 int arm7_9_target_request_data(struct target *target, uint32_t size, uint8_t *buffer);
140 
141 int arm7_9_assert_reset(struct target *target);
142 int arm7_9_deassert_reset(struct target *target);
146 
147 int arm7_9_halt(struct target *target);
148 int arm7_9_resume(struct target *target, int current, target_addr_t address,
149  int handle_breakpoints, int debug_execution);
150 int arm7_9_step(struct target *target, int current, target_addr_t address,
151  int handle_breakpoints);
152 int arm7_9_read_memory(struct target *target, target_addr_t address,
153  uint32_t size, uint32_t count, uint8_t *buffer);
154 int arm7_9_write_memory(struct target *target, target_addr_t address,
155  uint32_t size, uint32_t count, const uint8_t *buffer);
157  uint32_t size, uint32_t count, const uint8_t *buffer);
158 int arm7_9_write_memory_no_opt(struct target *target, uint32_t address,
159  uint32_t size, uint32_t count, const uint8_t *buffer);
161  uint32_t count, const uint8_t *buffer);
162 
163 int arm7_9_run_algorithm(struct target *target, int num_mem_params,
164  struct mem_param *mem_params, int num_reg_prams,
165  struct reg_param *reg_param, uint32_t entry_point, void *arch_info);
166 
171 
172 void arm7_9_enable_eice_step(struct target *target, uint32_t next_pc);
174 
176 
177 int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9);
178 int arm7_9_examine(struct target *target);
179 void arm7_9_deinit(struct target *target);
180 int arm7_9_check_reset(struct target *target);
181 
184  jtag_callback_data_t i_flip);
185 
186 #endif /* OPENOCD_TARGET_ARM7_9_COMMON_H */
#define ARM7_9_COMMON_MAGIC
Definition: arm7_9_common.h:23
int arm7_9_endianness_callback(jtag_callback_data_t pu8_in, jtag_callback_data_t i_size, jtag_callback_data_t i_be, jtag_callback_data_t i_flip)
int arm7_9_write_memory_opt(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
int arm7_9_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_prams, struct reg_param *reg_param, uint32_t entry_point, void *arch_info)
int arm7_9_examine(struct target *target)
Perform per-target setup that requires JTAG access.
void arm7_9_disable_eice_step(struct target *target)
void arm7_9_deinit(struct target *target)
int arm7_9_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
int arm7_9_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
Add a breakpoint to an ARM7/9 target.
int arm7_9_soft_reset_halt(struct target *target)
Issue a software reset and halt to an ARM7/9 target.
const struct command_registration arm7_9_command_handlers[]
int arm7_9_assert_reset(struct target *target)
Asserts the reset (SRST) on an ARM7/9 target.
int arm7_9_poll(struct target *target)
Polls an ARM7/9 target for its current status.
int arm7_9_execute_sys_speed(struct target *target)
Restarts the target by sending a RESTART instruction and moving the JTAG state to IDLE.
static struct arm7_9_common * target_to_arm7_9(struct target *target)
int arm7_9_halt(struct target *target)
Halt an ARM7/9 target.
int arm7_9_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
Removes a breakpoint from an ARM7/9 target.
int arm7_9_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
Remove a watchpoint from an ARM7/9 target.
int arm7_9_deassert_reset(struct target *target)
Deassert the reset (SRST) signal on an ARM7/9 target.
int arm7_9_write_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
static bool is_arm7_9(struct arm7_9_common *arm7_9)
void arm7_9_enable_eice_step(struct target *target, uint32_t next_pc)
int arm7_9_reset_request_halt(struct target *target)
int arm7_9_early_halt(struct target *target)
int arm7_9_bulk_write_memory(struct target *target, target_addr_t address, uint32_t count, const uint8_t *buffer)
int arm7_9_write_memory_no_opt(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
int arm7_9_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
int arm7_9_target_request_data(struct target *target, uint32_t size, uint8_t *buffer)
Get some data from the ARM7/9 target.
int arm7_9_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
Add a watchpoint to an ARM7/9 target.
int arm7_9_check_reset(struct target *target)
int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9)
int arm7_9_resume(struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution)
Holds the interface to ARM cores.
int mask
Definition: esirisc.c:1698
intptr_t jtag_callback_data_t
Defines the type of data passed to the jtag_callback_t interface.
Definition: jtag.h:333
struct target * target
Definition: rtt/rtt.c:26
size_t size
Size of the control block search area.
Definition: rtt/rtt.c:30
Structure for items that are common between both ARM7 and ARM9 targets.
Definition: arm7_9_common.h:28
void(* enable_single_step)(struct target *target, uint32_t next_pc)
Definition: arm7_9_common.h:98
bool has_vector_catch
Specifies if the target has a reset vector catch.
Definition: arm7_9_common.h:53
void(* read_xpsr)(struct target *target, uint32_t *xpsr, int spsr)
Function for reading CPSR or SPSR.
Definition: arm7_9_common.h:73
unsigned int common_magic
Definition: arm7_9_common.h:29
void(* store_hword_reg)(struct target *target, int num)
Definition: arm7_9_common.h:89
void(* write_xpsr_im8)(struct target *target, uint8_t xpsr_im, int rot, int spsr)
Function for writing an immediate value to CPSR or SPSR.
Definition: arm7_9_common.h:79
void(* write_core_regs)(struct target *target, uint32_t mask, uint32_t core_regs[16])
Definition: arm7_9_common.h:82
uint32_t arm_bkpt
ARM breakpoint instruction.
Definition: arm7_9_common.h:36
bool debug_entry_from_reset
Specifies if debug entry was from a reset.
Definition: arm7_9_common.h:55
bool use_dbgrq
Specifies if DBGRQ should be used to halt the target.
Definition: arm7_9_common.h:48
struct working_area * dcc_working_area
Definition: arm7_9_common.h:60
int(* bulk_write_memory)(struct target *target, target_addr_t address, uint32_t count, const uint8_t *buffer)
Write target memory in multiples of 4 bytes, optimized for writing large quantities of data.
bool has_single_step
Definition: arm7_9_common.h:51
void(* branch_resume)(struct target *target)
Definition: arm7_9_common.h:95
int sw_breakpoints_added
Specifies which watchpoint software breakpoints are setup on.
Definition: arm7_9_common.h:39
int breakpoint_count
Current number of set breakpoints.
Definition: arm7_9_common.h:41
int(* write_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
Variant specific memory write function that does not dispatch to bulk_write_memory.
struct arm_jtag jtag_info
JTAG information for target.
Definition: arm7_9_common.h:33
void(* set_special_dbgrq)(struct target *target)
Function for setting DBGRQ if the normal way won't work.
void(* read_core_regs_target_buffer)(struct target *target, uint32_t mask, void *buffer, int size)
Definition: arm7_9_common.h:71
int wp1_used
Specifies if and how watchpoint unit 1 is used.
Definition: arm7_9_common.h:45
void(* store_byte_reg)(struct target *target, int num)
Definition: arm7_9_common.h:90
bool need_bypass_before_restart
Specifies if there should be a bypass before a JTAG restart.
Definition: arm7_9_common.h:49
struct reg_cache * eice_cache
Embedded ICE register cache.
Definition: arm7_9_common.h:34
int(* post_debug_entry)(struct target *target)
Callback function called after entering debug mode.
void(* load_word_regs)(struct target *target, uint32_t mask)
Definition: arm7_9_common.h:84
void(* load_byte_reg)(struct target *target, int num)
Definition: arm7_9_common.h:86
bool has_monitor_mode
Definition: arm7_9_common.h:52
void(* read_core_regs)(struct target *target, uint32_t mask, uint32_t *core_regs[16])
Function for reading the core registers.
Definition: arm7_9_common.h:68
int wp1_used_default
Specifies if and how watchpoint unit 1 is used by default.
Definition: arm7_9_common.h:46
bool fast_memory_access
Definition: arm7_9_common.h:57
int sw_breakpoint_count
keep track of number of software breakpoints we have set
Definition: arm7_9_common.h:40
void(* load_hword_reg)(struct target *target, int num)
Definition: arm7_9_common.h:85
void(* disable_single_step)(struct target *target)
Definition: arm7_9_common.h:99
void(* write_pc)(struct target *target, uint32_t pc)
Function for writing to the program counter.
Definition: arm7_9_common.h:92
int wp0_used
Specifies if and how watchpoint unit 0 is used.
Definition: arm7_9_common.h:44
uint16_t thumb_bkpt
Thumb breakpoint instruction.
Definition: arm7_9_common.h:37
void(* store_word_regs)(struct target *target, uint32_t mask)
Definition: arm7_9_common.h:88
void(* pre_restore_context)(struct target *target)
Callback function called before restoring the processor context.
int dbgreq_adjust_pc
Amount of PC adjustment caused by a DBGREQ.
Definition: arm7_9_common.h:47
int(* examine_debug_reason)(struct target *target)
Function for determining why debug state was entered.
Definition: arm7_9_common.h:62
int wp_available_max
Maximum number of available watchpoint units.
Definition: arm7_9_common.h:43
void(* branch_resume_thumb)(struct target *target)
Definition: arm7_9_common.h:96
void(* change_to_arm)(struct target *target, uint32_t *r0, uint32_t *pc)
Function for changing from Thumb to ARM mode.
Definition: arm7_9_common.h:65
void(* write_xpsr)(struct target *target, uint32_t xpsr, int spsr)
Function for writing to CPSR or SPSR.
Definition: arm7_9_common.h:76
int wp_available
Current number of available watchpoint units.
Definition: arm7_9_common.h:42
Represents a generic ARM core, with standard application registers.
Definition: arm.h:167
Definition: target.h:120
void * arch_info
Definition: target.h:169
uint64_t target_addr_t
Definition: types.h:335
#define container_of(ptr, type, member)
Cast a member of a structure out to the containing structure.
Definition: types.h:68
uint8_t count[4]
Definition: vdebug.c:22