cortex_m.c File Reference

Include dependency graph for cortex_m.c:

Go to the source code of this file.

Data Structures
struct	dwt_reg
struct	dwt_reg_state

Macros
#define	DHCSR_S_REGRDY_TIMEOUT   (500)
#define	DWT_COMPARATOR(i)
#define	MVFR0   0xe000ef40
#define	MVFR0_DEFAULT_M4   0x10110021
#define	MVFR0_DEFAULT_M7_DP   0x10110221
#define	MVFR0_DEFAULT_M7_SP   0x10110021
#define	MVFR1   0xe000ef44
#define	MVFR1_DEFAULT_M4   0x11000011
#define	MVFR1_DEFAULT_M7_DP   0x12000011
#define	MVFR1_DEFAULT_M7_SP   0x11000011

Functions
	COMMAND_HANDLER (handle_cortex_m_mask_interrupts_command)
	COMMAND_HANDLER (handle_cortex_m_reset_config_command)
	COMMAND_HANDLER (handle_cortex_m_vector_catch_command)
int	cortex_m_add_breakpoint (struct target *target, struct breakpoint *breakpoint)
int	cortex_m_add_watchpoint (struct target *target, struct watchpoint *watchpoint)
static int	cortex_m_assert_reset (struct target *target)
static int	cortex_m_clear_halt (struct target *target)
static void	cortex_m_cumulate_dhcsr_sticky (struct cortex_m_common *cortex_m, uint32_t dhcsr)
	DCB DHCSR register contains S_RETIRE_ST and S_RESET_ST bits cleared on a read. More...
static int	cortex_m_dcc_read (struct target *target, uint8_t *value, uint8_t *ctrl)
static int	cortex_m_deassert_reset (struct target *target)
static int	cortex_m_debug_entry (struct target *target)
void	cortex_m_deinit_target (struct target *target)
static void	cortex_m_dwt_addreg (struct target *t, struct reg *r, const struct dwt_reg *d)
static void	cortex_m_dwt_free (struct target *target)
static int	cortex_m_dwt_get_reg (struct reg *reg)
static int	cortex_m_dwt_set_reg (struct reg *reg, uint8_t *buf)
static void	cortex_m_dwt_setup (struct cortex_m_common *cm, struct target *target)
void	cortex_m_enable_breakpoints (struct target *target)
static int	cortex_m_enable_fpb (struct target *target)
void	cortex_m_enable_watchpoints (struct target *target)
static int	cortex_m_endreset_event (struct target *target)
int	cortex_m_examine (struct target *target)
static int	cortex_m_examine_debug_reason (struct target *target)
static int	cortex_m_examine_exception_reason (struct target *target)
static int	cortex_m_fast_read_all_regs (struct target *target)
static int	cortex_m_find_mem_ap (struct adiv5_dap *swjdp, struct adiv5_ap **debug_ap)
static int	cortex_m_halt (struct target *target)
static int	cortex_m_handle_target_request (void *priv)
static bool	cortex_m_has_tz (struct target *target)
static int	cortex_m_hit_watchpoint (struct target *target, struct watchpoint **hit_watchpoint)
static int	cortex_m_init_arch_info (struct target *target, struct cortex_m_common *cortex_m, struct adiv5_dap *dap)
static int	cortex_m_init_target (struct command_context *cmd_ctx, struct target *target)
static int	cortex_m_load_core_reg_u32 (struct target *target, uint32_t regsel, uint32_t *value)
static int	cortex_m_poll (struct target *target)
int	cortex_m_profiling (struct target *target, uint32_t *samples, uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds)
static int	cortex_m_queue_reg_read (struct target *target, uint32_t regsel, uint32_t *reg_value, uint32_t *dhcsr)
static int	cortex_m_read_dhcsr_atomic_sticky (struct target *target)
	Read DCB DHCSR register to cortex_m->dcb_dhcsr and cumulate sticky bits in cortex_m->dcb_dhcsr_cumulated_sticky. More...
static int	cortex_m_read_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
int	cortex_m_remove_breakpoint (struct target *target, struct breakpoint *breakpoint)
int	cortex_m_remove_watchpoint (struct target *target, struct watchpoint *watchpoint)
static int	cortex_m_resume (struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution)
int	cortex_m_set_breakpoint (struct target *target, struct breakpoint *breakpoint)
static int	cortex_m_set_maskints (struct target *target, bool mask)
static int	cortex_m_set_maskints_for_halt (struct target *target)
static int	cortex_m_set_maskints_for_run (struct target *target)
static int	cortex_m_set_maskints_for_step (struct target *target)
static int	cortex_m_set_watchpoint (struct target *target, struct watchpoint *watchpoint)
static int	cortex_m_single_step_core (struct target *target)
static int	cortex_m_slow_read_all_regs (struct target *target)
static int	cortex_m_soft_reset_halt (struct target *target)
static int	cortex_m_step (struct target *target, int current, target_addr_t address, int handle_breakpoints)
static int	cortex_m_store_core_reg_u32 (struct target *target, uint32_t num, uint32_t value)
static int	cortex_m_target_create (struct target *target, Jim_Interp *interp)
static int	cortex_m_target_request_data (struct target *target, uint32_t size, uint8_t *buffer)
int	cortex_m_unset_breakpoint (struct target *target, struct breakpoint *breakpoint)
static int	cortex_m_unset_watchpoint (struct target *target, struct watchpoint *watchpoint)
static int	cortex_m_verify_pointer (struct command_invocation *cmd, struct cortex_m_common *cm)
static int	cortex_m_write_debug_halt_mask (struct target *target, uint32_t mask_on, uint32_t mask_off)
static int	cortex_m_write_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)

Variables
static const struct command_registration	cortex_m_command_handlers []
static const struct command_registration	cortex_m_exec_command_handlers []
static const struct cortex_m_part_info	cortex_m_parts []
struct target_type	cortexm_target
static const struct dwt_reg	dwt_base_regs []
static const struct dwt_reg	dwt_comp []
static const struct reg_arch_type	dwt_reg_type

Macro Definition Documentation

DHCSR_S_REGRDY_TIMEOUT

#define DHCSR_S_REGRDY_TIMEOUT   (500)

Definition at line 46 of file cortex_m.c.

DWT_COMPARATOR

#define DWT_COMPARATOR

(

i

)

Value:

        { DWT_COMP0 + 0x10 * (i), "dwt_" #i "_comp", 32, }, \
        { DWT_MASK0 + 0x10 * (i), "dwt_" #i "_mask", 4, }, \
        { DWT_FUNCTION0 + 0x10 * (i), "dwt_" #i "_function", 32, }

MVFR0

#define MVFR0   0xe000ef40

Definition at line 2289 of file cortex_m.c.

MVFR0_DEFAULT_M4

#define MVFR0_DEFAULT_M4   0x10110021

Definition at line 2292 of file cortex_m.c.

MVFR0_DEFAULT_M7_DP

#define MVFR0_DEFAULT_M7_DP   0x10110221

Definition at line 2296 of file cortex_m.c.

MVFR0_DEFAULT_M7_SP

#define MVFR0_DEFAULT_M7_SP   0x10110021

Definition at line 2295 of file cortex_m.c.

MVFR1

#define MVFR1   0xe000ef44

Definition at line 2290 of file cortex_m.c.

MVFR1_DEFAULT_M4

#define MVFR1_DEFAULT_M4   0x11000011

Definition at line 2293 of file cortex_m.c.

MVFR1_DEFAULT_M7_DP

#define MVFR1_DEFAULT_M7_DP   0x12000011

Definition at line 2298 of file cortex_m.c.

MVFR1_DEFAULT_M7_SP

#define MVFR1_DEFAULT_M7_SP   0x11000011

Definition at line 2297 of file cortex_m.c.

Function Documentation

COMMAND_HANDLER() [1/3]

COMMAND_HANDLER

(

handle_cortex_m_mask_interrupts_command

)

Definition at line 2747 of file cortex_m.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, CMD_NAME, command_print(), CORTEX_M_ISRMASK_AUTO, CORTEX_M_ISRMASK_OFF, CORTEX_M_ISRMASK_ON, CORTEX_M_ISRMASK_STEPONLY, cortex_m_set_maskints_for_halt(), cortex_m_verify_pointer(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), cortex_m_common::isrmasking_mode, jim_nvp_name2value_simple(), jim_nvp_value2name_simple(), jim_nvp::name, NULL, target::state, TARGET_HALTED, target_to_cm(), and jim_nvp::value.

COMMAND_HANDLER() [2/3]

COMMAND_HANDLER

(

handle_cortex_m_reset_config_command

)

Definition at line 2786 of file cortex_m.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), CORTEX_M_RESET_SYSRESETREQ, CORTEX_M_RESET_VECTRESET, cortex_m_verify_pointer(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), LOG_TARGET_WARNING, cortex_m_common::soft_reset_config, target_to_cm(), target_was_examined(), and cortex_m_common::vectreset_supported.

COMMAND_HANDLER() [3/3]

COMMAND_HANDLER

(

handle_cortex_m_vector_catch_command

)

Definition at line 2658 of file cortex_m.c.

References cortex_m_common::armv7m, ARRAY_SIZE, CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), cortex_m_verify_pointer(), DCB_DEMCR, armv7m_common::debug_ap, armv7m_common::demcr, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, get_current_target(), LOG_TARGET_ERROR, mask, mem_ap_read_atomic_u32(), mem_ap_write_u32(), name, target_to_cm(), target_was_examined(), VC_BUSERR, VC_CHKERR, VC_CORERESET, VC_HARDERR, VC_INTERR, VC_MMERR, VC_NOCPERR, VC_STATERR, and vec_ids.

cortex_m_add_breakpoint()

int cortex_m_add_breakpoint	(	struct target *	target,
		struct breakpoint *	breakpoint
	)

Definition at line 1718 of file cortex_m.c.

References cortex_m_set_breakpoint(), ERROR_TARGET_RESOURCE_NOT_AVAILABLE, breakpoint::length, LOG_TARGET_DEBUG, and LOG_TARGET_INFO.

cortex_m_add_watchpoint()

int cortex_m_add_watchpoint	(	struct target *	target,
		struct watchpoint *	watchpoint
	)

Definition at line 1857 of file cortex_m.c.

References watchpoint::address, cortex_m_common::dwt_comp_available, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, watchpoint::length, LOG_TARGET_DEBUG, watchpoint::mask, mask, target_to_cm(), and watchpoint::value.

cortex_m_assert_reset()

static int cortex_m_assert_reset ( struct target *  target )

static

Definition at line 1395 of file cortex_m.c.

References adapter_assert_reset(), AIRCR_SYSRESETREQ, AIRCR_VECTKEY, AIRCR_VECTRESET, armv7m_common::arm, cortex_m_common::armv7m, C_DEBUGEN, C_HALT, C_MASKINTS, C_STEP, arm::core_cache, cortex_m_clear_halt(), cortex_m_read_dhcsr_atomic_sticky(), CORTEX_M_RESET_SYSRESETREQ, CORTEX_M_RESET_VECTRESET, cortex_m_set_maskints_for_run(), cortex_m_write_debug_halt_mask(), adiv5_ap::dap, dap_dp_init_or_reconnect(), DCB_DCRDR, DCB_DEMCR, cortex_m_common::dcb_dhcsr, armv7m_common::debug_ap, target::defer_examine, ERROR_FAIL, ERROR_OK, jtag_get_reset_config(), jtag_reset_config, jtag_sleep(), LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_INFO, LOG_TARGET_WARNING, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), mem_ap_write_u32(), NVIC_AIRCR, register_cache_invalidate(), target::reset_halt, RESET_HAS_SRST, RESET_SRST_NO_GATING, S_SLEEP, cortex_m_common::soft_reset_config, srst_asserted, target::state, TARGET_EVENT_RESET_ASSERT, target_examine_one(), target_halt(), target_handle_event(), target_has_event_action(), TARGET_RESET, target_state_name(), target_to_cm(), target_was_examined(), TRCENA, VC_BUSERR, VC_CORERESET, VC_HARDERR, and cortex_m_common::vectreset_supported.

cortex_m_clear_halt()

static int cortex_m_clear_halt ( struct target *  target )

static

Definition at line 508 of file cortex_m.c.

References cortex_m_common::armv7m, C_HALT, C_STEP, cortex_m_write_debug_halt_mask(), armv7m_common::debug_ap, ERROR_OK, LOG_TARGET_DEBUG, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), NVIC_DFSR, cortex_m_common::nvic_dfsr, and target_to_cm().

Referenced by cortex_m_assert_reset(), cortex_m_debug_entry(), and cortex_m_single_step_core().

cortex_m_cumulate_dhcsr_sticky()

static void cortex_m_cumulate_dhcsr_sticky ( struct cortex_m_common *  cortex_m, uint32_t  dhcsr  )

inlinestatic

DCB DHCSR register contains S_RETIRE_ST and S_RESET_ST bits cleared on a read.

Call this helper function each time DHCSR is read to preserve S_RESET_ST state in case of a reset event was detected.

Definition at line 123 of file cortex_m.c.

References cortex_m_common::dcb_dhcsr_cumulated_sticky.

Referenced by cortex_m_examine(), cortex_m_fast_read_all_regs(), cortex_m_load_core_reg_u32(), and cortex_m_read_dhcsr_atomic_sticky().

cortex_m_dcc_read()

static int cortex_m_dcc_read ( struct target *  target, uint8_t *  value, uint8_t *  ctrl  )

static

Definition at line 2506 of file cortex_m.c.

References ctrl, DCB_DCRDR, armv7m_common::debug_ap, ERROR_OK, LOG_TARGET_DEBUG, mem_ap_read_buf_noincr(), mem_ap_write_buf_noincr(), target_buffer_get_u16(), target_buffer_set_u16(), and target_to_armv7m().

Referenced by cortex_m_handle_target_request(), and cortex_m_target_request_data().

cortex_m_deassert_reset()

static int cortex_m_deassert_reset ( struct target *  target )

static

Definition at line 1565 of file cortex_m.c.

References adapter_deassert_reset(), cortex_m_common::armv7m, adiv5_ap::dap, dap_dp_init_or_reconnect(), armv7m_common::debug_ap, ERROR_OK, jtag_get_reset_config(), jtag_reset_config, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, RESET_HAS_SRST, RESET_SRST_NO_GATING, target_state_name(), target_to_cm(), and target_was_examined().

cortex_m_debug_entry()

static int cortex_m_debug_entry ( struct target *  target )

static

Definition at line 776 of file cortex_m.c.

References arm::arch, armv7m_common::arm, ARM_ARCH_V8M, ARM_MODE_HANDLER, arm_mode_name(), ARM_MODE_THREAD, ARM_MODE_USER_THREAD, cortex_m_common::armv7m, ARMV7M_CONTROL, armv7m_msp_reg_map, armv7m_psp_reg_map, buf_get_u32(), arm::core_cache, arm::core_mode, cortex_m_clear_halt(), cortex_m_examine_exception_reason(), cortex_m_fast_read_all_regs(), cortex_m_read_dhcsr_atomic_sticky(), cortex_m_set_maskints_for_halt(), cortex_m_slow_read_all_regs(), arm::cpsr, DCB_DSCSR, armv7m_common::debug_ap, DSCSR_CDS, ERROR_OK, ERROR_TIMEOUT_REACHED, armv7m_common::examine_debug_reason, armv7m_common::exception_number, LOG_TARGET_DEBUG, arm::map, mem_ap_read_u32(), arm::pc, armv7m_common::post_debug_entry, reg_cache::reg_list, cortex_m_common::slow_register_read, target_state_name(), target_to_cm(), and reg::value.

Referenced by cortex_m_poll(), and cortex_m_step().

cortex_m_deinit_target()

void cortex_m_deinit_target

(

struct target *

target

)

Definition at line 2002 of file cortex_m.c.

References armv7m_free_reg_cache(), cortex_m_dwt_free(), dap_put_ap(), armv7m_common::debug_ap, cortex_m_common::fp_comparator_list, armv7m_common::is_hla_target, target::private_config, target_to_armv7m(), and target_to_cm().

cortex_m_dwt_addreg()

static void cortex_m_dwt_addreg ( struct target *  t, struct reg *  r, const struct dwt_reg *  d  )

static

Definition at line 2162 of file cortex_m.c.

References dwt_reg::addr, reg::arch_info, dwt_reg_type, dwt_reg::name, reg::name, dwt_reg::size, reg::size, state, reg::type, and reg::value.

Referenced by cortex_m_dwt_setup().

cortex_m_dwt_free()

static void cortex_m_dwt_free ( struct target *  target )

static

Definition at line 2251 of file cortex_m.c.

References reg::arch_info, cortex_m_common::dwt_cache, cortex_m_common::dwt_comparator_list, cortex_m_common::dwt_num_comp, NULL, reg_cache::num_regs, target::reg_cache, reg_cache::reg_list, register_unlink_cache(), and target_to_cm().

Referenced by cortex_m_deinit_target(), and cortex_m_examine().

cortex_m_dwt_get_reg()

static int cortex_m_dwt_get_reg ( struct reg *  reg )

static

Definition at line 2097 of file cortex_m.c.

References reg::arch_info, buf_set_u32(), ERROR_OK, state, and target_read_u32().

cortex_m_dwt_set_reg()

static int cortex_m_dwt_set_reg ( struct reg *  reg, uint8_t *  buf  )

static

Definition at line 2110 of file cortex_m.c.

References reg::arch_info, buf_get_u32(), reg::size, state, and target_write_u32().

cortex_m_dwt_setup()

static void cortex_m_dwt_setup ( struct cortex_m_common *  cm, struct target *  target  )

static

Definition at line 2179 of file cortex_m.c.

References cortex_m_dwt_addreg(), dwt_base_regs, cortex_m_common::dwt_cache, dwt_comp, DWT_COMP0, cortex_m_common::dwt_comp_available, cortex_m_dwt_comparator::dwt_comparator_address, cortex_m_common::dwt_comparator_list, DWT_CTRL, DWT_DEVARCH, cortex_m_common::dwt_devarch, cortex_m_common::dwt_num_comp, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, reg_cache::name, reg_cache::num_regs, target::reg_cache, reg_cache::reg_list, register_get_last_cache_p(), target_read_u32(), and target_write_u32().

Referenced by cortex_m_examine().

cortex_m_enable_breakpoints()

void cortex_m_enable_breakpoints

(

struct target *

target

)

Definition at line 1087 of file cortex_m.c.

References target::breakpoints, cortex_m_set_breakpoint(), breakpoint::is_set, and breakpoint::next.

Referenced by adapter_resume(), and cortex_m_resume().

cortex_m_enable_fpb()

static int cortex_m_enable_fpb ( struct target *  target )

static

Definition at line 556 of file cortex_m.c.

References ERROR_FAIL, ERROR_OK, FP_CTRL, target_read_u32(), and target_write_u32().

Referenced by cortex_m_endreset_event(), and cortex_m_set_breakpoint().

cortex_m_enable_watchpoints()

void cortex_m_enable_watchpoints

(

struct target *

target

)

Definition at line 1954 of file cortex_m.c.

References cortex_m_set_watchpoint(), watchpoint::is_set, watchpoint::next, and target::watchpoints.

Referenced by adapter_resume(), and cortex_m_resume().

cortex_m_endreset_event()

static int cortex_m_endreset_event ( struct target *  target )

static

Definition at line 574 of file cortex_m.c.

References armv7m_common::arm, cortex_m_common::armv7m, C_DEBUGEN, C_HALT, C_MASKINTS, C_STEP, cortex_m_dwt_comparator::comp, arm::core_cache, cortex_m_enable_fpb(), cortex_m_read_dhcsr_atomic_sticky(), cortex_m_set_maskints_for_run(), cortex_m_write_debug_halt_mask(), arm::dap, dap_run(), DCB_DCRDR, DCB_DEMCR, cortex_m_common::dcb_dhcsr, armv7m_common::debug_ap, armv7m_common::demcr, cortex_m_dwt_comparator::dwt_comparator_address, cortex_m_common::dwt_comparator_list, cortex_m_common::dwt_num_comp, ERROR_OK, cortex_m_common::fp_comparator_list, cortex_m_common::fp_num_code, cortex_m_common::fp_num_lit, cortex_m_common::fpb_enabled, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, mask, mem_ap_read_atomic_u32(), mem_ap_write_u32(), register_cache_invalidate(), target_to_cm(), target_write_u32(), and TRCENA.

Referenced by cortex_m_poll().

cortex_m_examine()

int cortex_m_examine

(

struct target *

target

)

Definition at line 2309 of file cortex_m.c.

References cortex_m_common::apsel, arm::arch, cortex_m_part_info::arch, armv7m_common::arm, ARM_ARCH_V7M, ARM_CPUID_PARTNO_MASK, ARM_CPUID_PARTNO_POS, cortex_m_common::armv7m, ARMV7M_FPU_FIRST_REG, ARMV7M_FPU_LAST_REG, armv7m_trace_itm_config(), ARMV8M_FIRST_REG, ARMV8M_LAST_REG, ARRAY_SIZE, C_DEBUGEN, C_HALT, C_MASKINTS, C_STEP, arm::core_cache, cortex_m_common::core_info, CORTEX_M7_PARTNO, cortex_m_cumulate_dhcsr_sticky(), cortex_m_dwt_free(), cortex_m_dwt_setup(), CORTEX_M_F_HAS_FPV4, CORTEX_M_F_HAS_FPV5, CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K, cortex_m_find_mem_ap(), cortex_m_has_tz(), cortex_m_parts, CPUID, arm::dap, dap_get_ap(), DBGKEY, DCB_DEMCR, DCB_DHCSR, cortex_m_common::dcb_dhcsr, cortex_m_common::dcb_dhcsr_sticky_is_recent, armv7m_common::debug_ap, armv7m_common::demcr, DP_APSEL_INVALID, cortex_m_common::dwt_num_comp, ERROR_FAIL, ERROR_OK, reg::exist, cortex_m_part_info::flags, FP_COMP0, cortex_m_common::fp_comparator_list, FP_CTRL, armv7m_common::fp_feature, FP_NONE, cortex_m_common::fp_num_code, cortex_m_common::fp_num_lit, cortex_m_common::fp_rev, cortex_m_common::fpb_enabled, cortex_m_fp_comparator::fpcr_address, FPCR_CODE, FPCR_LITERAL, FPV4_SP, FPV5_DP, FPV5_SP, armv7m_common::is_hla_target, armv7m_trace_config::itm_deferred_config, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_INFO, LOG_TARGET_WARNING, cortex_m_common::maskints_erratum, mem_ap_init(), adiv5_ap::memaccess_tck, MVFR0, MVFR0_DEFAULT_M4, MVFR0_DEFAULT_M7_DP, MVFR0_DEFAULT_M7_SP, MVFR1, MVFR1_DEFAULT_M4, MVFR1_DEFAULT_M7_DP, MVFR1_DEFAULT_M7_SP, cortex_m_part_info::name, partno, reg_cache::reg_list, S_RESET_ST, adiv5_ap::tar_autoincr_block, target_read_u32(), target_set_examined(), target_to_armv7m(), target_to_cm(), target_was_examined(), target_write_u32(), armv7m_common::trace_config, TRCENA, cortex_m_fp_comparator::type, and cortex_m_common::vectreset_supported.

cortex_m_examine_debug_reason()

static int cortex_m_examine_debug_reason ( struct target *  target )

static

Definition at line 674 of file cortex_m.c.

References DBG_REASON_BREAKPOINT, DBG_REASON_DBGRQ, DBG_REASON_SINGLESTEP, DBG_REASON_UNDEFINED, DBG_REASON_WATCHPOINT, DBG_REASON_WPTANDBKPT, target::debug_reason, DFSR_BKPT, DFSR_DWTTRAP, DFSR_EXTERNAL, DFSR_VCATCH, ERROR_OK, cortex_m_common::nvic_dfsr, and target_to_cm().

Referenced by cortex_m_init_arch_info().

cortex_m_examine_exception_reason()

static int cortex_m_examine_exception_reason ( struct target *  target )

static

Definition at line 700 of file cortex_m.c.

References armv7m_common::arm, armv7m_exception_string(), arm::dap, dap_run(), armv7m_common::debug_ap, ERROR_OK, armv7m_common::exception_number, LOG_TARGET_DEBUG, mem_ap_read_atomic_u32(), mem_ap_read_u32(), NVIC_BFAR, NVIC_CFSR, NVIC_DFSR, NVIC_HFSR, NVIC_MMFAR, NVIC_SFAR, NVIC_SFSR, NVIC_SHCSR, and target_to_armv7m().

Referenced by cortex_m_debug_entry().

cortex_m_fast_read_all_regs()

static int cortex_m_fast_read_all_regs ( struct target *  target )

static

Definition at line 243 of file cortex_m.c.

References armv7m_common::arm, ARMV7M_CORE_FIRST_REG, ARMV7M_FPU_FIRST_REG, ARMV7M_FPU_LAST_REG, ARMV7M_LAST_REG, armv7m_map_id_to_regsel(), armv7m_map_reg_packing(), buf_cpy(), buf_set_u32(), arm::core_cache, cortex_m_cumulate_dhcsr_sticky(), cortex_m_queue_reg_read(), adiv5_ap::dap, dap_run(), target::dbg_msg_enabled, DCB_DCRDR, armv7m_common::debug_ap, reg::dirty, ERROR_OK, ERROR_TIMEOUT_REACHED, reg::exist, LOG_TARGET_DEBUG, mem_ap_read_u32(), mem_ap_write_atomic_u32(), reg_cache::num_regs, offset, reg_cache::reg_list, S_REGRDY, reg::size, target_to_armv7m(), target_to_cm(), reg::valid, and reg::value.

Referenced by cortex_m_debug_entry().

cortex_m_find_mem_ap()

static int cortex_m_find_mem_ap ( struct adiv5_dap *  swjdp, struct adiv5_ap **  debug_ap  )

static

Definition at line 2300 of file cortex_m.c.

References AP_TYPE_AHB3_AP, AP_TYPE_AHB5_AP, dap_find_get_ap(), armv7m_common::debug_ap, and ERROR_OK.

Referenced by cortex_m_examine().

cortex_m_halt()

static int cortex_m_halt ( struct target *  target )

static

Definition at line 984 of file cortex_m.c.

References C_HALT, cortex_m_set_maskints_for_halt(), cortex_m_write_debug_halt_mask(), DBG_REASON_DBGRQ, target::debug_reason, ERROR_OK, ERROR_TARGET_FAILURE, jtag_get_reset_config(), jtag_get_srst(), LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, RESET_SRST_PULLS_TRST, target::state, TARGET_HALTED, TARGET_RESET, target_state_name(), and TARGET_UNKNOWN.

cortex_m_handle_target_request()

static int cortex_m_handle_target_request ( void *  priv )

static

Definition at line 2552 of file cortex_m.c.

References cortex_m_dcc_read(), ctrl, target::dbg_msg_enabled, ERROR_OK, priv, target::state, target_request(), TARGET_RUNNING, and target_was_examined().

Referenced by cortex_m_init_arch_info().

cortex_m_has_tz()

static bool cortex_m_has_tz ( struct target *  target )

static

Definition at line 2273 of file cortex_m.c.

References arm::arch, armv7m_common::arm, ARM_ARCH_V8M, DAUTHSTATUS, DAUTHSTATUS_SID_MASK, ERROR_OK, LOG_WARNING, target_read_u32(), and target_to_armv7m().

Referenced by cortex_m_examine().

cortex_m_hit_watchpoint()

static int cortex_m_hit_watchpoint ( struct target *  target, struct watchpoint **  hit_watchpoint  )

static

Definition at line 1925 of file cortex_m.c.

References BIT, DBG_REASON_WATCHPOINT, target::debug_reason, cortex_m_dwt_comparator::dwt_comparator_address, cortex_m_common::dwt_comparator_list, ERROR_FAIL, ERROR_OK, watchpoint::next, target_read_u32(), target_to_cm(), and target::watchpoints.

cortex_m_init_arch_info()

static int cortex_m_init_arch_info ( struct target *  target, struct cortex_m_common *  cortex_m, struct adiv5_dap *  dap  )

static

Definition at line 2589 of file cortex_m.c.

References armv7m_common::arm, cortex_m_common::armv7m, armv7m_init_arch_info(), cortex_m_examine_debug_reason(), cortex_m_handle_target_request(), cortex_m_load_core_reg_u32(), CORTEX_M_RESET_VECTRESET, cortex_m_store_core_reg_u32(), arm::dap, ERROR_OK, armv7m_common::examine_debug_reason, armv7m_common::load_core_reg_u32, NULL, armv7m_common::post_debug_entry, armv7m_common::pre_restore_context, cortex_m_common::soft_reset_config, armv7m_common::store_core_reg_u32, target_register_timer_callback(), and TARGET_TIMER_TYPE_PERIODIC.

Referenced by cortex_m_target_create().

cortex_m_init_target()

static int cortex_m_init_target ( struct command_context *  cmd_ctx, struct target *  target  )

static

Definition at line 1994 of file cortex_m.c.

References arm_semihosting_init(), armv7m_build_reg_cache(), and ERROR_OK.

cortex_m_load_core_reg_u32()

static int cortex_m_load_core_reg_u32 ( struct target *  target, uint32_t  regsel, uint32_t *  value  )

static

Definition at line 146 of file cortex_m.c.

References cortex_m_cumulate_dhcsr_sticky(), target::dbg_msg_enabled, DCB_DCRDR, DCB_DCRSR, DCB_DHCSR, cortex_m_common::dcb_dhcsr, armv7m_common::debug_ap, DHCSR_S_REGRDY_TIMEOUT, ERROR_OK, ERROR_TIMEOUT_REACHED, keep_alive(), LOG_TARGET_ERROR, mem_ap_read_atomic_u32(), mem_ap_read_u32(), mem_ap_write_atomic_u32(), mem_ap_write_u32(), S_REGRDY, cortex_m_common::slow_register_read, target_to_armv7m(), target_to_cm(), and timeval_ms().

Referenced by cortex_m_init_arch_info().

cortex_m_poll()

static int cortex_m_poll ( struct target *  target )

static

Definition at line 874 of file cortex_m.c.

References armv7m_common::arm, arm_semihosting(), cortex_m_common::armv7m, C_HALT, arm::core_cache, cortex_m_debug_entry(), cortex_m_endreset_event(), cortex_m_read_dhcsr_atomic_sticky(), cortex_m_write_debug_halt_mask(), DBG_REASON_DBGRQ, cortex_m_common::dcb_dhcsr, cortex_m_common::dcb_dhcsr_cumulated_sticky, target::debug_reason, ERROR_FAIL, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_INFO, LOG_TARGET_WARNING, register_cache_invalidate(), S_HALT, S_LOCKUP, S_RESET_ST, S_RETIRE_ST, S_SLEEP, target::state, target_call_event_callbacks(), TARGET_DEBUG_RUNNING, TARGET_EVENT_DEBUG_HALTED, TARGET_EVENT_HALTED, TARGET_EVENT_RESUMED, TARGET_HALTED, TARGET_RESET, TARGET_RUNNING, target_to_cm(), and TARGET_UNKNOWN.

Referenced by cortex_m_soft_reset_halt().

cortex_m_profiling()

int cortex_m_profiling	(	struct target *	target,
		uint32_t *	samples,
		uint32_t	max_num_samples,
		uint32_t *	num_samples,
		uint32_t	seconds
	)

Definition at line 2019 of file cortex_m.c.

References armv7m_common::debug_ap, DWT_PCSR, ERROR_OK, gettimeofday(), LOG_TARGET_ERROR, LOG_TARGET_INFO, mem_ap_read_buf_noincr(), NULL, target::state, TARGET_HALTED, target_poll(), target_profiling_default(), target_read_u32(), target_resume(), target_to_armv7m(), timeval_add_time(), and timeval_compare().

cortex_m_queue_reg_read()

static int cortex_m_queue_reg_read ( struct target *  target, uint32_t  regsel, uint32_t *  reg_value, uint32_t *  dhcsr  )

static

Definition at line 226 of file cortex_m.c.

References DCB_DCRDR, DCB_DCRSR, DCB_DHCSR, armv7m_common::debug_ap, ERROR_OK, mem_ap_read_u32(), mem_ap_write_u32(), and target_to_armv7m().

Referenced by cortex_m_fast_read_all_regs().

cortex_m_read_dhcsr_atomic_sticky()

static int cortex_m_read_dhcsr_atomic_sticky ( struct target *  target )

static

Read DCB DHCSR register to cortex_m->dcb_dhcsr and cumulate sticky bits in cortex_m->dcb_dhcsr_cumulated_sticky.

Definition at line 132 of file cortex_m.c.

References cortex_m_cumulate_dhcsr_sticky(), DCB_DHCSR, cortex_m_common::dcb_dhcsr, armv7m_common::debug_ap, ERROR_OK, mem_ap_read_atomic_u32(), target_to_armv7m(), and target_to_cm().

Referenced by cortex_m_assert_reset(), cortex_m_debug_entry(), cortex_m_endreset_event(), cortex_m_poll(), cortex_m_soft_reset_halt(), cortex_m_step(), and cortex_m_store_core_reg_u32().

cortex_m_read_memory()

static int cortex_m_read_memory ( struct target *  target, target_addr_t  address, uint32_t  size, uint32_t  count, uint8_t *  buffer  )

static

Definition at line 1966 of file cortex_m.c.

References arm::arch, armv7m_common::arm, ARM_ARCH_V6M, buffer, count, armv7m_common::debug_ap, ERROR_TARGET_UNALIGNED_ACCESS, mem_ap_read_buf(), size, and target_to_armv7m().

cortex_m_remove_breakpoint()

int cortex_m_remove_breakpoint	(	struct target *	target,
		struct breakpoint *	breakpoint
	)

Definition at line 1733 of file cortex_m.c.

References cortex_m_unset_breakpoint(), ERROR_OK, and breakpoint::is_set.

cortex_m_remove_watchpoint()

int cortex_m_remove_watchpoint	(	struct target *	target,
		struct watchpoint *	watchpoint
	)

Definition at line 1906 of file cortex_m.c.

References cortex_m_unset_watchpoint(), cortex_m_common::dwt_comp_available, ERROR_OK, ERROR_TARGET_NOT_HALTED, watchpoint::is_set, LOG_TARGET_DEBUG, LOG_TARGET_WARNING, target::state, TARGET_HALTED, and target_to_cm().

cortex_m_resume()

static int cortex_m_resume ( struct target *  target, int  current, target_addr_t  address, int  handle_breakpoints, int  debug_execution  )

static

Definition at line 1099 of file cortex_m.c.

References breakpoint::address, armv7m_common::arm, armv7m_maybe_skip_bkpt_inst(), ARMV7M_PRIMASK, armv7m_restore_context(), breakpoint_find(), buf_get_u32(), buf_set_u32(), C_HALT, arm::core_cache, cortex_m_enable_breakpoints(), cortex_m_enable_watchpoints(), cortex_m_set_breakpoint(), cortex_m_set_maskints_for_run(), cortex_m_single_step_core(), cortex_m_unset_breakpoint(), cortex_m_write_debug_halt_mask(), arm::cpsr, DBG_REASON_NOTHALTED, target::debug_reason, reg::dirty, ERROR_OK, ERROR_TARGET_NOT_HALTED, LOG_TARGET_DEBUG, LOG_TARGET_WARNING, NULL, arm::pc, reg_cache::reg_list, register_cache_invalidate(), target::state, TARGET_ADDR_FMT, target_call_event_callbacks(), TARGET_DEBUG_RUNNING, TARGET_EVENT_DEBUG_RESUMED, TARGET_EVENT_RESUMED, target_free_all_working_areas(), TARGET_HALTED, TARGET_RUNNING, target_to_armv7m(), breakpoint::unique_id, reg::valid, and reg::value.

cortex_m_set_breakpoint()

int cortex_m_set_breakpoint	(	struct target *	target,
		struct breakpoint *	breakpoint
	)

Definition at line 1592 of file cortex_m.c.

References breakpoint::address, ARMV5_T_BKPT, BKPT_HARD, BKPT_SOFT, breakpoint_hw_set(), buf_set_u32(), cortex_m_enable_fpb(), ERROR_FAIL, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, cortex_m_common::fp_comparator_list, cortex_m_common::fp_num_code, cortex_m_common::fp_rev, cortex_m_common::fpb_enabled, cortex_m_fp_comparator::fpcr_address, FPCR_REPLACE_BKPT_HIGH, FPCR_REPLACE_BKPT_LOW, cortex_m_fp_comparator::fpcr_value, breakpoint::is_set, breakpoint::length, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, breakpoint::number, breakpoint::orig_instr, TARGET_ADDR_FMT, target_read_memory(), target_to_cm(), target_write_memory(), target_write_u32(), breakpoint::type, breakpoint::unique_id, and cortex_m_fp_comparator::used.

Referenced by adapter_resume(), adapter_step(), cortex_m_add_breakpoint(), cortex_m_enable_breakpoints(), cortex_m_resume(), and cortex_m_step().

cortex_m_set_maskints()

static int cortex_m_set_maskints ( struct target *  target, bool  mask  )

static

Definition at line 431 of file cortex_m.c.

References C_MASKINTS, cortex_m_write_debug_halt_mask(), cortex_m_common::dcb_dhcsr, ERROR_OK, mask, and target_to_cm().

Referenced by cortex_m_set_maskints_for_halt(), cortex_m_set_maskints_for_run(), and cortex_m_set_maskints_for_step().

cortex_m_set_maskints_for_halt()

static int cortex_m_set_maskints_for_halt ( struct target *  target )

static

Definition at line 440 of file cortex_m.c.

References CORTEX_M_ISRMASK_AUTO, CORTEX_M_ISRMASK_OFF, CORTEX_M_ISRMASK_ON, CORTEX_M_ISRMASK_STEPONLY, cortex_m_set_maskints(), ERROR_OK, cortex_m_common::isrmasking_mode, cortex_m_common::maskints_erratum, and target_to_cm().

Referenced by COMMAND_HANDLER(), cortex_m_debug_entry(), cortex_m_halt(), and cortex_m_step().

cortex_m_set_maskints_for_run()

static int cortex_m_set_maskints_for_run ( struct target *  target )

static

Definition at line 464 of file cortex_m.c.

References CORTEX_M_ISRMASK_AUTO, CORTEX_M_ISRMASK_OFF, CORTEX_M_ISRMASK_ON, CORTEX_M_ISRMASK_STEPONLY, cortex_m_set_maskints(), ERROR_OK, cortex_m_common::isrmasking_mode, and target_to_cm().

Referenced by cortex_m_assert_reset(), cortex_m_endreset_event(), cortex_m_resume(), and cortex_m_step().

cortex_m_set_maskints_for_step()

static int cortex_m_set_maskints_for_step ( struct target *  target )

static

Definition at line 486 of file cortex_m.c.

References CORTEX_M_ISRMASK_AUTO, CORTEX_M_ISRMASK_OFF, CORTEX_M_ISRMASK_ON, CORTEX_M_ISRMASK_STEPONLY, cortex_m_set_maskints(), ERROR_OK, cortex_m_common::isrmasking_mode, and target_to_cm().

Referenced by cortex_m_step().

cortex_m_set_watchpoint()

static int cortex_m_set_watchpoint ( struct target *  target, struct watchpoint *  watchpoint  )

static

Definition at line 1741 of file cortex_m.c.

References watchpoint::address, cortex_m_dwt_comparator::comp, cortex_m_dwt_comparator::dwt_comparator_address, cortex_m_common::dwt_comparator_list, cortex_m_common::dwt_devarch, DWT_DEVARCH_ARMV8M, cortex_m_common::dwt_num_comp, ERROR_FAIL, ERROR_OK, cortex_m_dwt_comparator::function, watchpoint::length, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, cortex_m_dwt_comparator::mask, mask, watchpoint::rw, target_to_cm(), target_write_u32(), watchpoint::unique_id, cortex_m_dwt_comparator::used, watchpoint_set(), WPT_ACCESS, WPT_READ, and WPT_WRITE.

Referenced by cortex_m_enable_watchpoints().

cortex_m_single_step_core()

static int cortex_m_single_step_core ( struct target *  target )

static

Definition at line 531 of file cortex_m.c.

References C_HALT, C_MASKINTS, C_STEP, cortex_m_clear_halt(), cortex_m_write_debug_halt_mask(), cortex_m_common::dcb_dhcsr, ERROR_OK, LOG_TARGET_DEBUG, and target_to_cm().

Referenced by cortex_m_resume().

cortex_m_slow_read_all_regs()

static int cortex_m_slow_read_all_regs ( struct target *  target )

static

Definition at line 201 of file cortex_m.c.

References armv7m_common::arm, ARM_MODE_ANY, arm::core_cache, ERROR_OK, reg::exist, LOG_TARGET_DEBUG, reg_cache::num_regs, arm::read_core_reg, reg_cache::reg_list, cortex_m_common::slow_register_read, target_to_armv7m(), and target_to_cm().

Referenced by cortex_m_debug_entry().

cortex_m_soft_reset_halt()

static int cortex_m_soft_reset_halt ( struct target *  target )

static

Definition at line 1022 of file cortex_m.c.

References AIRCR_VECTKEY, AIRCR_VECTRESET, alive_sleep(), armv7m_common::arm, cortex_m_common::armv7m, C_MASKINTS, C_STEP, arm::core_cache, cortex_m_poll(), cortex_m_read_dhcsr_atomic_sticky(), cortex_m_write_debug_halt_mask(), DCB_DEMCR, cortex_m_common::dcb_dhcsr, armv7m_common::debug_ap, DFSR_VCATCH, ERROR_FAIL, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), mem_ap_write_u32(), NVIC_AIRCR, NVIC_DFSR, cortex_m_common::nvic_dfsr, register_cache_invalidate(), S_HALT, target::state, TARGET_RESET, target_to_cm(), TRCENA, VC_BUSERR, VC_CORERESET, VC_HARDERR, and cortex_m_common::vectreset_supported.

cortex_m_step()

static int cortex_m_step ( struct target *  target, int  current, target_addr_t  address, int  handle_breakpoints  )

static

Definition at line 1204 of file cortex_m.c.

References armv7m_common::arm, cortex_m_common::armv7m, armv7m_maybe_skip_bkpt_inst(), armv7m_restore_context(), BKPT_HARD, BKPT_SOFT, breakpoint_add(), breakpoint_find(), breakpoint_remove(), buf_get_u32(), buf_set_u32(), C_HALT, C_MASKINTS, C_STEP, arm::core_cache, cortex_m_debug_entry(), CORTEX_M_ISRMASK_AUTO, cortex_m_read_dhcsr_atomic_sticky(), cortex_m_set_breakpoint(), cortex_m_set_maskints_for_halt(), cortex_m_set_maskints_for_run(), cortex_m_set_maskints_for_step(), cortex_m_unset_breakpoint(), cortex_m_write_debug_halt_mask(), DBG_REASON_NOTHALTED, DBG_REASON_SINGLESTEP, cortex_m_common::dcb_dhcsr, target::debug_reason, reg::dirty, ERROR_OK, ERROR_TARGET_NOT_HALTED, cortex_m_common::fp_rev, cortex_m_common::isrmasking_mode, LOG_TARGET_DEBUG, LOG_TARGET_WARNING, NULL, cortex_m_common::nvic_icsr, arm::pc, register_cache_invalidate(), S_HALT, target::state, target_call_event_callbacks(), TARGET_EVENT_HALTED, TARGET_EVENT_RESUMED, TARGET_HALTED, TARGET_RUNNING, target_to_cm(), TARGET_UNKNOWN, timeval_ms(), type, reg::valid, and reg::value.

cortex_m_store_core_reg_u32()

static int cortex_m_store_core_reg_u32 ( struct target *  target, uint32_t  num, uint32_t  value  )

static

Definition at line 367 of file cortex_m.c.

References cortex_m_read_dhcsr_atomic_sticky(), target::dbg_msg_enabled, DCB_DCRDR, DCB_DCRSR, cortex_m_common::dcb_dhcsr, DCRSR_WNR, armv7m_common::debug_ap, DHCSR_S_REGRDY_TIMEOUT, ERROR_OK, ERROR_TIMEOUT_REACHED, keep_alive(), LOG_TARGET_ERROR, mem_ap_read_u32(), mem_ap_write_atomic_u32(), mem_ap_write_u32(), S_REGRDY, target_to_armv7m(), target_to_cm(), and timeval_ms().

Referenced by cortex_m_init_arch_info().

cortex_m_target_create()

static int cortex_m_target_create ( struct target *  target, Jim_Interp *  interp  )

static

Definition at line 2618 of file cortex_m.c.

References adiv5_verify_config(), adiv5_private_config::ap_num, cortex_m_common::apsel, cortex_m_common::common_magic, CORTEX_M_COMMON_MAGIC, cortex_m_init_arch_info(), adiv5_private_config::dap, ERROR_FAIL, ERROR_OK, LOG_TARGET_ERROR, and target::private_config.

cortex_m_target_request_data()

static int cortex_m_target_request_data ( struct target *  target, uint32_t  size, uint8_t *  buffer  )

static

Definition at line 2535 of file cortex_m.c.

References buffer, cortex_m_dcc_read(), ctrl, ERROR_OK, and size.

cortex_m_unset_breakpoint()

int cortex_m_unset_breakpoint	(	struct target *	target,
		struct breakpoint *	breakpoint
	)

Definition at line 1677 of file cortex_m.c.

References breakpoint::address, BKPT_HARD, BKPT_SOFT, ERROR_OK, cortex_m_common::fp_comparator_list, cortex_m_common::fp_num_code, cortex_m_fp_comparator::fpcr_address, cortex_m_fp_comparator::fpcr_value, breakpoint::is_set, breakpoint::length, LOG_TARGET_DEBUG, LOG_TARGET_WARNING, breakpoint::number, breakpoint::orig_instr, TARGET_ADDR_FMT, target_to_cm(), target_write_memory(), target_write_u32(), breakpoint::type, breakpoint::unique_id, and cortex_m_fp_comparator::used.

Referenced by adapter_resume(), adapter_step(), cortex_m_remove_breakpoint(), cortex_m_resume(), and cortex_m_step().

cortex_m_unset_watchpoint()

static int cortex_m_unset_watchpoint ( struct target *  target, struct watchpoint *  watchpoint  )

static

Definition at line 1824 of file cortex_m.c.

References watchpoint::address, cortex_m_dwt_comparator::dwt_comparator_address, cortex_m_common::dwt_comparator_list, cortex_m_common::dwt_num_comp, ERROR_OK, cortex_m_dwt_comparator::function, watchpoint::is_set, LOG_TARGET_DEBUG, LOG_TARGET_WARNING, watchpoint::number, target_to_cm(), target_write_u32(), watchpoint::unique_id, and cortex_m_dwt_comparator::used.

Referenced by cortex_m_remove_watchpoint().

cortex_m_verify_pointer()

static int cortex_m_verify_pointer ( struct command_invocation *  cmd, struct cortex_m_common *  cm  )

static

Definition at line 2642 of file cortex_m.c.

References cmd, command_print(), ERROR_OK, ERROR_TARGET_INVALID, and is_cortex_m_with_dap_access().

Referenced by COMMAND_HANDLER().

cortex_m_write_debug_halt_mask()

static int cortex_m_write_debug_halt_mask ( struct target *  target, uint32_t  mask_on, uint32_t  mask_off  )

static

Definition at line 417 of file cortex_m.c.

References cortex_m_common::armv7m, C_DEBUGEN, DBGKEY, DCB_DHCSR, cortex_m_common::dcb_dhcsr, armv7m_common::debug_ap, mem_ap_write_atomic_u32(), and target_to_cm().

Referenced by cortex_m_assert_reset(), cortex_m_clear_halt(), cortex_m_endreset_event(), cortex_m_halt(), cortex_m_poll(), cortex_m_resume(), cortex_m_set_maskints(), cortex_m_single_step_core(), cortex_m_soft_reset_halt(), and cortex_m_step().

cortex_m_write_memory()

static int cortex_m_write_memory ( struct target *  target, target_addr_t  address, uint32_t  size, uint32_t  count, const uint8_t *  buffer  )

static

Definition at line 1980 of file cortex_m.c.

References arm::arch, armv7m_common::arm, ARM_ARCH_V6M, buffer, count, armv7m_common::debug_ap, ERROR_TARGET_UNALIGNED_ACCESS, mem_ap_write_buf(), size, and target_to_armv7m().

Variable Documentation

cortex_m_command_handlers

const struct command_registration cortex_m_command_handlers[]

static

Initial value:

= {
    {
        .chain = armv7m_command_handlers,
    },
    {
        .chain = armv7m_trace_command_handlers,
    },
    
    {
        .chain = arm_tpiu_deprecated_command_handlers,
    },
    
    {
        .name = "cortex_m",
        .mode = COMMAND_EXEC,
        .help = "Cortex-M command group",
        .usage = "",
        .chain = cortex_m_exec_command_handlers,
    },
    {
        .chain = rtt_target_command_handlers,
    },
    COMMAND_REGISTRATION_DONE
}

Definition at line 2786 of file cortex_m.c.

cortex_m_exec_command_handlers

const struct command_registration cortex_m_exec_command_handlers[]

static

Initial value:

= {
    {
        .name = "maskisr",
        .handler = handle_cortex_m_mask_interrupts_command,
        .mode = COMMAND_EXEC,
        .help = "mask cortex_m interrupts",
        .usage = "['auto'|'on'|'off'|'steponly']",
    },
    {
        .name = "vector_catch",
        .handler = handle_cortex_m_vector_catch_command,
        .mode = COMMAND_EXEC,
        .help = "configure hardware vectors to trigger debug entry",
        .usage = "['all'|'none'|('bus_err'|'chk_err'|...)*]",
    },
    {
        .name = "reset_config",
        .handler = handle_cortex_m_reset_config_command,
        .mode = COMMAND_ANY,
        .help = "configure software reset handling",
        .usage = "['sysresetreq'|'vectreset']",
    },
    COMMAND_REGISTRATION_DONE
}

Definition at line 2786 of file cortex_m.c.

cortex_m_parts

const struct cortex_m_part_info cortex_m_parts[]

static

Definition at line 1 of file cortex_m.c.

Referenced by cortex_m_examine().

cortexm_target

struct target_type cortexm_target

Definition at line 2786 of file cortex_m.c.

dwt_base_regs

const struct dwt_reg dwt_base_regs[]

static

Initial value:

= {
    { DWT_CTRL, "dwt_ctrl", 32, },
    
    { DWT_CYCCNT, "dwt_cyccnt", 32, },
    
}

Definition at line 2110 of file cortex_m.c.

Referenced by cortex_m_dwt_setup().

dwt_comp

const struct dwt_reg dwt_comp[]

static

Initial value:

= {
#define DWT_COMPARATOR(i) 
 
 
 
    DWT_COMPARATOR(0),
    DWT_COMPARATOR(1),
    DWT_COMPARATOR(2),
    DWT_COMPARATOR(3),
    DWT_COMPARATOR(4),
    DWT_COMPARATOR(5),
    DWT_COMPARATOR(6),
    DWT_COMPARATOR(7),
    DWT_COMPARATOR(8),
    DWT_COMPARATOR(9),
    DWT_COMPARATOR(10),
    DWT_COMPARATOR(11),
    DWT_COMPARATOR(12),
    DWT_COMPARATOR(13),
    DWT_COMPARATOR(14),
    DWT_COMPARATOR(15),
 
}

Definition at line 2110 of file cortex_m.c.

Referenced by cortex_m_dwt_setup().

dwt_reg_type

const struct reg_arch_type dwt_reg_type

static

Initial value:

= {
    .get = cortex_m_dwt_get_reg,
    .set = cortex_m_dwt_set_reg,
}

Definition at line 2110 of file cortex_m.c.

Referenced by cortex_m_dwt_addreg().