Holds the interface to ARM cores. More...

Include dependency graph for arm.h:

This graph shows which files directly or indirectly include this file:

Data Structures
struct	arm
	Represents a generic ARM core, with standard application registers. More...

struct	arm_algorithm

struct	arm_reg

Macros
#define	ARM_COMMON_MAGIC 0x0A450A45U

Enumerations
enum	{ ARM_VFP_V3_D0 = 51 , ARM_VFP_V3_D1 , ARM_VFP_V3_D2 , ARM_VFP_V3_D3 , ARM_VFP_V3_D4 , ARM_VFP_V3_D5 , ARM_VFP_V3_D6 , ARM_VFP_V3_D7 , ARM_VFP_V3_D8 , ARM_VFP_V3_D9 , ARM_VFP_V3_D10 , ARM_VFP_V3_D11 , ARM_VFP_V3_D12 , ARM_VFP_V3_D13 , ARM_VFP_V3_D14 , ARM_VFP_V3_D15 , ARM_VFP_V3_D16 , ARM_VFP_V3_D17 , ARM_VFP_V3_D18 , ARM_VFP_V3_D19 , ARM_VFP_V3_D20 , ARM_VFP_V3_D21 , ARM_VFP_V3_D22 , ARM_VFP_V3_D23 , ARM_VFP_V3_D24 , ARM_VFP_V3_D25 , ARM_VFP_V3_D26 , ARM_VFP_V3_D27 , ARM_VFP_V3_D28 , ARM_VFP_V3_D29 , ARM_VFP_V3_D30 , ARM_VFP_V3_D31 , ARM_VFP_V3_FPSCR }

enum	arm_arch { ARM_ARCH_UNKNOWN , ARM_ARCH_V4 , ARM_ARCH_V6M , ARM_ARCH_V7M , ARM_ARCH_V8M }
	ARM Architecture specifying the version and the profile. More...

enum	arm_core_type { ARM_CORE_TYPE_STD = -1 , ARM_CORE_TYPE_SEC_EXT = 1 , ARM_CORE_TYPE_VIRT_EXT , ARM_CORE_TYPE_M_PROFILE }
	Indicates what registers are in the ARM state core register set. More...

enum	arm_mode { ARM_MODE_USR = 16 , ARM_MODE_FIQ = 17 , ARM_MODE_IRQ = 18 , ARM_MODE_SVC = 19 , ARM_MODE_MON = 22 , ARM_MODE_ABT = 23 , ARM_MODE_HYP = 26 , ARM_MODE_UND = 27 , ARM_MODE_1176_MON = 28 , ARM_MODE_SYS = 31 , ARM_MODE_THREAD = 0 , ARM_MODE_USER_THREAD = 1 , ARM_MODE_HANDLER = 2 , ARMV8_64_EL0T = 0x0 , ARMV8_64_EL1T = 0x4 , ARMV8_64_EL1H = 0x5 , ARMV8_64_EL2T = 0x8 , ARMV8_64_EL2H = 0x9 , ARMV8_64_EL3T = 0xC , ARMV8_64_EL3H = 0xD , ARM_MODE_ANY = -1 }
	Represent state of an ARM core. More...

enum	arm_state { ARM_STATE_ARM , ARM_STATE_THUMB , ARM_STATE_JAZELLE , ARM_STATE_THUMB_EE , ARM_STATE_AARCH64 }
	The PSR "T" and "J" bits define the mode of "classic ARM" cores. More...

enum	arm_vfp_version { ARM_VFP_DISABLED , ARM_VFP_V1 , ARM_VFP_V2 , ARM_VFP_V3 }
	ARM vector floating point enabled, if yes which version. More...

Functions
int	arm_arch_state (struct target *target)

int	arm_blank_check_memory (struct target target, struct target_memory_check_block blocks, int num_blocks, uint8_t erased_value)
	Runs ARM code in the target to check whether a memory block holds all ones. More...

struct reg_cache *	arm_build_reg_cache (struct target target, struct arm arm)

int	arm_checksum_memory (struct target target, target_addr_t address, uint32_t count, uint32_t checksum)
	Runs ARM code in the target to calculate a CRC32 checksum. More...

void	arm_free_reg_cache (struct arm *arm)

const char *	arm_get_gdb_arch (struct target *target)

int	arm_get_gdb_reg_list (struct target target, struct reg reg_list[], int reg_list_size, enum target_register_class reg_class)

int	arm_init_arch_info (struct target target, struct arm arm)

const char *	arm_mode_name (unsigned psr_mode)
	Map PSR mode bits to the name of an ARM processor operating mode. More...

struct reg *	arm_reg_current (struct arm *arm, unsigned regnum)
	Returns handle to the register currently mapped to a given number. More...

void	arm_set_cpsr (struct arm *arm, uint32_t cpsr)
	Configures host-side ARM records to reflect the specified CPSR. More...

int	armv4_5_run_algorithm (struct target target, int num_mem_params, struct mem_param mem_params, int num_reg_params, struct reg_param reg_params, target_addr_t entry_point, target_addr_t exit_point, int timeout_ms, void arch_info)

int	armv4_5_run_algorithm_inner (struct target target, int num_mem_params, struct mem_param mem_params, int num_reg_params, struct reg_param reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void arch_info, int(run_it)(struct target target, uint32_t exit_point, int timeout_ms, void *arch_info))

struct reg_cache *	armv8_build_reg_cache (struct target *target)
	Builds cache of architecturally defined registers. More...

const char *	armv8_get_gdb_arch (struct target *target)

int	armv8_get_gdb_reg_list (struct target target, struct reg reg_list[], int reg_list_size, enum target_register_class reg_class)

struct reg *	armv8_reg_current (struct arm *arm, unsigned regnum)

static bool	is_arm (struct arm *arm)

bool	is_arm_mode (unsigned psr_mode)
	Return true iff the parameter denotes a valid ARM processor mode. More...

static struct arm *	target_to_arm (struct target *target)
	Convert target handle to generic ARM target state handle. More...

Variables
const struct command_registration	arm_all_profiles_command_handlers []

const struct command_registration	arm_command_handlers []

Detailed Description

Holds the interface to ARM cores.

At this writing, only "classic ARM" cores built on the ARMv4 register and mode model are supported. The Thumb2-only microcontroller profile support has not yet been integrated, affecting Cortex-M parts.

Definition in file arm.h.

Macro Definition Documentation

◆ ARM_COMMON_MAGIC

#define ARM_COMMON_MAGIC 0x0A450A45U

Definition at line 158 of file arm.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Enumerator
ARM_VFP_V3_D0
ARM_VFP_V3_D1
ARM_VFP_V3_D2
ARM_VFP_V3_D3
ARM_VFP_V3_D4
ARM_VFP_V3_D5
ARM_VFP_V3_D6
ARM_VFP_V3_D7
ARM_VFP_V3_D8
ARM_VFP_V3_D9
ARM_VFP_V3_D10
ARM_VFP_V3_D11
ARM_VFP_V3_D12
ARM_VFP_V3_D13
ARM_VFP_V3_D14
ARM_VFP_V3_D15
ARM_VFP_V3_D16
ARM_VFP_V3_D17
ARM_VFP_V3_D18
ARM_VFP_V3_D19
ARM_VFP_V3_D20
ARM_VFP_V3_D21
ARM_VFP_V3_D22
ARM_VFP_V3_D23
ARM_VFP_V3_D24
ARM_VFP_V3_D25
ARM_VFP_V3_D26
ARM_VFP_V3_D27
ARM_VFP_V3_D28
ARM_VFP_V3_D29
ARM_VFP_V3_D30
ARM_VFP_V3_D31
ARM_VFP_V3_FPSCR

Definition at line 102 of file arm.h.

◆ arm_arch

enum arm_arch

ARM Architecture specifying the version and the profile.

Enumerator
ARM_ARCH_UNKNOWN
ARM_ARCH_V4
ARM_ARCH_V6M
ARM_ARCH_V7M
ARM_ARCH_V8M

Definition at line 53 of file arm.h.

◆ arm_core_type

enum arm_core_type

Indicates what registers are in the ARM state core register set.

ARM_CORE_TYPE_STD indicates the standard set of 37 registers, seen on for example ARM7TDMI cores.
ARM_CORE_TYPE_SEC_EXT indicates core has security extensions, thus three more registers are shadowed for "Secure Monitor" mode.
ARM_CORE_TYPE_VIRT_EXT indicates core has virtualization extensions and also security extensions. Additional shadowed registers for "Secure Monitor" and "Hypervisor" modes.
ARM_CORE_TYPE_M_PROFILE indicates a microcontroller profile core, which only shadows SP.

Enumerator
ARM_CORE_TYPE_STD
ARM_CORE_TYPE_SEC_EXT
ARM_CORE_TYPE_VIRT_EXT
ARM_CORE_TYPE_M_PROFILE

Definition at line 45 of file arm.h.

◆ arm_mode

enum arm_mode

Represent state of an ARM core.

Most numbers match the five low bits of the *PSR registers on "classic ARM" processors, which build on the ARMv4 processor modes and register set.

ARM_MODE_ANY is a magic value, often used as a wildcard.

Only the microcontroller cores (ARMv6-M, ARMv7-M) support ARM_MODE_THREAD, ARM_MODE_USER_THREAD, and ARM_MODE_HANDLER. Those are the only modes they support.

Enumerator
ARM_MODE_USR
ARM_MODE_FIQ
ARM_MODE_IRQ
ARM_MODE_SVC
ARM_MODE_MON
ARM_MODE_ABT
ARM_MODE_HYP
ARM_MODE_UND
ARM_MODE_1176_MON
ARM_MODE_SYS
ARM_MODE_THREAD
ARM_MODE_USER_THREAD
ARM_MODE_HANDLER
ARMV8_64_EL0T
ARMV8_64_EL1T
ARMV8_64_EL1H
ARMV8_64_EL2T
ARMV8_64_EL2H
ARMV8_64_EL3T
ARMV8_64_EL3H
ARM_MODE_ANY

Definition at line 74 of file arm.h.

◆ arm_state

enum arm_state

The PSR "T" and "J" bits define the mode of "classic ARM" cores.

Enumerator
ARM_STATE_ARM
ARM_STATE_THUMB
ARM_STATE_JAZELLE
ARM_STATE_THUMB_EE
ARM_STATE_AARCH64

Definition at line 142 of file arm.h.

◆ arm_vfp_version

enum arm_vfp_version

ARM vector floating point enabled, if yes which version.

Enumerator
ARM_VFP_DISABLED
ARM_VFP_V1
ARM_VFP_V2
ARM_VFP_V3

Definition at line 151 of file arm.h.

Function Documentation

◆ arm_arch_state()

int arm_arch_state ( struct target * target )

Definition at line 782 of file armv4_5.c.

References ARM_COMMON_MAGIC, arm_mode_name(), arm_state_strings, buf_get_u32(), arm::common_magic, arm::core_mode, arm::core_state, arm::cpsr, debug_reason_name(), ERROR_FAIL, ERROR_OK, semihosting::hit_fileio, semihosting::is_active, semihosting::is_fileio, LOG_ERROR, LOG_USER, arm::pc, target::semihosting, target_to_arm(), and reg::value.

Referenced by arm11_arch_state(), arm720t_arch_state(), arm920t_arch_state(), arm926ejs_arch_state(), armv7a_arch_state(), and xscale_arch_state().

◆ arm_blank_check_memory()

int arm_blank_check_memory	(	struct target *	target,
		struct target_memory_check_block *	blocks,
		int	num_blocks,
		uint8_t	erased_value
	)

Runs ARM code in the target to check whether a memory block holds all ones.

NOR flash which has been erased, and thus may be written, holds all ones.

Definition at line 1595 of file armv4_5.c.

References working_area::address, arm::arch, ARM_ARCH_V4, ARM_COMMON_MAGIC, ARM_MODE_SVC, ARM_STATE_ARM, ARRAY_SIZE, buf_get_u32(), buf_set_u32(), arm_algorithm::common_magic, arm_algorithm::core_mode, arm_algorithm::core_state, destroy_reg_param(), ERROR_FAIL, ERROR_OK, init_reg_param(), le_to_h_u32(), LOG_ERROR, NULL, PARAM_IN_OUT, PARAM_OUT, target_memory_check_block::result, size, target_alloc_working_area(), target_free_working_area(), target_run_algorithm(), target_to_arm(), and target_write_u32().

◆ arm_build_reg_cache()

struct reg_cache* arm_build_reg_cache	(	struct target *	target,
		struct arm *	arm
	)

Definition at line 646 of file armv4_5.c.

References reg::arch_info, arm_reg::arm, arm_core_regs, ARM_CORE_TYPE_SEC_EXT, ARM_CORE_TYPE_VIRT_EXT, ARM_MODE_HYP, ARM_MODE_MON, arm_reg_type, ARM_VFP_V3, arm_vfp_v3_regs, arm::arm_vfp_version, ARMV4_5_CPSR, ARRAY_SIZE, reg::caller_save, cookie, arm::core_cache, arm::core_type, arm::cpsr, reg::exist, reg::feature, reg::group, arm_reg::mode, mode, reg_feature::name, reg::name, reg_cache::name, reg_cache::next, NULL, arm_reg::num, reg_cache::num_regs, number, reg::number, arm::pc, reg::reg_data_type, reg_cache::reg_list, REG_TYPE_CODE_PTR, REG_TYPE_DATA_PTR, REG_TYPE_UINT32, reg::size, target, arm_reg::target, reg_data_type::type, reg::type, arm_reg::value, and reg::value.

Referenced by arm7tdmi_build_reg_cache(), arm9tdmi_build_reg_cache(), arm_dpm_setup(), and xscale_build_reg_cache().

◆ arm_checksum_memory()

int arm_checksum_memory	(	struct target *	target,
		target_addr_t	address,
		uint32_t	count,
		uint32_t *	checksum
	)

Runs ARM code in the target to calculate a CRC32 checksum.

Definition at line 1522 of file armv4_5.c.

References working_area::address, arm::arch, ARM_ARCH_V4, ARM_COMMON_MAGIC, ARM_MODE_SVC, ARM_STATE_ARM, ARRAY_SIZE, buf_get_u32(), buf_set_u32(), arm_algorithm::common_magic, arm_algorithm::core_mode, arm_algorithm::core_state, count, destroy_reg_param(), ERROR_OK, init_reg_param(), le_to_h_u32(), LOG_ERROR, NULL, PARAM_IN_OUT, PARAM_OUT, target_alloc_working_area(), target_free_working_area(), target_run_algorithm(), target_to_arm(), target_write_u32(), and reg_param::value.

◆ arm_free_reg_cache()

void arm_free_reg_cache ( struct arm * arm )

Definition at line 761 of file armv4_5.c.

References reg::arch_info, arm::core_cache, reg::feature, NULL, reg_cache::num_regs, reg::reg_data_type, and reg_cache::reg_list.

Referenced by arm11_dpm_deinit(), arm7tdmi_free_reg_cache(), arm920t_deinit_target(), arm926ejs_deinit_target(), arm946e_deinit_target(), arm966e_deinit_target(), arm9tdmi_deinit_target(), arm_dpm_setup(), cortex_a_deinit_target(), fa526_deinit_target(), and xscale_free_reg_cache().

◆ arm_get_gdb_arch()

const char* arm_get_gdb_arch ( struct target * target )

Definition at line 1189 of file armv4_5.c.

◆ arm_get_gdb_reg_list()

int arm_get_gdb_reg_list	(	struct target *	target,
		struct reg **	reg_list[],
		int *	reg_list_size,
		enum target_register_class	reg_class
	)

Definition at line 1194 of file armv4_5.c.

References arm_core_regs, ARM_CORE_TYPE_SEC_EXT, ARM_CORE_TYPE_VIRT_EXT, arm_gdb_dummy_fp_reg, arm_gdb_dummy_fps_reg, ARM_MODE_HYP, ARM_MODE_MON, arm_reg_current(), ARM_VFP_V3, arm::arm_vfp_version, ARRAY_SIZE, arm::core_cache, arm::core_mode, arm::core_type, arm::cpsr, ERROR_FAIL, ERROR_OK, is_arm_mode(), LOG_ERROR, mode, reg::number, REG_CLASS_ALL, REG_CLASS_GENERAL, reg_cache::reg_list, reg::size, and target_to_arm().

◆ arm_init_arch_info()

int arm_init_arch_info	(	struct target *	target,
		struct arm *	arm
	)

Definition at line 1705 of file armv4_5.c.

References target::arch_info, ARM_COMMON_MAGIC, ARM_CORE_TYPE_M_PROFILE, ARM_CORE_TYPE_STD, arm_default_mcr(), arm_default_mrc(), arm_full_context(), ARM_MODE_USR, arm_set_cpsr(), arm::common_magic, arm::core_type, ERROR_OK, arm::full_context, arm::mcr, arm::mrc, arm::read_core_reg, target, and arm::target.

Referenced by arm11_target_create(), armv7m_init_arch_info(), and xscale_init_arch_info().

◆ arm_mode_name()

const char* arm_mode_name ( unsigned psr_mode )

Map PSR mode bits to the name of an ARM processor operating mode.

Definition at line 171 of file armv4_5.c.

References arm_mode_data, ARRAY_SIZE, LOG_ERROR, and psr.

Referenced by adapter_debug_entry(), arm7_9_debug_entry(), arm7_9_restore_context(), arm_arch_state(), arm_set_cpsr(), armv7m_arch_state(), cortex_m_debug_entry(), and xscale_debug_entry().

◆ arm_reg_current()

struct reg* arm_reg_current	(	struct arm *	arm,
		unsigned	regnum
	)

Returns handle to the register currently mapped to a given number.

Someone must have called arm_set_cpsr() before.

Parameters

arm	This core's state and registers are used.
regnum	From 0..15 corresponding to R0..R14 and PC. Note that R0..R7 don't require mapping; you may access those as the first eight entries in the register cache. Likewise R15 (PC) doesn't need mapping; you may also access it directly. However, R8..R14, and SPSR (arm->spsr) must be mapped. CPSR (arm->cpsr) is also not mapped.

Definition at line 502 of file armv4_5.c.

References arm::core_cache, LOG_ERROR, arm::map, NULL, and reg_cache::reg_list.

Referenced by arm7_9_debug_entry(), arm7_9_read_memory(), arm7_9_soft_reset_halt(), arm7_9_write_memory(), arm_dpm_read_current_registers(), arm_get_gdb_reg_list(), arm_semihosting(), COMMAND_HANDLER(), cortex_a_read_cpu_memory(), cortex_a_read_cpu_memory_slow(), cortex_a_write_cpu_memory(), cortex_a_write_cpu_memory_slow(), post_result(), and xscale_debug_entry().

◆ arm_set_cpsr()

void arm_set_cpsr	(	struct arm *	arm,
		uint32_t	cpsr
	)

Configures host-side ARM records to reflect the specified CPSR.

Later, code can use arm_reg_current() to map register numbers according to how they are exposed by this mode.

Definition at line 438 of file armv4_5.c.

References arm_mode_name(), ARM_MODE_SYS, arm_mode_to_number(), ARM_MODE_USR, ARM_STATE_ARM, ARM_STATE_JAZELLE, arm_state_strings, ARM_STATE_THUMB, ARM_STATE_THUMB_EE, armv4_5_core_reg_map, buf_set_u32(), arm::core_cache, arm::core_mode, arm::core_state, arm::cpsr, reg::dirty, LOG_DEBUG, LOG_ERROR, LOG_WARNING, arm::map, mode, NULL, reg_cache::reg_list, arm::spsr, state, reg::valid, and reg::value.

Referenced by arm720t_soft_reset_halt(), arm7_9_debug_entry(), arm7_9_soft_reset_halt(), arm920t_soft_reset_halt(), arm926ejs_soft_reset_halt(), arm_dpm_read_current_registers(), arm_init_arch_info(), armv4_5_run_algorithm_inner(), and xscale_debug_entry().

◆ armv4_5_run_algorithm()

int armv4_5_run_algorithm	(	struct target *	target,
		int	num_mem_params,
		struct mem_param *	mem_params,
		int	num_reg_params,
		struct reg_param *	reg_params,
		target_addr_t	entry_point,
		target_addr_t	exit_point,
		int	timeout_ms,
		void *	arch_info
	)

Definition at line 1496 of file armv4_5.c.

References reg::arch_info, armv4_5_run_algorithm_completion(), and armv4_5_run_algorithm_inner().

◆ armv4_5_run_algorithm_inner()

int armv4_5_run_algorithm_inner	(	struct target *	target,
		int	num_mem_params,
		struct mem_param *	mem_params,
		int	num_reg_params,
		struct reg_param *	reg_params,
		uint32_t	entry_point,
		uint32_t	exit_point,
		int	timeout_ms,
		void *	arch_info,
		int()(struct target target, uint32_t exit_point, int timeout_ms, void *arch_info)	run_it
	)