OpenOCD
armv7m.h
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 /***************************************************************************
4  * Copyright (C) 2005 by Dominic Rath *
5  * Dominic.Rath@gmx.de *
6  * *
7  * Copyright (C) 2006 by Magnus Lundin *
8  * lundin@mlu.mine.nu *
9  * *
10  * Copyright (C) 2008 by Spencer Oliver *
11  * spen@spen-soft.co.uk *
12  ***************************************************************************/
13 
14 #ifndef OPENOCD_TARGET_ARMV7M_H
15 #define OPENOCD_TARGET_ARMV7M_H
16 
17 #include "arm.h"
18 #include "armv7m_trace.h"
19 
20 struct adiv5_ap;
21 
22 extern const int armv7m_psp_reg_map[];
23 extern const int armv7m_msp_reg_map[];
24 
25 const char *armv7m_exception_string(int number);
26 
27 /* Cortex-M DCRSR.REGSEL selectors */
28 enum {
33 
38 
43 
48 
52 
61 
66 
67  /* 32bit Floating-point registers */
100 };
101 
102 /* offsets into armv7m core register cache */
103 enum {
104  /* for convenience, the first set of indices match
105  * the Cortex-M DCRSR.REGSEL selectors
106  */
111 
116 
121 
126 
130 
131  /* following indices are arbitrary, do not match DCRSR.REGSEL selectors */
132 
133  /* A block of container and contained registers follows:
134  * THE ORDER IS IMPORTANT to the end of the block ! */
135  /* working register for packing/unpacking special regs, hidden from gdb */
137 
138  /* WARNING: If you use armv7m_write_core_reg() on one of 4 following
139  * special registers, the new data go to ARMV7M_PMSK_BPRI_FLTMSK_CTRL
140  * cache only and are not flushed to CPU HW register.
141  * To trigger write to CPU HW register, add
142  * armv7m_write_core_reg(,,ARMV7M_PMSK_BPRI_FLTMSK_CTRL,);
143  */
148  /* The end of block of container and contained registers */
149 
150  /* ARMv8-M specific registers */
159 
160  /* A block of container and contained registers follows:
161  * THE ORDER IS IMPORTANT to the end of the block ! */
167  /* The end of block of container and contained registers */
168 
169  /* A block of container and contained registers follows:
170  * THE ORDER IS IMPORTANT to the end of the block ! */
176  /* The end of block of container and contained registers */
177 
178  /* 64bit Floating-point registers */
195 
196  /* Floating-point status register */
198 
199  /* for convenience add registers' block delimiters */
207 };
208 
209 enum {
210  FP_NONE = 0,
214 };
215 
216 #define ARMV7M_NUM_CORE_REGS (ARMV7M_CORE_LAST_REG - ARMV7M_CORE_FIRST_REG + 1)
217 
218 #define ARMV7M_COMMON_MAGIC 0x2A452A45U
219 
221  unsigned int common_magic;
222 
223  struct arm arm;
224 
226 
227  /* AP this processor is connected to in the DAP */
229 
231  uint32_t demcr;
232 
233  /* hla_target uses a high level adapter that does not support all functions */
235 
237 
238  /* Direct processor core register read and writes */
239  int (*load_core_reg_u32)(struct target *target, uint32_t regsel, uint32_t *value);
240  int (*store_core_reg_u32)(struct target *target, uint32_t regsel, uint32_t value);
241 
243  int (*post_debug_entry)(struct target *target);
244 
246 };
247 
248 static inline bool is_armv7m(const struct armv7m_common *armv7m)
249 {
250  return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
251 }
252 
259 static inline struct armv7m_common *
261 {
262  return container_of(target->arch_info, struct armv7m_common, arm);
263 }
264 
271 static inline struct armv7m_common *
273 {
274  if (!target)
275  return NULL;
276 
277  if (!target->arch_info)
278  return NULL;
279 
280  /* Check the parent type first to prevent peeking memory too far
281  * from arch_info pointer */
282  if (!is_arm(target_to_arm(target)))
283  return NULL;
284 
285  struct armv7m_common *armv7m = target_to_armv7m(target);
286  if (!is_armv7m(armv7m))
287  return NULL;
288 
289  return armv7m;
290 }
291 
293  unsigned int common_magic;
294 
295  enum arm_mode core_mode;
296 
297  uint32_t context[ARMV7M_LAST_REG]; /* ARMV7M_NUM_REGS */
298 };
299 
302 
303 enum armv7m_mode armv7m_number_to_mode(int number);
304 int armv7m_mode_to_number(enum armv7m_mode mode);
305 
306 int armv7m_arch_state(struct target *target);
308  struct reg **reg_list[], int *reg_list_size,
309  enum target_register_class reg_class);
310 
311 int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
312 
314  int num_mem_params, struct mem_param *mem_params,
315  int num_reg_params, struct reg_param *reg_params,
316  target_addr_t entry_point, target_addr_t exit_point,
317  int timeout_ms, void *arch_info);
318 
320  int num_mem_params, struct mem_param *mem_params,
321  int num_reg_params, struct reg_param *reg_params,
322  target_addr_t entry_point, target_addr_t exit_point,
323  void *arch_info);
324 
326  int num_mem_params, struct mem_param *mem_params,
327  int num_reg_params, struct reg_param *reg_params,
328  target_addr_t exit_point, int timeout_ms,
329  void *arch_info);
330 
332 
334 
335 uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id);
336 
337 bool armv7m_map_reg_packing(unsigned int arm_reg_id,
338  unsigned int *reg32_id, uint32_t *offset);
339 
341  target_addr_t address, uint32_t count, uint32_t *checksum);
343  struct target_memory_check_block *blocks, int num_blocks, uint8_t erased_value);
344 
345 int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
346 
347 extern const struct command_registration armv7m_command_handlers[];
348 
349 #endif /* OPENOCD_TARGET_ARMV7M_H */
Holds the interface to ARM cores.
static bool is_arm(struct arm *arm)
Definition: arm.h:249
arm_mode
Represent state of an ARM core.
Definition: arm.h:74
static struct arm * target_to_arm(struct target *target)
Convert target handle to generic ARM target state handle.
Definition: arm.h:243
enum arm_mode mode
Definition: armv4_5.c:277
int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class)
Returns generic ARM userspace registers to GDB.
Definition: armv7m.c:456
int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found)
Definition: armv7m.c:1062
void armv7m_free_reg_cache(struct target *target)
Definition: armv7m.c:823
static struct armv7m_common * target_to_armv7m_safe(struct target *target)
Definition: armv7m.h:272
int armv7m_mode_to_number(enum armv7m_mode mode)
uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id)
Definition: armv7m.c:243
const int armv7m_msp_reg_map[]
Definition: armv7m.c:60
struct reg_cache * armv7m_build_reg_cache(struct target *target)
Builds cache of architecturally defined registers.
Definition: armv7m.c:760
@ ARMV7M_REGSEL_S1
Definition: armv7m.h:69
@ ARMV7M_REGSEL_S24
Definition: armv7m.h:92
@ ARMV7M_REGSEL_S11
Definition: armv7m.h:79
@ ARMV7M_REGSEL_R8
Definition: armv7m.h:39
@ ARMV7M_REGSEL_S15
Definition: armv7m.h:83
@ ARMV7M_REGSEL_S12
Definition: armv7m.h:80
@ ARMV7M_REGSEL_R9
Definition: armv7m.h:40
@ ARMV8M_REGSEL_PMSK_BPRI_FLTMSK_CTRL_S
Definition: armv7m.h:63
@ ARMV7M_REGSEL_S0
Definition: armv7m.h:68
@ ARMV7M_REGSEL_FPSCR
Definition: armv7m.h:65
@ ARMV7M_REGSEL_PC
Definition: armv7m.h:47
@ ARMV7M_REGSEL_S27
Definition: armv7m.h:95
@ ARMV7M_REGSEL_R6
Definition: armv7m.h:36
@ ARMV7M_REGSEL_S21
Definition: armv7m.h:89
@ ARMV7M_REGSEL_R4
Definition: armv7m.h:34
@ ARMV7M_REGSEL_R1
Definition: armv7m.h:30
@ ARMV7M_REGSEL_S13
Definition: armv7m.h:81
@ ARMV7M_REGSEL_S28
Definition: armv7m.h:96
@ ARMV7M_REGSEL_S5
Definition: armv7m.h:73
@ ARMV7M_REGSEL_R2
Definition: armv7m.h:31
@ ARMV7M_REGSEL_MSP
Definition: armv7m.h:50
@ ARMV7M_REGSEL_R13
Definition: armv7m.h:45
@ ARMV7M_REGSEL_R5
Definition: armv7m.h:35
@ ARMV7M_REGSEL_R11
Definition: armv7m.h:42
@ ARMV7M_REGSEL_S22
Definition: armv7m.h:90
@ ARMV7M_REGSEL_R14
Definition: armv7m.h:46
@ ARMV7M_REGSEL_S16
Definition: armv7m.h:84
@ ARMV7M_REGSEL_S7
Definition: armv7m.h:75
@ ARMV7M_REGSEL_S30
Definition: armv7m.h:98
@ ARMV7M_REGSEL_S29
Definition: armv7m.h:97
@ ARMV7M_REGSEL_S3
Definition: armv7m.h:71
@ ARMV7M_REGSEL_S19
Definition: armv7m.h:87
@ ARMV7M_REGSEL_R10
Definition: armv7m.h:41
@ ARMV8M_REGSEL_MSP_S
Definition: armv7m.h:55
@ ARMV7M_REGSEL_S20
Definition: armv7m.h:88
@ ARMV7M_REGSEL_S6
Definition: armv7m.h:74
@ ARMV8M_REGSEL_MSPLIM_S
Definition: armv7m.h:57
@ ARMV7M_REGSEL_R0
Definition: armv7m.h:29
@ ARMV7M_REGSEL_S23
Definition: armv7m.h:91
@ ARMV7M_REGSEL_S14
Definition: armv7m.h:82
@ ARMV7M_REGSEL_R7
Definition: armv7m.h:37
@ ARMV7M_REGSEL_S4
Definition: armv7m.h:72
@ ARMV8M_REGSEL_PSP_NS
Definition: armv7m.h:54
@ ARMV8M_REGSEL_MSP_NS
Definition: armv7m.h:53
@ ARMV8M_REGSEL_PSP_S
Definition: armv7m.h:56
@ ARMV7M_REGSEL_S31
Definition: armv7m.h:99
@ ARMV8M_REGSEL_PSPLIM_NS
Definition: armv7m.h:60
@ ARMV7M_REGSEL_S8
Definition: armv7m.h:76
@ ARMV8M_REGSEL_PSPLIM_S
Definition: armv7m.h:58
@ ARMV7M_REGSEL_PSP
Definition: armv7m.h:51
@ ARMV7M_REGSEL_R3
Definition: armv7m.h:32
@ ARMV7M_REGSEL_S2
Definition: armv7m.h:70
@ ARMV7M_REGSEL_S10
Definition: armv7m.h:78
@ ARMV7M_REGSEL_S9
Definition: armv7m.h:77
@ ARMV7M_REGSEL_R12
Definition: armv7m.h:44
@ ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL
Definition: armv7m.h:62
@ ARMV7M_REGSEL_S18
Definition: armv7m.h:86
@ ARMV7M_REGSEL_S25
Definition: armv7m.h:93
@ ARMV7M_REGSEL_XPSR
Definition: armv7m.h:49
@ ARMV8M_REGSEL_MSPLIM_NS
Definition: armv7m.h:59
@ ARMV7M_REGSEL_S17
Definition: armv7m.h:85
@ ARMV8M_REGSEL_PMSK_BPRI_FLTMSK_CTRL_NS
Definition: armv7m.h:64
@ ARMV7M_REGSEL_S26
Definition: armv7m.h:94
@ ARMV7M_PRIMASK
Definition: armv7m.h:144
@ ARMV8M_PRIMASK_S
Definition: armv7m.h:163
@ ARMV7M_R1
Definition: armv7m.h:108
@ ARMV7M_CORE_LAST_REG
Definition: armv7m.h:202
@ ARMV8M_CONTROL_S
Definition: armv7m.h:166
@ ARMV7M_FAULTMASK
Definition: armv7m.h:146
@ ARMV7M_D14
Definition: armv7m.h:193
@ ARMV8M_PRIMASK_NS
Definition: armv7m.h:172
@ ARMV8M_BASEPRI_NS
Definition: armv7m.h:173
@ ARMV8M_MSP_NS
Definition: armv7m.h:151
@ ARMV7M_D8
Definition: armv7m.h:187
@ ARMV7M_FPU_LAST_REG
Definition: armv7m.h:204
@ ARMV8M_MSPLIM_S
Definition: armv7m.h:155
@ ARMV7M_MSP
Definition: armv7m.h:128
@ ARMV8M_PSP_NS
Definition: armv7m.h:152
@ ARMV7M_CORE_FIRST_REG
Definition: armv7m.h:201
@ ARMV8M_CONTROL_NS
Definition: armv7m.h:175
@ ARMV7M_R6
Definition: armv7m.h:114
@ ARMV7M_R2
Definition: armv7m.h:109
@ ARMV7M_D3
Definition: armv7m.h:182
@ ARMV7M_D1
Definition: armv7m.h:180
@ ARMV7M_D4
Definition: armv7m.h:183
@ ARMV8M_PMSK_BPRI_FLTMSK_CTRL_NS
Definition: armv7m.h:171
@ ARMV7M_BASEPRI
Definition: armv7m.h:145
@ ARMV7M_D2
Definition: armv7m.h:181
@ ARMV7M_R3
Definition: armv7m.h:110
@ ARMV8M_MSPLIM_NS
Definition: armv7m.h:157
@ ARMV7M_D11
Definition: armv7m.h:190
@ ARMV7M_CONTROL
Definition: armv7m.h:147
@ ARMV7M_D9
Definition: armv7m.h:188
@ ARMV7M_R14
Definition: armv7m.h:124
@ ARMV7M_R9
Definition: armv7m.h:118
@ ARMV7M_D7
Definition: armv7m.h:186
@ ARMV7M_R12
Definition: armv7m.h:122
@ ARMV7M_R0
Definition: armv7m.h:107
@ ARMV8M_PSP_S
Definition: armv7m.h:154
@ ARMV7M_PSP
Definition: armv7m.h:129
@ ARMV8M_MSP_S
Definition: armv7m.h:153
@ ARMV8M_LAST_REG
Definition: armv7m.h:206
@ ARMV7M_FPU_FIRST_REG
Definition: armv7m.h:203
@ ARMV7M_D13
Definition: armv7m.h:192
@ ARMV8M_BASEPRI_S
Definition: armv7m.h:164
@ ARMV7M_R13
Definition: armv7m.h:123
@ ARMV8M_FAULTMASK_S
Definition: armv7m.h:165
@ ARMV7M_PC
Definition: armv7m.h:125
@ ARMV7M_R7
Definition: armv7m.h:115
@ ARMV7M_R4
Definition: armv7m.h:112
@ ARMV7M_XPSR
Definition: armv7m.h:127
@ ARMV7M_D0
Definition: armv7m.h:179
@ ARMV7M_R8
Definition: armv7m.h:117
@ ARMV7M_R11
Definition: armv7m.h:120
@ ARMV8M_PSPLIM_NS
Definition: armv7m.h:158
@ ARMV8M_FAULTMASK_NS
Definition: armv7m.h:174
@ ARMV8M_FIRST_REG
Definition: armv7m.h:205
@ ARMV7M_D12
Definition: armv7m.h:191
@ ARMV7M_D10
Definition: armv7m.h:189
@ ARMV7M_R10
Definition: armv7m.h:119
@ ARMV7M_D15
Definition: armv7m.h:194
@ ARMV7M_LAST_REG
Definition: armv7m.h:200
@ ARMV7M_FPSCR
Definition: armv7m.h:197
@ ARMV7M_D5
Definition: armv7m.h:184
@ ARMV7M_PMSK_BPRI_FLTMSK_CTRL
Definition: armv7m.h:136
@ ARMV7M_R5
Definition: armv7m.h:113
@ ARMV7M_D6
Definition: armv7m.h:185
@ ARMV8M_PSPLIM_S
Definition: armv7m.h:156
@ ARMV8M_PMSK_BPRI_FLTMSK_CTRL_S
Definition: armv7m.h:162
enum armv7m_mode armv7m_number_to_mode(int number)
int armv7m_wait_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t exit_point, int timeout_ms, void *arch_info)
Waits for an algorithm in the target.
Definition: armv7m.c:619
int armv7m_checksum_memory(struct target *target, target_addr_t address, uint32_t count, uint32_t *checksum)
Generates a CRC32 checksum of a memory region.
Definition: armv7m.c:879
static struct armv7m_common * target_to_armv7m(struct target *target)
Definition: armv7m.h:260
bool armv7m_map_reg_packing(unsigned int arm_reg_id, unsigned int *reg32_id, uint32_t *offset)
Definition: armv7m.c:281
int armv7m_blank_check_memory(struct target *target, struct target_memory_check_block *blocks, int num_blocks, uint8_t erased_value)
Checks an array of memory regions whether they are erased.
Definition: armv7m.c:930
int armv7m_arch_state(struct target *target)
Logs summary of ARMv7-M state for a halted target.
Definition: armv7m.c:725
@ FPV4_SP
Definition: armv7m.h:211
@ FPV5_DP
Definition: armv7m.h:213
@ FPV5_SP
Definition: armv7m.h:212
@ FP_NONE
Definition: armv7m.h:210
int armv7m_restore_context(struct target *target)
Restores target context using the cache of core registers set up by armv7m_build_reg_cache(),...
Definition: armv7m.c:168
const char * armv7m_exception_string(int number)
Maps ISR number (from xPSR) to name.
Definition: armv7m.c:201
#define ARMV7M_COMMON_MAGIC
Definition: armv7m.h:218
int armv7m_start_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t entry_point, target_addr_t exit_point, void *arch_info)
Starts a Thumb algorithm in the target.
Definition: armv7m.c:505
int armv7m_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t entry_point, target_addr_t exit_point, int timeout_ms, void *arch_info)
Runs a Thumb algorithm in the target.
Definition: armv7m.c:480
int armv7m_invalidate_core_regs(struct target *target)
static bool is_armv7m(const struct armv7m_common *armv7m)
Definition: armv7m.h:248
const struct command_registration armv7m_command_handlers[]
Definition: armv7m.c:1096
int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m)
Sets up target as a generic ARMv7-M core.
Definition: armv7m.c:857
const int armv7m_psp_reg_map[]
Definition: armv7m.c:51
Holds the interface to ITM and DWT configuration functions.
enum esirisc_reg_num number
Definition: esirisc.c:87
struct target * target
Definition: rtt/rtt.c:26
This represents an ARM Debug Interface (v5) Access Port (AP).
Definition: arm_adi_v5.h:243
Represents a generic ARM core, with standard application registers.
Definition: arm.h:167
unsigned int common_magic
Definition: armv7m.h:293
enum arm_mode core_mode
Definition: armv7m.h:295
uint32_t context[ARMV7M_LAST_REG]
Definition: armv7m.h:297
struct armv7m_trace_config trace_config
Definition: armv7m.h:236
bool is_hla_target
Definition: armv7m.h:234
int exception_number
Definition: armv7m.h:225
int fp_feature
Definition: armv7m.h:230
void(* pre_restore_context)(struct target *target)
Definition: armv7m.h:245
unsigned int common_magic
Definition: armv7m.h:221
int(* store_core_reg_u32)(struct target *target, uint32_t regsel, uint32_t value)
Definition: armv7m.h:240
int(* load_core_reg_u32)(struct target *target, uint32_t regsel, uint32_t *value)
Definition: armv7m.h:239
uint32_t demcr
Definition: armv7m.h:231
struct adiv5_ap * debug_ap
Definition: armv7m.h:228
int(* examine_debug_reason)(struct target *target)
Definition: armv7m.h:242
int(* post_debug_entry)(struct target *target)
Definition: armv7m.h:243
struct reg * reg_list
Definition: register.h:147
Definition: register.h:111
Definition: target.h:120
void * arch_info
Definition: target.h:169
target_register_class
Definition: target.h:114
uint64_t target_addr_t
Definition: types.h:335
#define container_of(ptr, type, member)
Cast a member of a structure out to the containing structure.
Definition: types.h:68
#define NULL
Definition: usb.h:16
uint8_t offset[4]
Definition: vdebug.c:9
uint8_t count[4]
Definition: vdebug.c:22