14 #ifndef OPENOCD_TARGET_ARMV4_5_H
15 #define OPENOCD_TARGET_ARMV4_5_H
32 #define ARMV4_5_CORE_REG_MODE(cache, mode, num) \
33 (cache->reg_list[armv4_5_core_reg_map[arm_mode_to_number(mode)][num]])
arm_mode
Represent state of an ARM core.
int arm_mode_to_number(enum arm_mode mode)
Map PSR mode bits to linear number indexing armv4_5_core_reg_map.
const int armv4_5_core_reg_map[9][17]
enum arm_mode armv4_5_number_to_mode(int number)
Map linear number indexing armv4_5_core_reg_map to PSR mode bits.
enum esirisc_reg_num number