Implements various ARM DPM operations using architectural debug registers. More...
Go to the source code of this file.
Macros | |
| #define | T32_FMTITR(instr) (((instr & 0x0000FFFF) << 16) | ((instr & 0xFFFF0000) >> 16)) |
Functions | |
| static int | armv8_dpm_full_context (struct target *target) |
| enum arm_state | armv8_dpm_get_core_state (struct arm_dpm *dpm) |
| Get core state from EDSCR, without necessity to retrieve CPSR. More... | |
| void | armv8_dpm_handle_exception (struct arm_dpm *dpm, bool do_restore) |
| int | armv8_dpm_initialize (struct arm_dpm *dpm) |
| Reinitializes DPM state at the beginning of a new debug session or after a reset which may have affected the debug module. More... | |
| int | armv8_dpm_modeswitch (struct arm_dpm *dpm, enum arm_mode mode) |
| static int | armv8_dpm_read_core_reg (struct target *target, struct reg *r, int regnum, enum arm_mode mode) |
| int | armv8_dpm_read_current_registers (struct arm_dpm *dpm) |
| Read basic registers of the current context: R0 to R15, and CPSR; sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb). More... | |
| void | armv8_dpm_report_dscr (struct arm_dpm *dpm, uint32_t dscr) |
| int | armv8_dpm_setup (struct arm_dpm *dpm) |
| Hooks up this DPM to its associated target; call only once. More... | |
| static int | armv8_dpm_write_core_reg (struct target *target, struct reg *r, int regnum, enum arm_mode mode, uint8_t *value) |
| int | armv8_dpm_write_dirty_registers (struct arm_dpm *dpm, bool bpwp) |
| Writes all modified core registers for all processor modes. More... | |
| static int | dpmv8_add_breakpoint (struct target *target, struct breakpoint *bp) |
| static int | dpmv8_add_watchpoint (struct target *target, struct watchpoint *wp) |
| static int | dpmv8_bpwp_disable (struct arm_dpm *dpm, unsigned index_t) |
| static int | dpmv8_bpwp_setup (struct arm_dpm *dpm, struct dpm_bpwp *xp, uint32_t addr, uint32_t length) |
| static int | dpmv8_dpm_finish (struct arm_dpm *dpm) |
| static int | dpmv8_dpm_prepare (struct arm_dpm *dpm) |
| static int | dpmv8_exec_opcode (struct arm_dpm *dpm, uint32_t opcode, uint32_t *p_dscr) |
| static int | dpmv8_instr_cpsr_sync (struct arm_dpm *dpm) |
| static int | dpmv8_instr_execute (struct arm_dpm *dpm, uint32_t opcode) |
| static int | dpmv8_instr_read_data_dcc (struct arm_dpm *dpm, uint32_t opcode, uint32_t *data) |
| static int | dpmv8_instr_read_data_dcc_64 (struct arm_dpm *dpm, uint32_t opcode, uint64_t *data) |
| static int | dpmv8_instr_read_data_r0 (struct arm_dpm *dpm, uint32_t opcode, uint32_t *data) |
| static int | dpmv8_instr_read_data_r0_64 (struct arm_dpm *dpm, uint32_t opcode, uint64_t *data) |
| static int | dpmv8_instr_write_data_dcc (struct arm_dpm *dpm, uint32_t opcode, uint32_t data) |
| static int | dpmv8_instr_write_data_dcc_64 (struct arm_dpm *dpm, uint32_t opcode, uint64_t data) |
| static int | dpmv8_instr_write_data_r0 (struct arm_dpm *dpm, uint32_t opcode, uint32_t data) |
| static int | dpmv8_instr_write_data_r0_64 (struct arm_dpm *dpm, uint32_t opcode, uint64_t data) |
| static int | dpmv8_maybe_update_bpwp (struct arm_dpm *dpm, bool bpwp, struct dpm_bpwp *xp, bool *set_p) |
| static int | dpmv8_mcr (struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t crn, uint32_t crm, uint32_t value) |
| static int | dpmv8_mrc (struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t crn, uint32_t crm, uint32_t *value) |
| static int | dpmv8_read_dcc (struct armv8_common *armv8, uint32_t *data, uint32_t *dscr_p) |
| static int | dpmv8_read_dcc_64 (struct armv8_common *armv8, uint64_t *data, uint32_t *dscr_p) |
| static int | dpmv8_read_reg (struct arm_dpm *dpm, struct reg *r, unsigned regnum) |
| static int | dpmv8_remove_breakpoint (struct target *target, struct breakpoint *bp) |
| static int | dpmv8_remove_watchpoint (struct target *target, struct watchpoint *wp) |
| static int | dpmv8_watchpoint_setup (struct arm_dpm *dpm, unsigned index_t, struct watchpoint *wp) |
| static int | dpmv8_write_dcc (struct armv8_common *armv8, uint32_t data) |
| static int | dpmv8_write_dcc_64 (struct armv8_common *armv8, uint64_t data) |
| static int | dpmv8_write_reg (struct arm_dpm *dpm, struct reg *r, unsigned regnum) |
Detailed Description
Implements various ARM DPM operations using architectural debug registers.
These routines layer over core-specific communication methods to cope with implementation differences between cores like ARM1136 and Cortex-A8.
The "Debug Programmers' Model" (DPM) for ARMv6 and ARMv7 is defined by Part C (Debug Architecture) of the ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition (ARM DDI 0406B). In OpenOCD, DPM operations are abstracted through internal programming interfaces to share code and to minimize needless differences in debug behavior between cores.
Definition in file armv8_dpm.c.
Macro Definition Documentation
◆ T32_FMTITR
| #define T32_FMTITR | ( | instr | ) | (((instr & 0x0000FFFF) << 16) | ((instr & 0xFFFF0000) >> 16)) |
Definition at line 23 of file armv8_dpm.c.
Function Documentation
◆ armv8_dpm_full_context()
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static |
Definition at line 1016 of file armv8_dpm.c.
References reg::arch_info, ARM_MODE_ANY, ARM_MODE_USR, armv8_dpm_modeswitch(), arm::core_cache, arm::dpm, dpmv8_read_reg(), ERROR_OK, reg::exist, arm_dpm::finish, arm_reg::mode, mode, arm_reg::num, reg_cache::num_regs, arm_dpm::prepare, reg_cache::reg_list, target_to_arm(), and reg::valid.
Referenced by armv8_dpm_setup().
◆ armv8_dpm_get_core_state()
Get core state from EDSCR, without necessity to retrieve CPSR.
Definition at line 1 of file armv8_dpm.c.
Referenced by aarch64_debug_entry(), aarch64_set_breakpoint(), armv8_dpm_handle_exception(), armv8_dpm_modeswitch(), and dpmv8_exec_opcode().
◆ armv8_dpm_handle_exception()
| void armv8_dpm_handle_exception | ( | struct arm_dpm * | dpm, |
| bool | do_restore | ||
| ) |
Definition at line 1286 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, ARM_MODE_ANY, ARM_STATE_AARCH64, armv8_dpm_get_core_state(), armv8_dpm_modeswitch(), ARMV8_ELR_EL1, ARMV8_ELR_EL2, ARMV8_ELR_EL3, ARMV8_ESR_EL1, ARMV8_ESR_EL2, ARMV8_ESR_EL3, ARMV8_PC, armv8_select_opcodes(), armv8_select_reg_access(), ARMV8_SPSR_EL1, ARMV8_SPSR_EL2, ARMV8_SPSR_EL3, ARMV8_XPSR, arm::core_cache, CPUV8_DBG_DRCR, armv8_common::debug_ap, armv8_common::debug_base, reg::dirty, armv8_common::dpm, DRCR_CSE, arm_dpm::dscr, LOG_DEBUG, LOG_ERROR, mem_ap_write_u32(), armv8_common::read_reg_u64, reg_cache::reg_list, and SYSTEM_CUREL_EL3.
Referenced by aarch64_read_cpu_memory(), aarch64_write_cpu_memory(), armv8_dpm_modeswitch(), and dpmv8_exec_opcode().
◆ armv8_dpm_initialize()
| int armv8_dpm_initialize | ( | struct arm_dpm * | dpm | ) |
Reinitializes DPM state at the beginning of a new debug session or after a reset which may have affected the debug module.
Definition at line 1474 of file armv8_dpm.c.
References arm_dpm::arm, dpm_bp::bpwp, dpm_wp::bpwp, arm_dpm::bpwp_disable, arm_dpm::dbp, arm_dpm::dwp, ERROR_OK, LOG_WARNING, arm_dpm::nbp, dpm_bpwp::number, arm_dpm::nwp, arm::target, and target_name().
Referenced by aarch64_dpm_setup().
◆ armv8_dpm_modeswitch()
Definition at line 539 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, ARM_MODE_ABT, ARM_MODE_ANY, ARM_MODE_FIQ, ARM_MODE_IRQ, ARM_MODE_MON, ARM_MODE_SVC, ARM_MODE_SYS, ARM_MODE_USR, ARM_STATE_AARCH64, armv8_dpm_get_core_state(), armv8_dpm_handle_exception(), ARMV8_MSR_GP_XPSR_T1, ARMV8_OPC_DCPS, ARMV8_OPC_DRPS, armv8_select_opcodes(), armv8_select_reg_access(), buf_get_u32(), arm::cpsr, reg::dirty, armv8_common::dpm, ERROR_FAIL, ERROR_OK, arm_dpm::instr_execute, arm_dpm::instr_write_data_r0, arm_dpm::last_el, LOG_DEBUG, LOG_ERROR, LOG_INFO, mode, arm::pc, SYSTEM_CUREL_EL3, and reg::value.
Referenced by aarch64_mmu_modify(), aarch64_post_debug_entry(), aarch64_restore_system_control_reg(), armv8_dpm_full_context(), armv8_dpm_handle_exception(), armv8_dpm_write_dirty_registers(), armv8_identify_cache(), armv8_mmu_translate_va_pa(), and armv8_read_mpidr().
◆ armv8_dpm_read_core_reg()
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Definition at line 961 of file armv8_dpm.c.
References arm::core_cache, arm::dpm, dpmv8_read_reg(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, arm_dpm::finish, reg_cache::num_regs, arm_dpm::prepare, and target_to_arm().
Referenced by armv8_dpm_setup().
◆ armv8_dpm_read_current_registers()
| int armv8_dpm_read_current_registers | ( | struct arm_dpm * | dpm | ) |
Read basic registers of the current context: R0 to R15, and CPSR; sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb).
In normal operation this is called on entry to halting debug state, possibly after some other operations supporting restore of debug state or making sure the CPU is fully idle (drain write buffer, etc).
Definition at line 731 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, ARM_MODE_ANY, ARM_MODE_SYS, armv8_curel_from_core_mode(), ARMV8_FPCR, ARMV8_PC, ARMV8_R0, ARMV8_R1, armv8_reg_current(), armv8_set_cpsr(), ARMV8_SPSR_EL1, ARMV8_V0, arm::core_cache, arm::core_mode, arm::dpm, armv8_common::dpm, dpmv8_read_reg(), ERROR_OK, arm_dpm::finish, arm_dpm::instr_read_data_r0, arm_dpm::last_el, arm_reg::mode, arm_dpm::prepare, READ_REG_DSPSR, and reg_cache::reg_list.
Referenced by aarch64_debug_entry().
◆ armv8_dpm_report_dscr()
| void armv8_dpm_report_dscr | ( | struct arm_dpm * | dpm, |
| uint32_t | dscr | ||
| ) |
Definition at line 1342 of file armv8_dpm.c.
References arm_dpm::arm, DBG_REASON_BREAKPOINT, DBG_REASON_DBGRQ, DBG_REASON_EXC_CATCH, DBG_REASON_SINGLESTEP, DBG_REASON_UNDEFINED, DBG_REASON_WATCHPOINT, target::debug_reason, arm_dpm::dscr, DSCR_ENTRY, DSCRV8_ENTRY_BKPT, DSCRV8_ENTRY_EXCEPTION_CATCH, DSCRV8_ENTRY_EXT_DEBUG, DSCRV8_ENTRY_HALT_STEP, DSCRV8_ENTRY_HALT_STEP_EXECLU, DSCRV8_ENTRY_HALT_STEP_NORMAL, DSCRV8_ENTRY_HLT, DSCRV8_ENTRY_OS_UNLOCK, DSCRV8_ENTRY_RESET_CATCH, DSCRV8_ENTRY_SW_ACCESS_DBG, DSCRV8_ENTRY_WATCHPOINT, arm_dpm::last_el, and arm::target.
Referenced by aarch64_debug_entry().
◆ armv8_dpm_setup()
| int armv8_dpm_setup | ( | struct arm_dpm * | dpm | ) |
Hooks up this DPM to its associated target; call only once.
This wraps an implementation of DPM primitives.
Initially this only covers the register cache.
Oh, and watchpoints. Yeah.
Definition at line 1392 of file armv8_dpm.c.
References target_type::add_breakpoint, target_type::add_watchpoint, arm_dpm::arm, arm_dpm::arm_reg_current, armv8_build_reg_cache(), armv8_dpm_full_context(), armv8_dpm_read_core_reg(), armv8_dpm_write_core_reg(), armv8_reg_current(), arm_dpm::bpwp_disable, arm::core_cache, arm_dpm::dbp, arm_dpm::didr, arm::dpm, dpmv8_add_breakpoint(), dpmv8_add_watchpoint(), dpmv8_bpwp_disable(), dpmv8_dpm_finish(), dpmv8_dpm_prepare(), dpmv8_instr_cpsr_sync(), dpmv8_instr_execute(), dpmv8_instr_read_data_dcc(), dpmv8_instr_read_data_dcc_64(), dpmv8_instr_read_data_r0(), dpmv8_instr_read_data_r0_64(), dpmv8_instr_write_data_dcc(), dpmv8_instr_write_data_dcc_64(), dpmv8_instr_write_data_r0(), dpmv8_instr_write_data_r0_64(), dpmv8_mcr(), dpmv8_mrc(), dpmv8_remove_breakpoint(), dpmv8_remove_watchpoint(), arm_dpm::dwp, ERROR_FAIL, ERROR_OK, arm_dpm::finish, arm::full_context, arm_dpm::instr_cpsr_sync, arm_dpm::instr_execute, arm_dpm::instr_read_data_dcc, arm_dpm::instr_read_data_dcc_64, arm_dpm::instr_read_data_r0, arm_dpm::instr_read_data_r0_64, arm_dpm::instr_write_data_dcc, arm_dpm::instr_write_data_dcc_64, arm_dpm::instr_write_data_r0, arm_dpm::instr_write_data_r0_64, LOG_INFO, arm::mcr, arm::mrc, arm_dpm::nbp, arm_dpm::nwp, arm_dpm::prepare, arm::read_core_reg, target_type::remove_breakpoint, target_type::remove_watchpoint, arm::target, target_name(), target::type, and arm::write_core_reg.
Referenced by aarch64_dpm_setup().
◆ armv8_dpm_write_core_reg()
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Definition at line 989 of file armv8_dpm.c.
References arm::core_cache, arm::dpm, dpmv8_write_reg(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, arm_dpm::finish, reg_cache::num_regs, arm_dpm::prepare, and target_to_arm().
Referenced by armv8_dpm_setup().
◆ armv8_dpm_write_dirty_registers()
| int armv8_dpm_write_dirty_registers | ( | struct arm_dpm * | dpm, |
| bool | bpwp | ||
| ) |
Writes all modified core registers for all processor modes.
In normal operation this is called on exit from halting debug state.
- Parameters
-
dpm represents the processor bpwp true ensures breakpoints and watchpoints are set, false ensures they are cleared
Definition at line 863 of file armv8_dpm.c.
References target_type::add_breakpoint, reg::arch_info, arm_dpm::arm, ARM_MODE_ANY, armv8_curel_from_core_mode(), armv8_dpm_modeswitch(), ARMV8_PC, ARMV8_XPSR, dpm_bp::bp, dpm_bp::bpwp, dpm_wp::bpwp, arm::core_cache, arm_dpm::dbp, reg::dirty, arm::dpm, dpmv8_add_breakpoint(), dpmv8_maybe_update_bpwp(), dpmv8_write_reg(), arm_dpm::dwp, ERROR_OK, reg::exist, arm_dpm::finish, arm_dpm::instr_cpsr_sync, breakpoint::is_set, watchpoint::is_set, arm_dpm::last_el, arm_reg::mode, arm_dpm::nbp, NULL, reg_cache::num_regs, arm_dpm::nwp, arm_dpm::prepare, reg_cache::reg_list, arm::target, target::type, reg::valid, and dpm_wp::wp.
Referenced by aarch64_restore_context().
◆ dpmv8_add_breakpoint()
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Definition at line 1154 of file armv8_dpm.c.
References breakpoint::address, BKPT_SOFT, dpm_bp::bp, dpm_bp::bpwp, arm_dpm::bpwp_enable, arm_dpm::dbp, arm::dpm, dpmv8_bpwp_setup(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, breakpoint::length, LOG_DEBUG, arm_dpm::nbp, target_to_arm(), and breakpoint::type.
Referenced by armv8_dpm_setup(), and armv8_dpm_write_dirty_registers().
◆ dpmv8_add_watchpoint()
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Definition at line 1238 of file armv8_dpm.c.
References arm_dpm::bpwp_enable, arm::dpm, dpmv8_watchpoint_setup(), arm_dpm::dwp, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, arm_dpm::nwp, target_to_arm(), and dpm_wp::wp.
Referenced by armv8_dpm_setup().
◆ dpmv8_bpwp_disable()
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Definition at line 454 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, CPUV8_DBG_BCR_BASE, CPUV8_DBG_WCR_BASE, armv8_common::debug_ap, armv8_common::debug_base, armv8_common::dpm, ERROR_FAIL, LOG_DEBUG, and mem_ap_write_atomic_u32().
Referenced by armv8_dpm_setup().
◆ dpmv8_bpwp_setup()
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Definition at line 1097 of file armv8_dpm.c.
References addr, dpm_bpwp::address, dpm_bpwp::control, dpm_bpwp::dirty, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, length, LOG_DEBUG, LOG_ERROR, and dpm_bpwp::number.
Referenced by dpmv8_add_breakpoint(), and dpmv8_watchpoint_setup().
◆ dpmv8_dpm_finish()
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◆ dpmv8_dpm_prepare()
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Definition at line 153 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, CPUV8_DBG_DSCR, CPUV8_DBG_DTRRX, armv8_common::debug_ap, armv8_common::debug_base, armv8_common::dpm, arm_dpm::dscr, DSCR_DTR_RX_FULL, DSCR_ITE, ERROR_FAIL, ERROR_OK, LOG_ERROR, mem_ap_read_atomic_u32(), mem_ap_read_u32(), and timeval_ms().
Referenced by armv8_dpm_setup().
◆ dpmv8_exec_opcode()
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Definition at line 197 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, ARM_STATE_AARCH64, armv8_dpm_get_core_state(), armv8_dpm_handle_exception(), CPUV8_DBG_DSCR, CPUV8_DBG_ITR, armv8_common::debug_ap, armv8_common::debug_base, armv8_common::dpm, arm_dpm::dscr, DSCR_ERR, DSCR_ITE, ERROR_FAIL, ERROR_OK, arm_dpm::last_el, LOG_DEBUG, LOG_ERROR, mem_ap_read_atomic_u32(), mem_ap_write_u32(), T32_FMTITR, and timeval_ms().
Referenced by dpmv8_instr_cpsr_sync(), dpmv8_instr_execute(), dpmv8_instr_read_data_dcc(), dpmv8_instr_read_data_dcc_64(), dpmv8_instr_read_data_r0(), dpmv8_instr_read_data_r0_64(), dpmv8_instr_write_data_dcc(), dpmv8_instr_write_data_dcc_64(), dpmv8_instr_write_data_r0(), and dpmv8_instr_write_data_r0_64().
◆ dpmv8_instr_cpsr_sync()
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Definition at line 333 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, ARMV8_OPC_DSB_SY, ARMV8_OPC_ISB_SY, armv8_common::dpm, dpmv8_exec_opcode(), arm_dpm::dscr, and ERROR_OK.
Referenced by armv8_dpm_setup().
◆ dpmv8_instr_execute()
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Definition at line 262 of file armv8_dpm.c.
References armv8_common::dpm, dpmv8_exec_opcode(), and NULL.
Referenced by armv8_dpm_setup().
◆ dpmv8_instr_read_data_dcc()
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Definition at line 345 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, armv8_common::dpm, dpmv8_exec_opcode(), dpmv8_read_dcc(), arm_dpm::dscr, and ERROR_OK.
Referenced by armv8_dpm_setup().
◆ dpmv8_instr_read_data_dcc_64()
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Definition at line 359 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, armv8_common::dpm, dpmv8_exec_opcode(), dpmv8_read_dcc_64(), arm_dpm::dscr, and ERROR_OK.
Referenced by armv8_dpm_setup().
◆ dpmv8_instr_read_data_r0()
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Definition at line 373 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, armv8_common::dpm, dpmv8_exec_opcode(), dpmv8_read_dcc(), arm_dpm::dscr, ERROR_OK, and WRITE_REG_DTRTX.
Referenced by armv8_dpm_setup(), and dpmv8_instr_read_data_r0_64().
◆ dpmv8_instr_read_data_r0_64()
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Definition at line 392 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, ARM_STATE_AARCH64, ARMV8_MSR_GP, arm::core_state, armv8_common::dpm, dpmv8_exec_opcode(), dpmv8_instr_read_data_r0(), dpmv8_read_dcc_64(), arm_dpm::dscr, ERROR_OK, and SYSTEM_DBG_DBGDTR_EL0.
Referenced by armv8_dpm_setup().
◆ dpmv8_instr_write_data_dcc()
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Definition at line 267 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, armv8_common::dpm, dpmv8_exec_opcode(), dpmv8_write_dcc(), and ERROR_OK.
Referenced by armv8_dpm_setup().
◆ dpmv8_instr_write_data_dcc_64()
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Definition at line 280 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, armv8_common::dpm, dpmv8_exec_opcode(), dpmv8_write_dcc_64(), and ERROR_OK.
Referenced by armv8_dpm_setup().
◆ dpmv8_instr_write_data_r0()
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Definition at line 293 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, armv8_common::dpm, dpmv8_exec_opcode(), dpmv8_write_dcc(), DSCR_ITE, ERROR_OK, and READ_REG_DTRRX.
Referenced by armv8_dpm_setup(), and dpmv8_instr_write_data_r0_64().
◆ dpmv8_instr_write_data_r0_64()
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Definition at line 312 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, ARM_STATE_AARCH64, ARMV8_MRS, arm::core_state, armv8_common::dpm, dpmv8_exec_opcode(), dpmv8_instr_write_data_r0(), dpmv8_write_dcc_64(), arm_dpm::dscr, ERROR_OK, and SYSTEM_DBG_DBGDTR_EL0.
Referenced by armv8_dpm_setup().
◆ dpmv8_maybe_update_bpwp()
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Definition at line 811 of file armv8_dpm.c.
References dpm_bpwp::address, arm_dpm::arm, arm_dpm::bpwp_disable, arm_dpm::bpwp_enable, dpm_bpwp::control, dpm_bpwp::dirty, ERROR_OK, LOG_ERROR, dpm_bpwp::number, arm::target, and target_name().
Referenced by armv8_dpm_write_dirty_registers().
◆ dpmv8_mcr()
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Definition at line 508 of file armv8_dpm.c.
References ARMV4_5_MCR, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, LOG_DEBUG, arm_dpm::prepare, and target_to_arm().
Referenced by armv8_dpm_setup().
◆ dpmv8_mrc()
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Definition at line 483 of file armv8_dpm.c.
References ARMV4_5_MRC, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_read_data_r0, LOG_DEBUG, arm_dpm::prepare, and target_to_arm().
Referenced by armv8_dpm_setup().
◆ dpmv8_read_dcc()
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Definition at line 74 of file armv8_dpm.c.
References CPUV8_DBG_DSCR, CPUV8_DBG_DTRTX, armv8_common::debug_ap, armv8_common::debug_base, DSCR_DTR_TX_FULL, DSCR_ITE, ERROR_FAIL, ERROR_OK, LOG_ERROR, mem_ap_read_atomic_u32(), and timeval_ms().
Referenced by dpmv8_instr_read_data_dcc(), and dpmv8_instr_read_data_r0().
◆ dpmv8_read_dcc_64()
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Definition at line 109 of file armv8_dpm.c.
References CPUV8_DBG_DSCR, CPUV8_DBG_DTRRX, CPUV8_DBG_DTRTX, armv8_common::debug_ap, armv8_common::debug_base, DSCR_DTR_TX_FULL, DSCR_ITE, ERROR_FAIL, ERROR_OK, LOG_ERROR, mem_ap_read_atomic_u32(), and timeval_ms().
Referenced by dpmv8_instr_read_data_dcc_64(), and dpmv8_instr_read_data_r0_64().
◆ dpmv8_read_reg()
Definition at line 642 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, buf_set_u64(), reg::dirty, armv8_common::dpm, ERROR_FAIL, ERROR_OK, LOG_DEBUG, LOG_ERROR, reg::name, armv8_common::read_reg_u128, armv8_common::read_reg_u64, reg::size, reg::valid, and reg::value.
Referenced by armv8_dpm_full_context(), armv8_dpm_read_core_reg(), and armv8_dpm_read_current_registers().
◆ dpmv8_remove_breakpoint()
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Definition at line 1182 of file armv8_dpm.c.
References dpm_bp::bp, dpm_bp::bpwp, arm_dpm::dbp, dpm_bpwp::dirty, arm::dpm, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, arm_dpm::nbp, NULL, and target_to_arm().
Referenced by armv8_dpm_setup().
◆ dpmv8_remove_watchpoint()
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Definition at line 1256 of file armv8_dpm.c.
References dpm_wp::bpwp, dpm_bpwp::dirty, arm::dpm, arm_dpm::dwp, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, NULL, arm_dpm::nwp, target_to_arm(), and dpm_wp::wp.
Referenced by armv8_dpm_setup().
◆ dpmv8_watchpoint_setup()
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Definition at line 1202 of file armv8_dpm.c.
References watchpoint::address, dpm_wp::bpwp, dpm_bpwp::control, dpmv8_bpwp_setup(), arm_dpm::dwp, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, watchpoint::length, LOG_DEBUG, watchpoint::mask, watchpoint::rw, watchpoint::value, dpm_wp::wp, WPT_ACCESS, WPT_READ, and WPT_WRITE.
Referenced by dpmv8_add_watchpoint().
◆ dpmv8_write_dcc()
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Definition at line 57 of file armv8_dpm.c.
References CPUV8_DBG_DTRRX, armv8_common::debug_ap, armv8_common::debug_base, and mem_ap_write_u32().
Referenced by dpmv8_instr_write_data_dcc(), and dpmv8_instr_write_data_r0().
◆ dpmv8_write_dcc_64()
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Definition at line 63 of file armv8_dpm.c.
References CPUV8_DBG_DTRRX, CPUV8_DBG_DTRTX, armv8_common::debug_ap, armv8_common::debug_base, ERROR_OK, and mem_ap_write_u32().
Referenced by dpmv8_instr_write_data_dcc_64(), and dpmv8_instr_write_data_r0_64().
◆ dpmv8_write_reg()
Definition at line 685 of file armv8_dpm.c.
References arm::arch_info, arm_dpm::arm, buf_get_u64(), reg::dirty, armv8_common::dpm, ERROR_FAIL, ERROR_OK, LOG_DEBUG, LOG_ERROR, reg::name, reg::size, reg::value, armv8_common::write_reg_u128, and armv8_common::write_reg_u64.
Referenced by armv8_dpm_write_core_reg(), and armv8_dpm_write_dirty_registers().
