This provides lowlevel glue to the EmbeddedICE (or EmbeddedICE-RT) module found on scan chain 2 in ARM7, ARM9, and some other families of ARM cores. More...

Include dependency graph for embeddedice.c:

Functions
struct reg_cache *	embeddedice_build_reg_cache (struct target target, struct arm7_9_common arm7_9)
	Probe EmbeddedICE module and set up local records of its registers. More...

void	embeddedice_free_reg_cache (struct reg_cache *reg_cache)
	Free all memory allocated for EmbeddedICE register cache. More...

static int	embeddedice_get_reg (struct reg *reg)

int	embeddedice_handshake (struct arm_jtag *jtag_info, int hsbit, uint32_t timeout)
	Poll DCC control register until read or write handshake completes. More...

int	embeddedice_read_reg (struct reg *reg)
	Queue a read for an EmbeddedICE register into the register cache, not checking the value read. More...

int	embeddedice_read_reg_w_check (struct reg reg, uint8_t check_value, uint8_t *check_mask)
	Queue a read for an EmbeddedICE register into the register cache, optionally checking the value read. More...

int	embeddedice_receive (struct arm_jtag jtag_info, uint32_t data, uint32_t size)
	Receive a block of size 32-bit words from the DCC. More...

int	embeddedice_send (struct arm_jtag jtag_info, uint32_t data, uint32_t size)
	Send a block of size 32-bit words to the DCC. More...

void	embeddedice_set_reg (struct reg *reg, uint32_t value)
	Queue a write for an EmbeddedICE register, updating the register cache. More...

static int	embeddedice_set_reg_w_exec (struct reg reg, uint8_t buf)
	Write an EmbeddedICE register, updating the register cache. More...

int	embeddedice_setup (struct target *target)
	Initialize EmbeddedICE module, if needed. More...

void	embeddedice_store_reg (struct reg *reg)
	Queue a write for an EmbeddedICE register, using cached value. More...

void	embeddedice_write_dcc (struct jtag_tap tap, int reg_addr, const uint8_t buffer, int little, int count)
	This is an inner loop of the open loop DCC write of data to target. More...

void	embeddedice_write_reg (struct reg *reg, uint32_t value)
	Queue a write for an EmbeddedICE register, bypassing the register cache. More...

Variables
static const struct reg_arch_type	eice_reg_type

struct {
unsigned short addr

const char * name

unsigned short width

}	eice_regs []

Detailed Description

This provides lowlevel glue to the EmbeddedICE (or EmbeddedICE-RT) module found on scan chain 2 in ARM7, ARM9, and some other families of ARM cores.

The module is called "EmbeddedICE-RT" if it has monitor mode support.

EmbeddedICE provides basic watchpoint/breakpoint hardware and a Debug Communications Channel (DCC) used to read or write 32-bit words to OpenOCD-aware code running on the target CPU. Newer modules also include vector catch hardware. Some versions support hardware single-stepping, "monitor mode" debug (which is not currently supported by OpenOCD), or extended reporting on why the core entered debug mode.

Definition in file embeddedice.c.

Function Documentation

◆ embeddedice_build_reg_cache()

struct reg_cache* embeddedice_build_reg_cache	(	struct target *	target,
		struct arm7_9_common *	arm7_9
	)

Probe EmbeddedICE module and set up local records of its registers.

Different versions of the modules have different capabilities, such as hardware support for vector_catch, single stepping, and monitor mode.

Definition at line 162 of file embeddedice.c.

References embeddedice_reg::addr, reg::arch_info, ARRAY_SIZE, buf_get_u32(), reg::dirty, EICE_COMMS_CTRL, EICE_DBG_CTRL, EICE_DBG_STAT, eice_reg_type, eice_regs, embeddedice_read_reg(), ERROR_OK, arm7_9_common::has_monitor_mode, arm7_9_common::has_single_step, arm7_9_common::has_vector_catch, jtag_execute_queue(), arm7_9_common::jtag_info, embeddedice_reg::jtag_info, LOG_ERROR, LOG_INFO, reg::name, reg_cache::name, reg_cache::next, NULL, reg_cache::num_regs, reg_cache::reg_list, reg::size, target_name(), target_type_name(), reg::type, reg::valid, reg::value, and arm7_9_common::wp_available_max.

Referenced by arm7_9_examine().

◆ embeddedice_free_reg_cache()

void embeddedice_free_reg_cache ( struct reg_cache * reg_cache )

Free all memory allocated for EmbeddedICE register cache.

Definition at line 298 of file embeddedice.c.

References reg::arch_info, reg_cache::num_regs, reg_cache::reg_list, and reg::value.

Referenced by arm7_9_deinit().

◆ embeddedice_get_reg()

static int embeddedice_get_reg ( struct reg * reg )

static

Definition at line 137 of file embeddedice.c.

◆ embeddedice_handshake()

int embeddedice_handshake	(	struct arm_jtag *	jtag_info,
		int	hsbit,
		uint32_t	timeout
	)

Poll DCC control register until read or write handshake completes.

Definition at line 577 of file embeddedice.c.

References arm_jtag_scann(), arm_jtag_set_instr(), buf_get_u32(), EICE_COMM_CTRL_RBIT, EICE_COMM_CTRL_WBIT, EICE_COMMS_DATA, eice_regs, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, ERROR_TARGET_TIMEOUT, gettimeofday(), scan_field::in_value, arm_jtag::intest_instr, jtag_add_dr_scan(), jtag_execute_queue(), LOG_ERROR, NULL, scan_field::num_bits, scan_field::out_value, arm_jtag::tap, TAP_IDLE, timeval_add_time(), and timeval_compare().

Referenced by ocl_erase(), ocl_probe(), and ocl_write().

◆ embeddedice_read_reg()

int embeddedice_read_reg ( struct reg * reg )

Queue a read for an EmbeddedICE register into the register cache, not checking the value read.

Definition at line 464 of file embeddedice.c.

References embeddedice_read_reg_w_check(), and NULL.

Referenced by arm720t_soft_reset_halt(), arm7_9_execute_sys_speed(), arm7_9_handle_target_request(), arm7_9_poll(), arm7_9_setup_semihosting(), arm7_9_soft_reset_halt(), arm7tdmi_branch_resume_thumb(), arm920t_soft_reset_halt(), arm926ejs_examine_debug_reason(), arm926ejs_soft_reset_halt(), arm9tdmi_branch_resume_thumb(), embeddedice_build_reg_cache(), and embeddedice_setup().

◆ embeddedice_read_reg_w_check()

int embeddedice_read_reg_w_check	(	struct reg *	reg,
		uint8_t *	check_value,
		uint8_t *	check_mask
	)

Queue a read for an EmbeddedICE register into the register cache, optionally checking the value read.

Note that at this level, all registers are 32 bits wide.

Definition at line 342 of file embeddedice.c.

References embeddedice_reg::addr, reg::arch_info, arm_jtag_scann(), arm_jtag_set_instr(), scan_field::check_mask, scan_field::check_value, EICE_COMMS_CTRL, eice_regs, ERROR_OK, scan_field::in_value, arm_jtag::intest_instr, jtag_add_dr_scan(), jtag_add_dr_scan_check(), embeddedice_reg::jtag_info, NULL, scan_field::num_bits, scan_field::out_value, arm_jtag::tap, TAP_IDLE, and reg::value.

Referenced by arm7_9_execute_fast_sys_speed(), and embeddedice_read_reg().

◆ embeddedice_receive()

int embeddedice_receive	(	struct arm_jtag *	jtag_info,
		uint32_t *	data,
		uint32_t	size
	)

Receive a block of size 32-bit words from the DCC.

We assume the target is always going to be fast enough (relative to the JTAG clock) that the debugger won't need to poll the handshake bit. The JTAG clock is usually at least six times slower than the functional clock, so the 50+ JTAG clocks needed to receive the word allow hundreds of instruction cycles (per word) in the target.

Definition at line 412 of file embeddedice.c.

References arm_jtag_scann(), arm_jtag_set_instr(), arm_le_to_h_u32(), EICE_COMMS_CTRL, EICE_COMMS_DATA, eice_regs, ERROR_OK, scan_field::in_value, arm_jtag::intest_instr, jtag_add_callback(), jtag_add_dr_scan(), jtag_execute_queue(), NULL, scan_field::num_bits, scan_field::out_value, size, arm_jtag::tap, and TAP_IDLE.

Referenced by arm7_9_handle_target_request(), arm7_9_target_request_data(), ocl_erase(), ocl_probe(), and ocl_write().

◆ embeddedice_send()

int embeddedice_send	(	struct arm_jtag *	jtag_info,
		uint32_t *	data,
		uint32_t	size
	)

Send a block of size 32-bit words to the DCC.

We assume the target is always going to be fast enough (relative to the JTAG clock) that the debugger won't need to poll the handshake bit. The JTAG clock is usually at least six times slower than the functional clock, so the 50+ JTAG clocks needed to receive the word allow hundreds of instruction cycles (per word) in the target.

Definition at line 532 of file embeddedice.c.

References arm_jtag_scann(), arm_jtag_set_instr(), buf_set_u32(), EICE_COMMS_DATA, eice_regs, ERROR_OK, scan_field::in_value, arm_jtag::intest_instr, jtag_add_dr_scan(), NULL, scan_field::num_bits, scan_field::out_value, size, arm_jtag::tap, and TAP_IDLE.

Referenced by ocl_erase(), ocl_probe(), and ocl_write().

◆ embeddedice_set_reg()

void embeddedice_set_reg	(	struct reg *	reg,
		uint32_t	value
	)

Queue a write for an EmbeddedICE register, updating the register cache.

Uses embeddedice_write_reg().

Definition at line 473 of file embeddedice.c.

References buf_set_u32(), reg::dirty, embeddedice_write_reg(), reg::size, reg::valid, and reg::value.

Referenced by arm7_9_set_breakpoint(), arm7_9_set_software_breakpoints(), arm7_9_set_watchpoint(), arm7_9_unset_breakpoint(), arm7_9_unset_watchpoint(), and embeddedice_set_reg_w_exec().

◆ embeddedice_set_reg_w_exec()

static int embeddedice_set_reg_w_exec	(	struct reg *	reg,
		uint8_t *	buf
	)

static

Write an EmbeddedICE register, updating the register cache.

Uses embeddedice_set_reg(); not queued.

Definition at line 487 of file embeddedice.c.

References buf_get_u32(), embeddedice_set_reg(), ERROR_OK, jtag_execute_queue(), LOG_ERROR, and reg::size.

Referenced by embeddedice_setup().

◆ embeddedice_setup()

int embeddedice_setup ( struct target * target )

Initialize EmbeddedICE module, if needed.

Definition at line 314 of file embeddedice.c.

References buf_set_u32(), arm7_9_common::eice_cache, EICE_DBG_CTRL, embeddedice_read_reg(), embeddedice_set_reg_w_exec(), ERROR_OK, arm7_9_common::has_monitor_mode, jtag_execute_queue(), reg_cache::reg_list, target_to_arm7_9(), and reg::value.

Referenced by arm7_9_examine().

◆ embeddedice_store_reg()

void embeddedice_store_reg ( struct reg * reg )

Queue a write for an EmbeddedICE register, using cached value.

Uses embeddedice_write_reg().

Definition at line 519 of file embeddedice.c.

References buf_get_u32(), embeddedice_write_reg(), reg::size, and reg::value.

Referenced by arm7_9_clear_halt(), arm7_9_debug_entry(), arm7_9_disable_eice_step(), arm7_9_halt(), arm7_9_setup_semihosting(), arm7_9_soft_reset_halt(), arm7_9_write_memory(), arm9tdmi_disable_single_step(), arm9tdmi_enable_single_step(), feroceon_disable_single_step(), and feroceon_set_dbgrq().

◆ embeddedice_write_dcc()

void embeddedice_write_dcc	(	struct jtag_tap *	tap,
		int	reg_addr,
		const uint8_t *	buffer,
		int	little,
		int	count
	)

This is an inner loop of the open loop DCC write of data to target.

Definition at line 640 of file embeddedice.c.

References buffer, count, embeddedice_write_reg_inner(), and fast_target_buffer_get_u32().

Referenced by arm7_9_dcc_completion().

◆ embeddedice_write_reg()

void embeddedice_write_reg	(	struct reg *	reg,
		uint32_t	value
	)

Queue a write for an EmbeddedICE register, bypassing the register cache.

Definition at line 501 of file embeddedice.c.

References embeddedice_reg::addr, reg::arch_info, arm_jtag_scann(), arm_jtag_set_instr(), embeddedice_write_reg_inner(), arm_jtag::intest_instr, embeddedice_reg::jtag_info, LOG_DEBUG, NULL, arm_jtag::tap, and TAP_IDLE.

Referenced by arm7_9_assert_reset(), arm7_9_clear_watchpoints(), arm7_9_dcc_completion(), arm7_9_enable_eice_step(), arm7_9_halt(), arm7_9_resume(), embeddedice_set_reg(), embeddedice_store_reg(), feroceon_bulk_write_memory(), and feroceon_enable_single_step().

Variable Documentation

◆ addr

unsigned short addr

Definition at line 46 of file embeddedice.c.

◆ eice_reg_type

const struct reg_arch_type eice_reg_type

static

Initial value:

= {
    .get = embeddedice_get_reg,
    .set = embeddedice_set_reg_w_exec,
}

Definition at line 137 of file embeddedice.c.

Referenced by embeddedice_build_reg_cache().

◆

const { ... } eice_regs[]

Referenced by embeddedice_build_reg_cache(), embeddedice_handshake(), embeddedice_read_reg_w_check(), embeddedice_receive(), and embeddedice_send().

◆ name

const char* name

Definition at line 45 of file embeddedice.c.

◆ width

unsigned short width

Definition at line 47 of file embeddedice.c.

Referenced by __attribute__(), abstract_memory_size(), access_memory_command(), COMMAND_HANDLER(), guess_addr_width(), read_memory_abstract(), rtp_rom_loop(), sam3_reg_fieldname(), sam4_reg_fieldname(), target_array2mem(), target_jim_read_memory(), target_jim_write_memory(), target_mem2array(), and write_memory_abstract().

Functions

Variables

Detailed Description

Function Documentation

◆ embeddedice_build_reg_cache()

◆ embeddedice_free_reg_cache()

◆ embeddedice_get_reg()

◆ embeddedice_handshake()

◆ embeddedice_read_reg()

◆ embeddedice_read_reg_w_check()

◆ embeddedice_receive()

◆ embeddedice_send()

◆ embeddedice_set_reg()

◆ embeddedice_set_reg_w_exec()

◆ embeddedice_setup()

◆ embeddedice_store_reg()

◆ embeddedice_write_dcc()

◆ embeddedice_write_reg()

Variable Documentation

◆ addr

◆ eice_reg_type

◆

◆ name

◆ width