OpenOCD
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Implements various ARM DPM operations using architectural debug registers. More...
Go to the source code of this file.
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static int | arm_dpm_full_context (struct target *target) |
int | arm_dpm_initialize (struct arm_dpm *dpm) |
Reinitializes DPM state at the beginning of a new debug session or after a reset which may have affected the debug module. More... | |
int | arm_dpm_modeswitch (struct arm_dpm *dpm, enum arm_mode mode) |
static int | arm_dpm_read_core_reg (struct target *target, struct reg *r, int regnum, enum arm_mode mode) |
int | arm_dpm_read_current_registers (struct arm_dpm *dpm) |
Read basic registers of the current context: R0 to R15, and CPSR; sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb). More... | |
int | arm_dpm_read_reg (struct arm_dpm *dpm, struct reg *r, unsigned regnum) |
void | arm_dpm_report_dscr (struct arm_dpm *dpm, uint32_t dscr) |
void | arm_dpm_report_wfar (struct arm_dpm *dpm, uint32_t addr) |
int | arm_dpm_setup (struct arm_dpm *dpm) |
Hooks up this DPM to its associated target; call only once. More... | |
static int | arm_dpm_write_core_reg (struct target *target, struct reg *r, int regnum, enum arm_mode mode, uint8_t *value) |
int | arm_dpm_write_dirty_registers (struct arm_dpm *dpm, bool bpwp) |
Writes all modified core registers for all processor modes. More... | |
static int | dpm_add_breakpoint (struct target *target, struct breakpoint *bp) |
static int | dpm_add_watchpoint (struct target *target, struct watchpoint *wp) |
static int | dpm_bpwp_setup (struct arm_dpm *dpm, struct dpm_bpwp *xp, uint32_t addr, uint32_t length) |
static enum arm_mode | dpm_mapmode (struct arm *arm, unsigned num, enum arm_mode mode) |
static int | dpm_maybe_update_bpwp (struct arm_dpm *dpm, bool bpwp, struct dpm_bpwp *xp, bool *set_p) |
static int | dpm_mcr (struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t crn, uint32_t crm, uint32_t value) |
static int | dpm_mrc (struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t crn, uint32_t crm, uint32_t *value) |
static int | dpm_read_reg_u64 (struct arm_dpm *dpm, struct reg *r, unsigned regnum) |
static int | dpm_remove_breakpoint (struct target *target, struct breakpoint *bp) |
static int | dpm_remove_watchpoint (struct target *target, struct watchpoint *wp) |
static int | dpm_watchpoint_setup (struct arm_dpm *dpm, unsigned index_t, struct watchpoint *wp) |
static int | dpm_write_pc_core_state (struct arm_dpm *dpm, struct reg *r) |
Write to program counter and switch the core state (arm/thumb) according to the address. More... | |
static int | dpm_write_reg (struct arm_dpm *dpm, struct reg *r, unsigned regnum) |
static int | dpm_write_reg_u64 (struct arm_dpm *dpm, struct reg *r, unsigned regnum) |
Implements various ARM DPM operations using architectural debug registers.
These routines layer over core-specific communication methods to cope with implementation differences between cores like ARM1136 and Cortex-A8.
The "Debug Programmers' Model" (DPM) for ARMv6 and ARMv7 is defined by Part C (Debug Architecture) of the ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition (ARM DDI 0406B). In OpenOCD, DPM operations are abstracted through internal programming interfaces to share code and to minimize needless differences in debug behavior between cores.
Definition in file arm_dpm.c.
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Definition at line 727 of file arm_dpm.c.
References reg::arch_info, arm_dpm_modeswitch(), arm_dpm_read_reg(), ARM_MODE_ANY, ARM_MODE_USR, arm::core_cache, arm::dpm, ERROR_OK, reg::exist, arm_dpm::finish, arm_reg::mode, mode, arm_reg::num, reg_cache::num_regs, arm_dpm::prepare, reg_cache::reg_list, target_to_arm(), and reg::valid.
Referenced by arm_dpm_setup().
int arm_dpm_initialize | ( | struct arm_dpm * | dpm | ) |
Reinitializes DPM state at the beginning of a new debug session or after a reset which may have affected the debug module.
Definition at line 1114 of file arm_dpm.c.
References arm_dpm::arm, dpm_bp::bpwp, dpm_wp::bpwp, arm_dpm::bpwp_disable, arm_dpm::dbp, arm_dpm::dwp, ERROR_OK, LOG_WARNING, arm_dpm::nbp, dpm_bpwp::number, arm_dpm::nwp, arm::target, and target_name().
Referenced by arm11_dpm_init(), and cortex_a_dpm_setup().
Definition at line 100 of file arm_dpm.c.
References arm_dpm::arm, ARM_MODE_ANY, ARMV4_5_MSR_GP, buf_get_u32(), arm::cpsr, ERROR_OK, arm_dpm::instr_cpsr_sync, arm_dpm::instr_write_data_r0, mode, and reg::value.
Referenced by arm_dpm_full_context(), arm_dpm_read_core_reg(), arm_dpm_write_core_reg(), arm_dpm_write_dirty_registers(), cortex_a_internal_restore(), cortex_a_post_debug_entry(), cortex_a_post_memaccess(), and cortex_a_prep_memaccess().
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Definition at line 642 of file arm_dpm.c.
References arm_dpm::arm, arm_dpm_modeswitch(), arm_dpm_read_reg(), ARM_MODE_ANY, ARM_VFP_V3_D0, ARM_VFP_V3_FPSCR, arm::dpm, dpm_mapmode(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, arm_dpm::finish, mode, arm_dpm::prepare, and target_to_arm().
Referenced by arm_dpm_setup().
int arm_dpm_read_current_registers | ( | struct arm_dpm * | dpm | ) |
Read basic registers of the current context: R0 to R15, and CPSR; sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb).
In normal operation this is called on entry to halting debug state, possibly after some other operations supporting restore of debug state or making sure the CPU is fully idle (drain write buffer, etc).
Definition at line 333 of file arm_dpm.c.
References arm_dpm::arm, arm_dpm_read_reg(), arm_reg_current(), arm_set_cpsr(), ARMV4_5_MRS, arm::core_cache, arm::cpsr, reg::dirty, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_read_data_r0, arm_dpm::prepare, reg_cache::reg_list, and reg::valid.
Referenced by arm11_debug_entry(), and cortex_a_debug_entry().
Definition at line 163 of file arm_dpm.c.
References arm_dpm::arm, ARM_STATE_ARM, ARM_STATE_JAZELLE, ARM_STATE_THUMB, ARM_STATE_THUMB_EE, ARM_VFP_V3_D0, ARM_VFP_V3_D31, ARM_VFP_V3_FPSCR, ARMV4_5_MCR, ARMV4_5_MRS, ARMV4_5_VMRS, buf_set_u32(), arm::core_state, reg::dirty, dpm_read_reg_u64(), ERROR_OK, arm_dpm::instr_read_data_dcc, arm_dpm::instr_read_data_r0, LOG_DEBUG, LOG_WARNING, reg::name, reg::valid, and reg::value.
Referenced by arm_dpm_full_context(), arm_dpm_read_core_reg(), arm_dpm_read_current_registers(), and cortex_a_debug_entry().
void arm_dpm_report_dscr | ( | struct arm_dpm * | dpm, |
uint32_t | dscr | ||
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Definition at line 1011 of file arm_dpm.c.
References arm_dpm::arm, DBG_REASON_BREAKPOINT, DBG_REASON_DBGRQ, DBG_REASON_UNDEFINED, DBG_REASON_WATCHPOINT, target::debug_reason, arm_dpm::dscr, DSCR_ENTRY, DSCR_ENTRY_BKPT_INSTR, DSCR_ENTRY_BREAKPOINT, DSCR_ENTRY_EXT_DBG_REQ, DSCR_ENTRY_HALT_REQ, DSCR_ENTRY_IMPRECISE_WATCHPT, DSCR_ENTRY_PRECISE_WATCHPT, and arm::target.
Referenced by arm11_check_init(), arm11_debug_entry(), and cortex_a_debug_entry().
void arm_dpm_report_wfar | ( | struct arm_dpm * | dpm, |
uint32_t | addr | ||
) |
Definition at line 987 of file arm_dpm.c.
References addr, arm_dpm::arm, ARM_STATE_AARCH64, ARM_STATE_ARM, ARM_STATE_JAZELLE, ARM_STATE_THUMB, ARM_STATE_THUMB_EE, arm::core_state, and arm_dpm::wp_addr.
Referenced by arm11_debug_entry(), and cortex_a_debug_entry().
int arm_dpm_setup | ( | struct arm_dpm * | dpm | ) |
Hooks up this DPM to its associated target; call only once.
Initially this only covers the register cache.
Oh, and watchpoints. Yeah.
Definition at line 1049 of file arm_dpm.c.
References target_type::add_breakpoint, target_type::add_watchpoint, arm_dpm::arm, arm_build_reg_cache(), arm_dpm_full_context(), arm_dpm_read_core_reg(), arm_dpm_write_core_reg(), arm_free_reg_cache(), arm::core_cache, arm_dpm::dbp, arm_dpm::didr, arm::dpm, dpm_add_breakpoint(), dpm_add_watchpoint(), dpm_mcr(), dpm_mrc(), dpm_remove_breakpoint(), dpm_remove_watchpoint(), arm_dpm::dwp, ERROR_FAIL, ERROR_OK, arm::full_context, LOG_INFO, arm::mcr, arm::mrc, arm_dpm::nbp, arm_dpm::nwp, arm::read_core_reg, target::reg_cache, register_get_last_cache_p(), target_type::remove_breakpoint, target_type::remove_watchpoint, arm::target, target_name(), target::type, and arm::write_core_reg.
Referenced by arm11_dpm_init(), and cortex_a_dpm_setup().
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Definition at line 685 of file arm_dpm.c.
References arm_dpm::arm, arm_dpm_modeswitch(), ARM_MODE_ANY, ARM_VFP_V3_D0, ARM_VFP_V3_FPSCR, arm::dpm, dpm_mapmode(), dpm_write_reg(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, arm_dpm::finish, mode, arm_dpm::prepare, and target_to_arm().
Referenced by arm_dpm_setup().
int arm_dpm_write_dirty_registers | ( | struct arm_dpm * | dpm, |
bool | bpwp | ||
) |
Writes all modified core registers for all processor modes.
In normal operation this is called on exit from halting debug state.
dpm | represents the processor |
bpwp | true ensures breakpoints and watchpoints are set, false ensures they are cleared |
Definition at line 441 of file arm_dpm.c.
References target_type::add_breakpoint, reg::arch_info, arm_dpm::arm, arm_dpm_modeswitch(), ARM_MODE_ANY, ARM_MODE_FIQ, ARM_MODE_USR, dpm_bp::bp, dpm_bp::bpwp, dpm_wp::bpwp, arm::core_cache, arm::core_mode, arm::cpsr, arm_dpm::dbp, reg::dirty, arm::dpm, dpm_add_breakpoint(), dpm_maybe_update_bpwp(), dpm_write_pc_core_state(), dpm_write_reg(), arm_dpm::dwp, ERROR_OK, reg::exist, arm_dpm::finish, breakpoint::is_set, watchpoint::is_set, arm_reg::mode, mode, arm_dpm::nbp, NULL, arm_reg::num, reg_cache::num_regs, arm_dpm::nwp, arm::pc, arm_dpm::prepare, reg_cache::reg_list, arm::target, target::type, and dpm_wp::wp.
Referenced by arm11_leave_debug_state(), and cortex_a_restore_context().
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Definition at line 865 of file arm_dpm.c.
References breakpoint::address, BKPT_SOFT, dpm_bp::bp, dpm_bp::bpwp, arm_dpm::bpwp_enable, arm_dpm::dbp, arm::dpm, dpm_bpwp_setup(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, breakpoint::length, LOG_DEBUG, arm_dpm::nbp, target_to_arm(), and breakpoint::type.
Referenced by arm_dpm_setup(), and arm_dpm_write_dirty_registers().
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Definition at line 949 of file arm_dpm.c.
References arm_dpm::bpwp_enable, arm::dpm, dpm_watchpoint_setup(), arm_dpm::dwp, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, arm_dpm::nwp, target_to_arm(), and dpm_wp::wp.
Referenced by arm_dpm_setup().
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Definition at line 808 of file arm_dpm.c.
References addr, dpm_bpwp::address, dpm_bpwp::control, dpm_bpwp::dirty, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, length, LOG_DEBUG, LOG_ERROR, and dpm_bpwp::number.
Referenced by dpm_add_breakpoint(), and dpm_watchpoint_setup().
Definition at line 441 of file arm_dpm.c.
Referenced by arm_dpm_read_core_reg(), and arm_dpm_write_core_reg().
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Definition at line 389 of file arm_dpm.c.
References dpm_bpwp::address, arm_dpm::arm, arm_dpm::bpwp_disable, arm_dpm::bpwp_enable, dpm_bpwp::control, dpm_bpwp::dirty, ERROR_OK, LOG_ERROR, dpm_bpwp::number, arm::target, and target_name().
Referenced by arm_dpm_write_dirty_registers().
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Definition at line 66 of file arm_dpm.c.
References ARMV4_5_MCR, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, LOG_DEBUG, arm_dpm::prepare, and target_to_arm().
Referenced by arm_dpm_setup().
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Definition at line 41 of file arm_dpm.c.
References ARMV4_5_MRC, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_read_data_r0, LOG_DEBUG, arm_dpm::prepare, and target_to_arm().
Referenced by arm_dpm_setup().
Definition at line 124 of file arm_dpm.c.
References ARM_VFP_V3_D0, ARM_VFP_V3_D31, ARMV4_5_MCR, ARMV4_5_VMOV, buf_set_u32(), reg::dirty, ERROR_FAIL, ERROR_OK, arm_dpm::instr_read_data_dcc, arm_dpm::instr_read_data_r0, LOG_DEBUG, reg::name, reg::valid, and reg::value.
Referenced by arm_dpm_read_reg().
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Definition at line 893 of file arm_dpm.c.
References dpm_bp::bp, dpm_bp::bpwp, arm_dpm::dbp, dpm_bpwp::dirty, arm::dpm, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, arm_dpm::nbp, NULL, and target_to_arm().
Referenced by arm_dpm_setup().
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Definition at line 967 of file arm_dpm.c.
References dpm_wp::bpwp, dpm_bpwp::dirty, arm::dpm, arm_dpm::dwp, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, NULL, arm_dpm::nwp, target_to_arm(), and dpm_wp::wp.
Referenced by arm_dpm_setup().
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Definition at line 913 of file arm_dpm.c.
References watchpoint::address, dpm_wp::bpwp, dpm_bpwp::control, dpm_bpwp_setup(), arm_dpm::dwp, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, watchpoint::length, LOG_DEBUG, watchpoint::mask, watchpoint::rw, watchpoint::value, dpm_wp::wp, WPT_ACCESS, WPT_READ, and WPT_WRITE.
Referenced by dpm_add_watchpoint().
Write to program counter and switch the core state (arm/thumb) according to the address.
Definition at line 318 of file arm_dpm.c.
References ARMV4_5_BX, buf_get_u32(), arm_dpm::instr_write_data_r0, and reg::value.
Referenced by arm_dpm_write_dirty_registers().
Definition at line 267 of file arm_dpm.c.
References ARM_VFP_V3_D0, ARM_VFP_V3_D31, ARM_VFP_V3_FPSCR, ARMV4_5_MRC, ARMV4_5_MSR_GP, ARMV4_5_VMSR, buf_get_u32(), reg::dirty, dpm_write_reg_u64(), ERROR_OK, arm_dpm::instr_cpsr_sync, arm_dpm::instr_write_data_dcc, arm_dpm::instr_write_data_r0, LOG_DEBUG, reg::name, and reg::value.
Referenced by arm_dpm_write_core_reg(), and arm_dpm_write_dirty_registers().
Definition at line 230 of file arm_dpm.c.
References ARM_VFP_V3_D0, ARM_VFP_V3_D31, ARMV4_5_MRC, ARMV4_5_VMOV, buf_get_u32(), reg::dirty, ERROR_FAIL, ERROR_OK, arm_dpm::instr_write_data_dcc, arm_dpm::instr_write_data_r0, LOG_DEBUG, reg::name, and reg::value.
Referenced by dpm_write_reg().