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Data Structures | |
union | xtensa_reg_val_u |
Macros | |
#define | _XT_INS_FORMAT_RRI4(X, OPCODE, IMM4, R, S, T) |
#define | _XT_INS_FORMAT_RRI8(X, OPCODE, R, S, T, IMM8) |
#define | _XT_INS_FORMAT_RRR(X, OPCODE, ST, R) |
#define | _XT_INS_FORMAT_RRRN(X, OPCODE, S, T, IMM4) |
#define | _XT_INS_FORMAT_RSR(X, OPCODE, SR, T) |
#define | XT_EPC_REG_NUM_BASE (0xb0U) /* (EPC1 - 1), for adding DBGLEVEL */ |
#define | XT_EPS_REG_NUM_BASE (0xc0U) /* (EPS2 - 2), for adding DBGLEVEL */ |
#define | XT_HW_DBREAK_MAX_NUM 2 |
#define | XT_HW_IBREAK_MAX_NUM 2 |
#define | XT_INS_CALL0(X, IMM18) (XT_ISBE(X) ? (0x500000 | ((IMM18) & 0x3ffff)) : (0x000005 | (((IMM18) & 0x3ffff) << 6))) |
#define | XT_INS_DHWB(X, S, IMM8) _XT_INS_FORMAT_RRI8(X, 0x007042, 0, S, 0, IMM8) |
#define | XT_INS_DHWBI(X, S, IMM8) _XT_INS_FORMAT_RRI8(X, 0x007052, 0, S, 0, IMM8) |
#define | XT_INS_IHI(X, S, IMM8) _XT_INS_FORMAT_RRI8(X, 0x0070E2, 0, S, 0, IMM8) |
#define | XT_INS_ISYNC(X) (XT_ISBE(X) ? 0x000200 << 8 : 0x002000) |
#define | XT_INS_JX(X, S) (XT_ISBE(X) ? (0x050000 | ((S) << 12)) : (0x0000a0 | ((S) << 8))) |
#define | XT_INS_L16UI(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x001002, 0, S, T, IMM8) |
#define | XT_INS_L32E(X, R, S, T) _XT_INS_FORMAT_RRI4(X, 0x090000, 0, R, S, T) |
#define | XT_INS_L32E_S32E_MASK(X) (XT_ISBE(X) ? 0xF000FF << 8 : 0xFF000F) |
#define | XT_INS_L32I(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x002002, 0, S, T, IMM8) |
#define | XT_INS_L8UI(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x000002, 0, S, T, IMM8) |
#define | XT_INS_LDDR32P(X, S) (XT_ISBE(X) ? (0x0E0700 | ((S) << 12)) << 8 : (0x0070E0 | ((S) << 8))) |
#define | XT_INS_RFDD(X) (XT_ISBE(X) ? 0x010e1f << 8 : 0xf1e010) |
#define | XT_INS_RFDO(X) (XT_ISBE(X) ? 0x000e1f << 8 : 0xf1e000) |
#define | XT_INS_RFR(X, FR, T) _XT_INS_FORMAT_RRR(X, 0xFA0000, ((FR << 4) | 0x4), T) |
#define | XT_INS_RFWO(X) (XT_ISBE(X) ? 0x004300 << 8 : 0x003400) |
#define | XT_INS_RFWO_RFWU_MASK(X) (XT_ISBE(X) ? 0xFFFFFF << 8 : 0xFFFFFF) |
#define | XT_INS_RFWU(X) (XT_ISBE(X) ? 0x005300 << 8 : 0x003500) |
#define | XT_INS_ROTW(X, N) (XT_ISBE(X) ? ((0x000804) | (((N) & 15) << 16)) << 8 : ((0x408000) | (((N) & 15) << 4))) |
#define | XT_INS_RSR(X, SR, T) _XT_INS_FORMAT_RSR(X, 0x030000, SR, T) |
#define | XT_INS_RUR(X, UR, T) _XT_INS_FORMAT_RRR(X, 0xE30000, UR, T) |
#define | XT_INS_S16I(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x005002, 0, S, T, IMM8) |
#define | XT_INS_S32E(X, R, S, T) _XT_INS_FORMAT_RRI4(X, 0x490000, 0, R, S, T) |
#define | XT_INS_S32I(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x006002, 0, S, T, IMM8) |
#define | XT_INS_S8I(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x004002, 0, S, T, IMM8) |
#define | XT_INS_SDDR32P(X, S) (XT_ISBE(X) ? (0x0F0700 | ((S) << 12)) << 8 : (0x0070F0 | ((S) << 8))) |
#define | XT_INS_WFR(X, FR, T) _XT_INS_FORMAT_RRR(X, 0xFA0000, ((T << 4) | 0x5), FR) |
#define | XT_INS_WSR(X, SR, T) _XT_INS_FORMAT_RSR(X, 0x130000, SR, T) |
#define | XT_INS_WUR(X, UR, T) _XT_INS_FORMAT_RSR(X, 0xF30000, UR, T) |
#define | XT_INS_XSR(X, SR, T) _XT_INS_FORMAT_RSR(X, 0x610000, SR, T) |
#define | XT_NIBSWAP16(V) |
#define | XT_NIBSWAP24(V) |
#define | XT_NIBSWAP8(V) |
#define | XT_PC_DBREG_NUM_BASE (0x20U) /* External (i.e., GDB) access */ |
#define | XT_PC_REG_NUM_VIRTUAL (0xffU) /* Marker for computing PC (EPC[DBGLEVEL) */ |
#define | XT_PS_REG_NUM (0xe6U) |
#define | XT_REG_A3 (xtensa_regs[XT_REG_IDX_AR3].reg_num) |
#define | XT_REG_A4 (xtensa_regs[XT_REG_IDX_AR4].reg_num) |
#define | XT_SR_DDR (xtensa_regs[XT_REG_IDX_DDR].reg_num) |
#define | XT_SR_PS (xtensa_regs[XT_REG_IDX_PS].reg_num) |
#define | XT_SR_WB (xtensa_regs[XT_REG_IDX_WINDOWBASE].reg_num) |
#define | XT_SW_BREAKPOINTS_MAX_NUM 32 |
#define | XT_WATCHPOINTS_NUM_MAX 2 |
Enumerations | |
enum | xtensa_mem_region_type { XTENSA_MEM_REG_IROM = 0x0 , XTENSA_MEM_REG_IRAM , XTENSA_MEM_REG_DROM , XTENSA_MEM_REG_DRAM , XTENSA_MEM_REG_SRAM , XTENSA_MEM_REG_SROM , XTENSA_MEM_REGS_NUM } |
Types of memory used at xtensa target. More... | |
Functions | |
COMMAND_HANDLER (xtensa_cmd_exe) | |
COMMAND_HANDLER (xtensa_cmd_mask_interrupts) | |
COMMAND_HANDLER (xtensa_cmd_perfmon_dump) | |
COMMAND_HANDLER (xtensa_cmd_perfmon_enable) | |
COMMAND_HANDLER (xtensa_cmd_permissive_mode) | |
COMMAND_HANDLER (xtensa_cmd_smpbreak) | |
COMMAND_HANDLER (xtensa_cmd_tracedump) | |
COMMAND_HANDLER (xtensa_cmd_tracestart) | |
COMMAND_HANDLER (xtensa_cmd_tracestop) | |
COMMAND_HANDLER (xtensa_cmd_xtdef) | |
COMMAND_HANDLER (xtensa_cmd_xtmem) | |
COMMAND_HANDLER (xtensa_cmd_xtmmu) | |
COMMAND_HANDLER (xtensa_cmd_xtmpu) | |
COMMAND_HANDLER (xtensa_cmd_xtopt) | |
COMMAND_HANDLER (xtensa_cmd_xtreg) | |
COMMAND_HANDLER (xtensa_cmd_xtregfmt) | |
static | COMMAND_HELPER (xtensa_cmd_exe_do, struct target *target) |
COMMAND_HELPER (xtensa_cmd_mask_interrupts_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_perfmon_dump_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_perfmon_enable_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_permissive_mode_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_smpbreak_do, struct target *target) | |
COMMAND_HELPER (xtensa_cmd_tracedump_do, struct xtensa *xtensa, const char *fname) | |
COMMAND_HELPER (xtensa_cmd_tracestart_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_tracestop_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_xtdef_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_xtmem_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_xtmmu_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_xtmpu_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_xtopt_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_xtreg_do, struct xtensa *xtensa) | |
COMMAND_HELPER (xtensa_cmd_xtregfmt_do, struct xtensa *xtensa) | |
int | xtensa_assert_reset (struct target *target) |
int | xtensa_breakpoint_add (struct target *target, struct breakpoint *breakpoint) |
int | xtensa_breakpoint_remove (struct target *target, struct breakpoint *breakpoint) |
static int | xtensa_build_reg_cache (struct target *target) |
static enum xtensa_reg_id | xtensa_canonical_to_windowbase_offset (struct xtensa *xtensa, enum xtensa_reg_id reg_idx, int windowbase) |
void | xtensa_cause_clear (struct target *target) |
uint32_t | xtensa_cause_get (struct target *target) |
int | xtensa_checksum_memory (struct target *target, target_addr_t address, uint32_t count, uint32_t *checksum) |
static bool | xtensa_cmd_xtopt_legal_val (char *opt, int val, int min, int max) |
static int | xtensa_core_reg_get (struct reg *reg) |
static int | xtensa_core_reg_set (struct reg *reg, uint8_t *buf) |
int | xtensa_core_status_check (struct target *target) |
int | xtensa_deassert_reset (struct target *target) |
int | xtensa_do_resume (struct target *target) |
int | xtensa_do_step (struct target *target, int current, target_addr_t address, int handle_breakpoints) |
int | xtensa_examine (struct target *target) |
int | xtensa_fetch_all_regs (struct target *target) |
static void | xtensa_free_reg_cache (struct target *target) |
int | xtensa_gdb_query_custom (struct target *target, const char *packet, char **response_p) |
static int32_t | xtensa_gdbqc_parse_exec_tie_ops (struct target *target, char *opstr) |
static int | xtensa_gdbqc_qxtreg (struct target *target, const char *packet, char **response_p) |
const char * | xtensa_get_gdb_arch (struct target *target) |
int | xtensa_get_gdb_reg_list (struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class) |
static const struct xtensa_local_mem_config * | xtensa_get_mem_config (struct xtensa *xtensa, enum xtensa_mem_region_type type) |
Gets a config for the specific mem type. More... | |
static target_addr_t | xtensa_get_overlap_size (target_addr_t r1_start, target_addr_t r1_end, target_addr_t r2_start, target_addr_t r2_end) |
Returns a size of overlapped region of two ranges. More... | |
int | xtensa_halt (struct target *target) |
int | xtensa_init_arch_info (struct target *target, struct xtensa *xtensa, const struct xtensa_debug_module_config *dm_cfg) |
static bool | xtensa_is_cacheable (const struct xtensa_cache_config *cache, const struct xtensa_local_mem_config *mem, target_addr_t address) |
static bool | xtensa_is_dcacheable (struct xtensa *xtensa, target_addr_t address) |
static bool | xtensa_is_icacheable (struct xtensa *xtensa, target_addr_t address) |
static bool | xtensa_is_stopped (struct target *target) |
static void | xtensa_mark_register_dirty (struct xtensa *xtensa, enum xtensa_reg_id reg_idx) |
static bool | xtensa_memory_op_validate_range (struct xtensa *xtensa, target_addr_t address, size_t size, int access) |
Check if the address gets to memory regions, and its access mode. More... | |
static const struct xtensa_local_mem_region_config * | xtensa_memory_region_find (const struct xtensa_local_mem_config *mem, target_addr_t address) |
Extracts an exact xtensa_local_mem_region_config from xtensa_local_mem_config for a given address Returns NULL if nothing found. More... | |
static bool | xtensa_memory_regions_overlap (target_addr_t r1_start, target_addr_t r1_end, target_addr_t r2_start, target_addr_t r2_end) |
Returns true if two ranges are overlapping. More... | |
int | xtensa_mmu_is_enabled (struct target *target, int *enabled) |
static bool | xtensa_pc_in_winexc (struct target *target, target_addr_t pc) |
int | xtensa_poll (struct target *target) |
int | xtensa_prepare_resume (struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution) |
static void | xtensa_queue_exec_ins (struct xtensa *xtensa, uint32_t ins) |
static void | xtensa_queue_exec_ins_wide (struct xtensa *xtensa, uint8_t *ops, uint8_t oplen) |
static int | xtensa_queue_pwr_reg_write (struct xtensa *xtensa, unsigned int reg, uint32_t data) |
int | xtensa_read_buffer (struct target *target, target_addr_t address, uint32_t count, uint8_t *buffer) |
int | xtensa_read_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) |
xtensa_reg_val_t | xtensa_reg_get (struct target *target, enum xtensa_reg_id reg_id) |
static xtensa_reg_val_t | xtensa_reg_get_value (struct reg *reg) |
static bool | xtensa_reg_is_readable (int flags, int cpenable) |
void | xtensa_reg_set (struct target *target, enum xtensa_reg_id reg_id, xtensa_reg_val_t value) |
void | xtensa_reg_set_deep_relgen (struct target *target, enum xtensa_reg_id a_idx, xtensa_reg_val_t value) |
static void | xtensa_reg_set_value (struct reg *reg, xtensa_reg_val_t value) |
int | xtensa_resume (struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution) |
static bool | xtensa_scratch_regs_fixup (struct xtensa *xtensa, struct reg *reg_list, int i, int j, int a_idx, int ar_idx) |
void | xtensa_set_permissive_mode (struct target *target, bool state) |
int | xtensa_smpbreak_get (struct target *target, uint32_t *val) |
int | xtensa_smpbreak_read (struct xtensa *xtensa, uint32_t *val) |
int | xtensa_smpbreak_set (struct target *target, uint32_t set) |
int | xtensa_smpbreak_write (struct xtensa *xtensa, uint32_t set) |
int | xtensa_soft_reset_halt (struct target *target) |
int | xtensa_step (struct target *target, int current, target_addr_t address, int handle_breakpoints) |
static int | xtensa_sw_breakpoint_add (struct target *target, struct breakpoint *breakpoint, struct xtensa_sw_breakpoint *sw_bp) |
static int | xtensa_sw_breakpoint_remove (struct target *target, struct xtensa_sw_breakpoint *sw_bp) |
void | xtensa_target_deinit (struct target *target) |
int | xtensa_target_init (struct command_context *cmd_ctx, struct target *target) |
static const struct xtensa_local_mem_region_config * | xtensa_target_memory_region_find (struct xtensa *xtensa, target_addr_t address) |
Returns a corresponding xtensa_local_mem_region_config from the xtensa target for a given address Returns NULL if nothing found. More... | |
static int | xtensa_update_instruction (struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer) |
int | xtensa_wakeup (struct target *target) |
int | xtensa_watchpoint_add (struct target *target, struct watchpoint *watchpoint) |
int | xtensa_watchpoint_remove (struct target *target, struct watchpoint *watchpoint) |
static void | xtensa_window_state_restore (struct target *target, uint32_t woe) |
static int | xtensa_window_state_save (struct target *target, uint32_t *woe) |
static enum xtensa_reg_id | xtensa_windowbase_offset_to_canonical (struct xtensa *xtensa, enum xtensa_reg_id reg_idx, int windowbase) |
int | xtensa_write_buffer (struct target *target, target_addr_t address, uint32_t count, const uint8_t *buffer) |
static int | xtensa_write_dirty_registers (struct target *target) |
int | xtensa_write_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer) |
Variables | |
static const struct xtensa_keyval_info_s | xt_qerr [XT_QERR_NUM] |
static const struct command_registration | xtensa_any_command_handlers [] |
const struct command_registration | xtensa_command_handlers [] |
static const bool | xtensa_extra_debug_log |
static const struct reg_arch_type | xtensa_reg_type |
struct xtensa_reg_desc | xtensa_regs [XT_NUM_REGS] |
#define _XT_INS_FORMAT_RRI4 | ( | X, | |
OPCODE, | |||
IMM4, | |||
R, | |||
S, | |||
T | |||
) |
#define _XT_INS_FORMAT_RRI8 | ( | X, | |
OPCODE, | |||
R, | |||
S, | |||
T, | |||
IMM8 | |||
) |
#define _XT_INS_FORMAT_RRR | ( | X, | |
OPCODE, | |||
ST, | |||
R | |||
) |
#define _XT_INS_FORMAT_RRRN | ( | X, | |
OPCODE, | |||
S, | |||
T, | |||
IMM4 | |||
) |
#define _XT_INS_FORMAT_RSR | ( | X, | |
OPCODE, | |||
SR, | |||
T | |||
) |
#define XT_EPC_REG_NUM_BASE (0xb0U) /* (EPC1 - 1), for adding DBGLEVEL */ |
#define XT_EPS_REG_NUM_BASE (0xc0U) /* (EPS2 - 2), for adding DBGLEVEL */ |
#define XT_INS_CALL0 | ( | X, | |
IMM18 | |||
) | (XT_ISBE(X) ? (0x500000 | ((IMM18) & 0x3ffff)) : (0x000005 | (((IMM18) & 0x3ffff) << 6))) |
#define XT_INS_DHWB | ( | X, | |
S, | |||
IMM8 | |||
) | _XT_INS_FORMAT_RRI8(X, 0x007042, 0, S, 0, IMM8) |
#define XT_INS_DHWBI | ( | X, | |
S, | |||
IMM8 | |||
) | _XT_INS_FORMAT_RRI8(X, 0x007052, 0, S, 0, IMM8) |
#define XT_INS_IHI | ( | X, | |
S, | |||
IMM8 | |||
) | _XT_INS_FORMAT_RRI8(X, 0x0070E2, 0, S, 0, IMM8) |
#define XT_INS_ISYNC | ( | X | ) | (XT_ISBE(X) ? 0x000200 << 8 : 0x002000) |
#define XT_INS_JX | ( | X, | |
S | |||
) | (XT_ISBE(X) ? (0x050000 | ((S) << 12)) : (0x0000a0 | ((S) << 8))) |
#define XT_INS_L16UI | ( | X, | |
S, | |||
T, | |||
IMM8 | |||
) | _XT_INS_FORMAT_RRI8(X, 0x001002, 0, S, T, IMM8) |
#define XT_INS_L32E | ( | X, | |
R, | |||
S, | |||
T | |||
) | _XT_INS_FORMAT_RRI4(X, 0x090000, 0, R, S, T) |
#define XT_INS_L32E_S32E_MASK | ( | X | ) | (XT_ISBE(X) ? 0xF000FF << 8 : 0xFF000F) |
#define XT_INS_L32I | ( | X, | |
S, | |||
T, | |||
IMM8 | |||
) | _XT_INS_FORMAT_RRI8(X, 0x002002, 0, S, T, IMM8) |
#define XT_INS_L8UI | ( | X, | |
S, | |||
T, | |||
IMM8 | |||
) | _XT_INS_FORMAT_RRI8(X, 0x000002, 0, S, T, IMM8) |
#define XT_INS_LDDR32P | ( | X, | |
S | |||
) | (XT_ISBE(X) ? (0x0E0700 | ((S) << 12)) << 8 : (0x0070E0 | ((S) << 8))) |
#define XT_INS_RFDD | ( | X | ) | (XT_ISBE(X) ? 0x010e1f << 8 : 0xf1e010) |
#define XT_INS_RFDO | ( | X | ) | (XT_ISBE(X) ? 0x000e1f << 8 : 0xf1e000) |
#define XT_INS_RFR | ( | X, | |
FR, | |||
T | |||
) | _XT_INS_FORMAT_RRR(X, 0xFA0000, ((FR << 4) | 0x4), T) |
#define XT_INS_RFWO | ( | X | ) | (XT_ISBE(X) ? 0x004300 << 8 : 0x003400) |
#define XT_INS_RFWO_RFWU_MASK | ( | X | ) | (XT_ISBE(X) ? 0xFFFFFF << 8 : 0xFFFFFF) |
#define XT_INS_RFWU | ( | X | ) | (XT_ISBE(X) ? 0x005300 << 8 : 0x003500) |
#define XT_INS_ROTW | ( | X, | |
N | |||
) | (XT_ISBE(X) ? ((0x000804) | (((N) & 15) << 16)) << 8 : ((0x408000) | (((N) & 15) << 4))) |
#define XT_INS_RSR | ( | X, | |
SR, | |||
T | |||
) | _XT_INS_FORMAT_RSR(X, 0x030000, SR, T) |
#define XT_INS_RUR | ( | X, | |
UR, | |||
T | |||
) | _XT_INS_FORMAT_RRR(X, 0xE30000, UR, T) |
#define XT_INS_S16I | ( | X, | |
S, | |||
T, | |||
IMM8 | |||
) | _XT_INS_FORMAT_RRI8(X, 0x005002, 0, S, T, IMM8) |
#define XT_INS_S32E | ( | X, | |
R, | |||
S, | |||
T | |||
) | _XT_INS_FORMAT_RRI4(X, 0x490000, 0, R, S, T) |
#define XT_INS_S32I | ( | X, | |
S, | |||
T, | |||
IMM8 | |||
) | _XT_INS_FORMAT_RRI8(X, 0x006002, 0, S, T, IMM8) |
#define XT_INS_S8I | ( | X, | |
S, | |||
T, | |||
IMM8 | |||
) | _XT_INS_FORMAT_RRI8(X, 0x004002, 0, S, T, IMM8) |
#define XT_INS_SDDR32P | ( | X, | |
S | |||
) | (XT_ISBE(X) ? (0x0F0700 | ((S) << 12)) << 8 : (0x0070F0 | ((S) << 8))) |
#define XT_INS_WFR | ( | X, | |
FR, | |||
T | |||
) | _XT_INS_FORMAT_RRR(X, 0xFA0000, ((T << 4) | 0x5), FR) |
#define XT_INS_WSR | ( | X, | |
SR, | |||
T | |||
) | _XT_INS_FORMAT_RSR(X, 0x130000, SR, T) |
#define XT_INS_WUR | ( | X, | |
UR, | |||
T | |||
) | _XT_INS_FORMAT_RSR(X, 0xF30000, UR, T) |
#define XT_INS_XSR | ( | X, | |
SR, | |||
T | |||
) | _XT_INS_FORMAT_RSR(X, 0x610000, SR, T) |
#define XT_NIBSWAP16 | ( | V | ) |
#define XT_NIBSWAP24 | ( | V | ) |
#define XT_NIBSWAP8 | ( | V | ) |
#define XT_PC_DBREG_NUM_BASE (0x20U) /* External (i.e., GDB) access */ |
#define XT_PC_REG_NUM_VIRTUAL (0xffU) /* Marker for computing PC (EPC[DBGLEVEL) */ |
#define XT_REG_A3 (xtensa_regs[XT_REG_IDX_AR3].reg_num) |
#define XT_REG_A4 (xtensa_regs[XT_REG_IDX_AR4].reg_num) |
#define XT_SR_DDR (xtensa_regs[XT_REG_IDX_DDR].reg_num) |
#define XT_SR_PS (xtensa_regs[XT_REG_IDX_PS].reg_num) |
#define XT_SR_WB (xtensa_regs[XT_REG_IDX_WINDOWBASE].reg_num) |
COMMAND_HANDLER | ( | xtensa_cmd_exe | ) |
Definition at line 3063 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, and get_current_target().
COMMAND_HANDLER | ( | xtensa_cmd_mask_interrupts | ) |
Definition at line 3658 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_perfmon_dump | ) |
Definition at line 3622 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_perfmon_enable | ) |
Definition at line 3582 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_permissive_mode | ) |
Definition at line 3522 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_smpbreak | ) |
Definition at line 3712 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, and get_current_target().
COMMAND_HANDLER | ( | xtensa_cmd_tracedump | ) |
Definition at line 3885 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), ERROR_FAIL, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_tracestart | ) |
Definition at line 3769 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_tracestop | ) |
Definition at line 3797 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_xtdef | ) |
Definition at line 3084 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_xtmem | ) |
Definition at line 3269 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_xtmmu | ) |
Definition at line 3340 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_xtmpu | ) |
Definition at line 3310 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_xtopt | ) |
Definition at line 3192 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_xtreg | ) |
Definition at line 3479 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
COMMAND_HANDLER | ( | xtensa_cmd_xtregfmt | ) |
Definition at line 3510 of file xtensa.c.
References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().
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static |
Definition at line 3000 of file xtensa.c.
References CMD_ARGC, CMD_ARGV, xtensa::dbg_mod, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, NULL, status, target_name(), target_to_xtensa(), XDMREG_DDR, XT_INS_RSR, XT_INS_WSR, XT_REG_A3, XT_REG_IDX_A3, XT_REG_IDX_CPENABLE, XT_REG_IDX_EXCCAUSE, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_fetch_all_regs(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_queue_exec_ins_wide(), xtensa_reg_get(), xtensa_reg_set(), xtensa_regs, and xtensa_write_dirty_registers().
COMMAND_HELPER | ( | xtensa_cmd_mask_interrupts_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3628 of file xtensa.c.
References CMD, CMD_ARGC, CMD_ARGV, command_print(), ERROR_FAIL, ERROR_OK, state, xtensa::stepping_isr_mode, XT_STEPPING_ISR_OFF, and XT_STEPPING_ISR_ON.
COMMAND_HELPER | ( | xtensa_cmd_perfmon_dump_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3589 of file xtensa.c.
References CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::dbg_mod, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, LOG_INFO, NULL, xtensa_perfmon_result::overflow, xtensa_perfmon_result::value, xtensa_dm_perfmon_dump(), and XTENSA_MAX_PERF_COUNTERS.
COMMAND_HELPER | ( | xtensa_cmd_perfmon_enable_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3529 of file xtensa.c.
References CMD, CMD_ARGC, CMD_ARGV, command_print(), config, xtensa::core_config, xtensa::dbg_mod, xtensa_config::debug, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, xtensa_debug_config::irq_level, NULL, xtensa_dm_perfmon_enable(), XTENSA_MAX_PERF_COUNTERS, XTENSA_MAX_PERF_MASK, and XTENSA_MAX_PERF_SELECT.
COMMAND_HELPER | ( | xtensa_cmd_permissive_mode_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3516 of file xtensa.c.
References CALL_COMMAND_HANDLER, and xtensa::permissive_mode.
COMMAND_HELPER | ( | xtensa_cmd_smpbreak_do | , |
struct target * | target | ||
) |
Definition at line 3664 of file xtensa.c.
References CMD, CMD_ARGC, CMD_ARGV, command_print(), ERROR_OK, OCDDCR_BREAKINEN, OCDDCR_BREAKOUTEN, OCDDCR_DEBUGMODEOUTEN, OCDDCR_RUNSTALLINEN, target_to_xtensa(), xtensa_smpbreak_read(), and xtensa_smpbreak_set().
COMMAND_HELPER | ( | xtensa_cmd_tracedump_do | , |
struct xtensa * | xtensa, | ||
const char * | fname | ||
) |
Definition at line 3803 of file xtensa.c.
References xtensa_trace_config::addr, CMD, command_print(), xtensa_trace_config::ctrl, xtensa::dbg_mod, ERROR_FAIL, ERROR_OK, LOG_INFO, xtensa_trace_config::memaddr_end, xtensa_trace_config::memaddr_start, TRAXADDR_TADDR_MASK, TRAXADDR_TWRAP_MASK, TRAXADDR_TWRAP_SHIFT, TRAXADDR_TWSAT, TRAXCTRL_TREN, TRAXSTAT_TRACT, xtensa_dm_trace_config_read(), xtensa_dm_trace_data_read(), and xtensa_dm_trace_status_read().
COMMAND_HELPER | ( | xtensa_cmd_tracestart_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3718 of file xtensa.c.
References xtensa_trace_start_config::after, xtensa_trace_start_config::after_is_words, CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::dbg_mod, ERROR_FAIL, ERROR_OK, LOG_WARNING, NULL, xtensa_trace_start_config::stopmask, xtensa_trace_start_config::stoppc, xtensa::trace_active, TRAXSTAT_TRACT, xtensa_dm_trace_start(), xtensa_dm_trace_status_read(), xtensa_dm_trace_stop(), and XTENSA_STOPMASK_DISABLED.
COMMAND_HELPER | ( | xtensa_cmd_tracestop_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3775 of file xtensa.c.
References CMD, command_print(), xtensa::dbg_mod, ERROR_FAIL, ERROR_OK, xtensa::trace_active, TRAXSTAT_TRACT, xtensa_dm_trace_status_read(), and xtensa_dm_trace_stop().
COMMAND_HELPER | ( | xtensa_cmd_xtdef_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3069 of file xtensa.c.
References CMD_ARGC, CMD_ARGV, xtensa::core_config, xtensa_config::core_type, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, LOG_ERROR, and XT_LX.
COMMAND_HELPER | ( | xtensa_cmd_xtmem_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3199 of file xtensa.c.
References xtensa_local_mem_region_config::access, xtensa_local_mem_region_config::base, CMD_ARGC, CMD_ARGV, xtensa::core_config, xtensa_local_mem_config::count, xtensa_config::dcache, xtensa_config::dram, xtensa_config::drom, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa_config::icache, xtensa_config::iram, xtensa_config::irom, xtensa_cache_config::line_size, LOG_ERROR, NULL, xtensa_local_mem_config::regions, xtensa_cache_config::size, xtensa_local_mem_region_config::size, xtensa_config::sram, xtensa_config::srom, xtensa_cache_config::way_count, xtensa_cache_config::writeback, XT_MEM_ACCESS_READ, and XT_MEM_ACCESS_WRITE.
COMMAND_HELPER | ( | xtensa_cmd_xtmmu_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3317 of file xtensa.c.
References CMD_ARGC, CMD_ARGV, xtensa::core_config, xtensa_mmu_config::dtlb_entries_count, xtensa_mmu_config::enabled, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa_mmu_config::itlb_entries_count, LOG_ERROR, xtensa_config::mmu, and NULL.
COMMAND_HELPER | ( | xtensa_cmd_xtmpu_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3276 of file xtensa.c.
References CMD_ARGC, CMD_ARGV, xtensa::core_config, xtensa_mpu_config::enabled, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa_mpu_config::execonly, xtensa_mpu_config::lockable, LOG_ERROR, xtensa_mpu_config::minsegsize, xtensa_config::mpu, xtensa_mpu_config::nfgseg, and NULL.
COMMAND_HELPER | ( | xtensa_cmd_xtopt_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3100 of file xtensa.c.
References xtensa_config::aregs_num, CMD_ARGC, CMD_ARGV, xtensa_config::coproc, xtensa::core_config, xtensa_config::core_type, xtensa_debug_config::dbreaks_num, xtensa_config::debug, xtensa_irq_config::enabled, xtensa_high_prio_irq_config::enabled, xtensa_debug_config::enabled, xtensa_tracing_config::enabled, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa_config::exceptions, xtensa_high_prio_irq_config::excm_level, xtensa_config::high_irq, xtensa_debug_config::ibreaks_num, xtensa_config::irq, xtensa_debug_config::irq_level, xtensa_irq_config::irq_num, xtensa_high_prio_irq_config::level_num, LOG_ERROR, LOG_WARNING, xtensa_tracing_config::mem_sz, NULL, xtensa_debug_config::perfcount_num, xtensa_tracing_config::reversed_mem_access, xtensa_config::trace, xtensa_config::windowed, XT_LX, and xtensa_cmd_xtopt_legal_val().
COMMAND_HELPER | ( | xtensa_cmd_xtreg_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3348 of file xtensa.c.
References CMD_ARGC, CMD_ARGV, xtensa::contiguous_regs_desc, xtensa_config::coproc, xtensa::core_config, xtensa::core_regs_num, xtensa_config::core_type, xtensa_reg_desc::dbreg_num, xtensa_config::debug, xtensa::eps_dbglevel_idx, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, xtensa_reg_desc::exist, xtensa_reg_desc::flags, xtensa::genpkt_regs_num, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_ERROR, name, xtensa_reg_desc::name, NULL, xtensa::num_optregs, xtensa::optregs, xtensa_reg_desc::reg_num, xtensa::regmap_contiguous, xtensa::total_regs_num, xtensa_reg_desc::type, XT_EPS_REG_NUM_BASE, XT_LX, XT_NUM_REGS, XT_REG_FR, XT_REG_FR_MASK, XT_REG_FR_VAL, XT_REG_GENERAL, XT_REG_GENERAL_MASK, XT_REG_GENERAL_VAL, XT_REG_IDX_ARFIRST, XT_REG_INDEX_MASK, XT_REG_OTHER, XT_REG_RELGEN, XT_REG_RELGEN_MASK, XT_REG_RELGEN_VAL, XT_REG_SPECIAL, XT_REG_SPECIAL_MASK, XT_REG_SPECIAL_VAL, XT_REG_TIE, XT_REG_TIE_MASK, XT_REG_USER, XT_REG_USER_MASK, XT_REG_USER_VAL, XT_REGF_NOREAD, xtensa_extra_debug_log, and xtensa_regs.
COMMAND_HELPER | ( | xtensa_cmd_xtregfmt_do | , |
struct xtensa * | xtensa | ||
) |
Definition at line 3486 of file xtensa.c.
References CMD_ARGC, CMD_ARGV, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa::genpkt_regs_num, LOG_ERROR, NULL, xtensa::regmap_contiguous, and xtensa::total_regs_num.
int xtensa_assert_reset | ( | struct target * | target | ) |
Definition at line 958 of file xtensa.c.
References xtensa::core_cache, xtensa::dbg_mod, ERROR_OK, LOG_TARGET_DEBUG, PWRCTL_CORERESET, PWRCTL_COREWAKEUP, PWRCTL_DEBUGWAKEUP, PWRCTL_JTAGDEBUGUSE, PWRCTL_MEMWAKEUP, register_cache_invalidate(), xtensa::reset_asserted, target::state, target::target_number, TARGET_RESET, target_to_xtensa(), XDMREG_PWRCTL, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), and xtensa_queue_pwr_reg_write().
Referenced by esp32_soc_reset(), esp32s2_soc_reset(), esp32s3_soc_reset(), esp_xtensa_smp_soft_reset_halt(), and xtensa_soft_reset_halt().
int xtensa_breakpoint_add | ( | struct target * | target, |
struct breakpoint * | breakpoint | ||
) |
Definition at line 2254 of file xtensa.c.
References breakpoint::address, BKPT_SOFT, xtensa::core_config, xtensa_config::debug, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa::hw_brps, xtensa_debug_config::ibreaks_num, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, xtensa_sw_breakpoint::oocd_bp, xtensa::sw_brps, TARGET_ADDR_FMT, target_to_xtensa(), breakpoint::type, XT_SW_BREAKPOINTS_MAX_NUM, and xtensa_sw_breakpoint_add().
Referenced by esp_xtensa_breakpoint_add().
int xtensa_breakpoint_remove | ( | struct target * | target, |
struct breakpoint * | breakpoint | ||
) |
Definition at line 2298 of file xtensa.c.
References breakpoint::address, BKPT_SOFT, xtensa::core_config, xtensa_config::debug, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa::hw_brps, xtensa_debug_config::ibreaks_num, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, NULL, xtensa_sw_breakpoint::oocd_bp, xtensa::sw_brps, TARGET_ADDR_FMT, target_to_xtensa(), breakpoint::type, XT_SW_BREAKPOINTS_MAX_NUM, and xtensa_sw_breakpoint_remove().
Referenced by esp_xtensa_breakpoint_remove().
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static |
Definition at line 2410 of file xtensa.c.
References xtensa::algo_context_backup, reg::arch_info, xtensa::contiguous_regs_desc, xtensa::contiguous_regs_list, xtensa::core_cache, xtensa::core_regs_num, xtensa_reg_desc::dbreg_num, xtensa::dbregs_num, reg::dirty, xtensa::empty_regs, ERROR_FAIL, ERROR_OK, reg::exist, xtensa_reg_desc::exist, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, name, reg::name, reg_cache::name, xtensa_reg_desc::name, reg_cache::next, NULL, xtensa::num_optregs, reg_cache::num_regs, reg::number, xtensa::optregs, target::reg_cache, reg_cache::reg_list, register_get_last_cache_p(), xtensa::regmap_contiguous, reg::size, target_to_xtensa(), xtensa::total_regs_num, type, reg::type, reg::valid, reg::value, XT_NUM_REGS, xtensa_extra_debug_log, xtensa_reg_type, and xtensa_regs.
Referenced by xtensa_target_init().
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static |
Definition at line 420 of file xtensa.c.
References reg::arch_info, buf_cpy(), buf_get_u32(), xtensa_keyval_info_s::chrval, xtensa::core_config, reg::dirty, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_OK, ERROR_TARGET_NOT_HALTED, reg::exist, xtensa_keyval_info_s::intval, LOG_DEBUG, LOG_WARNING, reg::name, xtensa::scratch_ars, reg::size, target::state, xtensa::target, TARGET_HALTED, reg::valid, reg::value, xtensa_config::windowed, XT_AR_SCRATCH_AR3, XT_AR_SCRATCH_AR4, and XT_AR_SCRATCH_NUM.
Referenced by xtensa_fetch_all_regs().
void xtensa_cause_clear | ( | struct target * | target | ) |
Definition at line 951 of file xtensa.c.
References xtensa::core_cache, reg::dirty, reg_cache::reg_list, target_to_xtensa(), XT_REG_IDX_DEBUGCAUSE, and xtensa_reg_set().
Referenced by xtensa_do_step().
uint32_t xtensa_cause_get | ( | struct target * | target | ) |
Definition at line 946 of file xtensa.c.
References XT_REG_IDX_DEBUGCAUSE, and xtensa_reg_get().
Referenced by xtensa_do_step(), xtensa_poll(), and xtensa_prepare_resume().
int xtensa_checksum_memory | ( | struct target * | target, |
target_addr_t | address, | ||
uint32_t | count, | ||
uint32_t * | checksum | ||
) |
Definition at line 2016 of file xtensa.c.
References ERROR_FAIL, and LOG_WARNING.
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inlinestatic |
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static |
Definition at line 401 of file xtensa.c.
References reg::arch_info, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_OK, ERROR_TARGET_NOT_HALTED, reg::exist, LOG_WARNING, reg::name, target::state, xtensa::target, and TARGET_HALTED.
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static |
int xtensa_core_status_check | ( | struct target * | target | ) |
Definition at line 881 of file xtensa.c.
References xtensa::dbg_mod, ERROR_FAIL, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, OCDDSR_EXECBUSY, OCDDSR_EXECEXCEPTION, OCDDSR_EXECOVERRUN, xtensa::suppress_dsr_errors, target_to_xtensa(), xtensa_dm_core_status_clear(), xtensa_dm_core_status_get(), and xtensa_dm_core_status_read().
Referenced by COMMAND_HELPER(), xtensa_do_resume(), xtensa_fetch_all_regs(), xtensa_gdbqc_qxtreg(), xtensa_read_memory(), xtensa_update_instruction(), xtensa_window_state_save(), xtensa_write_dirty_registers(), and xtensa_write_memory().
int xtensa_deassert_reset | ( | struct target * | target | ) |
Definition at line 979 of file xtensa.c.
References xtensa::dbg_mod, ERROR_OK, LOG_TARGET_DEBUG, OCDDCR_DEBUGINTERRUPT, OCDDCR_ENABLEOCD, PWRCTL_COREWAKEUP, PWRCTL_DEBUGWAKEUP, PWRCTL_JTAGDEBUGUSE, PWRCTL_MEMWAKEUP, xtensa::reset_asserted, target::reset_halt, target::state, TARGET_RUNNING, target_to_xtensa(), XDMREG_DCRSET, XDMREG_PWRCTL, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), xtensa_queue_dbg_reg_write(), and xtensa_queue_pwr_reg_write().
Referenced by esp32_soc_reset(), esp32s2_deassert_reset(), esp32s2_soc_reset(), esp32s3_soc_reset(), and esp_xtensa_smp_deassert_reset().
int xtensa_do_resume | ( | struct target * | target | ) |
Definition at line 1388 of file xtensa.c.
References xtensa::dbg_mod, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, target_to_xtensa(), XT_INS_RFDO, xtensa_core_status_check(), xtensa_dm_queue_execute(), and xtensa_queue_exec_ins().
Referenced by esp_xtensa_smp_resume(), xtensa_do_step(), and xtensa_resume().
int xtensa_do_step | ( | struct target * | target, |
int | current, | ||
target_addr_t | address, | ||
int | handle_breakpoints | ||
) |
Definition at line 1453 of file xtensa.c.
References xtensa::core_cache, xtensa::core_config, xtensa::dbg_mod, DBG_REASON_NOTHALTED, DBG_REASON_SINGLESTEP, xtensa_debug_config::dbreaks_num, xtensa_config::debug, target::debug_reason, DEBUGCAUSE_BI, DEBUGCAUSE_BN, DEBUGCAUSE_DB, xtensa_high_prio_irq_config::enabled, xtensa::eps_dbglevel_idx, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, xtensa_config::high_irq, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, MIN, reg::name, reg_cache::reg_list, start, target::state, xtensa::stepping_isr_mode, TARGET_ADDR_FMT, TARGET_HALTED, TARGET_RUNNING, target_to_xtensa(), timeval_ms(), xtensa_config::windowed, XT_REG_IDX_DBREAKC0, XT_REG_IDX_EXCCAUSE, XT_REG_IDX_ICOUNT, XT_REG_IDX_ICOUNTLEVEL, XT_REG_IDX_PC, XT_REG_IDX_PS, XT_STEPPING_ISR_OFF, XT_WATCHPOINTS_NUM_MAX, xtensa_cause_clear(), xtensa_cause_get(), xtensa_dm_core_status_get(), xtensa_dm_core_status_read(), xtensa_do_resume(), xtensa_fetch_all_regs(), xtensa_is_stopped(), xtensa_pc_in_winexc(), xtensa_prepare_resume(), xtensa_reg_get(), xtensa_reg_set(), and xtensa_write_dirty_registers().
Referenced by xtensa_prepare_resume(), and xtensa_step().
int xtensa_examine | ( | struct target * | target | ) |
Definition at line 780 of file xtensa.c.
References cmd, xtensa::core_config, xtensa_config::core_type, target::coreid, xtensa::dbg_mod, xtensa_debug_module::device_id, ERROR_FAIL, ERROR_OK, ERROR_TARGET_FAILURE, LOG_DEBUG, LOG_ERROR, PWRCTL_COREWAKEUP, PWRCTL_DEBUGWAKEUP, PWRCTL_JTAGDEBUGUSE, PWRCTL_MEMWAKEUP, xtensa::smp_break, target_set_examined(), target_to_xtensa(), target_was_examined(), XDMREG_PWRCTL, XT_UNDEF, xtensa_dm_is_online(), xtensa_dm_queue_enable(), xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), xtensa_queue_pwr_reg_write(), and xtensa_smpbreak_write().
Referenced by esp_xtensa_smp_deassert_reset(), and xtensa_chip_examine().
int xtensa_fetch_all_regs | ( | struct target * | target | ) |
Definition at line 1007 of file xtensa.c.
References xtensa_reg_val_u::buf, buf_cpy(), buf_get_u32(), xtensa_keyval_info_s::chrval, xtensa_config::coproc, xtensa::core_cache, xtensa::core_config, xtensa::dbg_mod, xtensa_config::debug, reg::dirty, ERROR_FAIL, ERROR_OK, xtensa_reg_desc::exist, xtensa_reg_desc::flags, xtensa_keyval_info_s::intval, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_ERROR, LOG_INFO, LOG_LEVEL_IS, LOG_LVL_DEBUG, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, name, reg_cache::num_regs, OCDDSR_EXECEXCEPTION, xtensa::optregs, reg_cache::reg_list, xtensa_reg_desc::reg_num, xtensa::regs_fetched, xtensa::scratch_ars, size, target_to_xtensa(), type, xtensa_reg_desc::type, reg::valid, xtensa_config::windowed, XDMREG_DDR, XDMREG_DSR, XT_AR_SCRATCH_AR3, XT_AR_SCRATCH_AR4, XT_AR_SCRATCH_NUM, XT_AREGS_NUM_MAX, XT_EPC_REG_NUM_BASE, XT_EPS_REG_NUM_BASE, XT_INS_RFR, XT_INS_ROTW, XT_INS_RSR, XT_INS_RUR, XT_INS_WSR, XT_NUM_REGS, XT_PC_REG_NUM_VIRTUAL, XT_REG_A3, XT_REG_DEBUG, XT_REG_FR, XT_REG_GENERAL, XT_REG_IDX_A3, XT_REG_IDX_A4, XT_REG_IDX_AR0, XT_REG_IDX_CPENABLE, XT_REG_IDX_PS, XT_REG_IDX_WINDOWBASE, XT_REG_OTHER, XT_REG_RELGEN, XT_REG_SPECIAL, XT_REG_TIE, XT_REG_USER, XT_REGF_MASK, XT_REGF_NOREAD, XT_SR_DDR, xtensa_canonical_to_windowbase_offset(), xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_extra_debug_log, xtensa_mark_register_dirty(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_reg_is_readable(), xtensa_reg_set(), xtensa_regs, xtensa_window_state_restore(), xtensa_window_state_save(), and xtensa_windowbase_offset_to_canonical().
Referenced by COMMAND_HELPER(), xtensa_do_step(), and xtensa_poll().
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Definition at line 2927 of file xtensa.c.
References xtensa::algo_context_backup, xtensa::core_cache, xtensa::dbregs_num, xtensa::empty_regs, reg::name, xtensa_reg_desc::name, NULL, xtensa::num_optregs, reg_cache::num_regs, xtensa::optregs, target::reg_cache, reg_cache::reg_list, register_unlink_cache(), target_to_xtensa(), and reg::value.
Referenced by xtensa_target_deinit().
int xtensa_gdb_query_custom | ( | struct target * | target, |
const char * | packet, | ||
char ** | response_p | ||
) |
Definition at line 2740 of file xtensa.c.
References xtensa_local_mem_region_config::base, xtensa::core_config, xtensa_local_mem_config::count, xtensa_config::dcache, xtensa_high_prio_irq_config::enabled, ERROR_FAIL, ERROR_OK, xtensa_high_prio_irq_config::excm_level, xtensa_config::high_irq, xtensa_config::icache, xtensa_keyval_info_s::intval, xtensa_config::iram, xtensa_config::irom, xtensa_cache_config::line_size, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, NULL, xtensa::qpkt_resp, xtensa_local_mem_config::regions, size, xtensa_cache_config::size, xtensa_local_mem_region_config::size, xtensa::spill_buf, xtensa::spill_bytes, xtensa::spill_loc, target_to_xtensa(), xtensa_cache_config::way_count, xt_qerr, XT_QERR_INVAL, XT_QERR_MEM, and xtensa_gdbqc_qxtreg().
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Definition at line 2571 of file xtensa.c.
References ERROR_COMMAND_ARGUMENT_INVALID, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, status, target_to_xtensa(), and xtensa_queue_exec_ins_wide().
Referenced by xtensa_gdbqc_qxtreg().
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Definition at line 2602 of file xtensa.c.
References xtensa::dbg_mod, ERROR_OK, xtensa_keyval_info_s::intval, LOG_DEBUG, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, NULL, xtensa::spill_buf, xtensa::spill_bytes, xtensa::spill_loc, status, target_to_xtensa(), XDMREG_DDR, XT_INS_RSR, xt_qerr, XT_QERR_FAIL, XT_QERR_INVAL, XT_QERR_MEM, XT_QUERYPKT_RESP_MAX, XT_REG_A4, XT_REG_IDX_A4, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_gdbqc_parse_exec_tie_ops(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_read_memory(), xtensa_reg_get(), and xtensa_write_memory().
Referenced by xtensa_gdb_query_custom().
int xtensa_get_gdb_reg_list | ( | struct target * | target, |
struct reg ** | reg_list[], | ||
int * | reg_list_size, | ||
enum target_register_class | reg_class | ||
) |
Definition at line 1225 of file xtensa.c.
References xtensa::contiguous_regs_list, xtensa::core_cache, xtensa::core_config, xtensa_reg_desc::dbreg_num, xtensa::dbregs_num, xtensa_config::debug, xtensa::empty_regs, xtensa::eps_dbglevel_idx, ERROR_FAIL, ERROR_OK, reg::exist, xtensa::genpkt_regs_num, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_ERROR, reg_cache::num_regs, xtensa::optregs, REG_CLASS_GENERAL, reg_cache::reg_list, xtensa::regmap_contiguous, target_to_xtensa(), xtensa::total_regs_num, type, XT_NUM_REGS, XT_PC_DBREG_NUM_BASE, XT_REG_IDX_ARFIRST, XT_REG_IDX_PC, XT_REG_IDX_PS, XT_REG_RELGEN, xtensa_extra_debug_log, xtensa_reg_get_value(), and xtensa_regs.
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Gets a config for the specific mem type.
Definition at line 317 of file xtensa.c.
References xtensa::core_config, xtensa_config::dram, xtensa_config::drom, xtensa_config::iram, xtensa_config::irom, NULL, xtensa_config::sram, xtensa_config::srom, type, XTENSA_MEM_REG_DRAM, XTENSA_MEM_REG_DROM, XTENSA_MEM_REG_IRAM, XTENSA_MEM_REG_IROM, XTENSA_MEM_REG_SRAM, and XTENSA_MEM_REG_SROM.
Referenced by xtensa_target_memory_region_find().
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Returns a size of overlapped region of two ranges.
Definition at line 1686 of file xtensa.c.
References xtensa_memory_regions_overlap().
Referenced by xtensa_memory_op_validate_range().
int xtensa_halt | ( | struct target * | target | ) |
Definition at line 1302 of file xtensa.c.
References xtensa::dbg_mod, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, OCDDCR_DEBUGINTERRUPT, OCDDCR_ENABLEOCD, target::state, TARGET_HALTED, target_to_xtensa(), XDMREG_DCRSET, xtensa_dm_core_status_get(), xtensa_dm_core_status_read(), xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), xtensa_is_stopped(), and xtensa_queue_dbg_reg_write().
Referenced by esp32_soc_reset(), esp32s2_soc_reset(), and esp32s3_soc_reset().
int xtensa_init_arch_info | ( | struct target * | target, |
struct xtensa * | xtensa, | ||
const struct xtensa_debug_module_config * | dm_cfg | ||
) |
Definition at line 2851 of file xtensa.c.
References target::arch_info, xtensa_keyval_info_s::chrval, xtensa::common_magic, xtensa::core_config, xtensa::dbg_mod, xtensa_config::dcache, ERROR_FAIL, xtensa_config::icache, xtensa_keyval_info_s::intval, LOG_ERROR, xtensa::scratch_ars, xtensa::stepping_isr_mode, target, xtensa::target, xtensa_cache_config::way_count, XT_AR_SCRATCH_A3, XT_AR_SCRATCH_A4, XT_AR_SCRATCH_AR3, XT_AR_SCRATCH_NUM, XT_STEPPING_ISR_ON, XTENSA_COMMON_MAGIC, and xtensa_dm_init().
Referenced by esp_xtensa_init_arch_info(), and xtensa_chip_init_arch_info().
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Definition at line 376 of file xtensa.c.
References xtensa_cache_config::size, and xtensa_memory_region_find().
Referenced by xtensa_is_dcacheable(), and xtensa_is_icacheable().
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Definition at line 393 of file xtensa.c.
References xtensa::core_config, xtensa_config::dcache, xtensa_config::dram, xtensa_config::drom, xtensa_config::sram, xtensa_config::srom, and xtensa_is_cacheable().
Referenced by xtensa_update_instruction(), and xtensa_write_memory().
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Definition at line 385 of file xtensa.c.
References xtensa::core_config, xtensa_config::icache, xtensa_config::iram, xtensa_config::irom, xtensa_config::sram, xtensa_config::srom, and xtensa_is_cacheable().
Referenced by xtensa_update_instruction(), and xtensa_write_memory().
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Definition at line 774 of file xtensa.c.
References xtensa_debug_module::core_status, xtensa::dbg_mod, xtensa_core_status::dsr, OCDDSR_STOPPED, and target_to_xtensa().
Referenced by xtensa_do_step(), xtensa_halt(), and xtensa_poll().
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Definition at line 489 of file xtensa.c.
References xtensa::core_cache, reg::dirty, and reg_cache::reg_list.
Referenced by xtensa_fetch_all_regs(), xtensa_read_memory(), xtensa_update_instruction(), xtensa_write_dirty_registers(), and xtensa_write_memory().
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Check if the address gets to memory regions, and its access mode.
Definition at line 1702 of file xtensa.c.
References xtensa_local_mem_region_config::access, xtensa_local_mem_region_config::base, size, xtensa_local_mem_region_config::size, xtensa_get_overlap_size(), and xtensa_target_memory_region_find().
Referenced by xtensa_read_memory(), and xtensa_write_memory().
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Extracts an exact xtensa_local_mem_region_config from xtensa_local_mem_config for a given address Returns NULL if nothing found.
Definition at line 344 of file xtensa.c.
References xtensa_local_mem_region_config::base, xtensa_local_mem_config::count, NULL, xtensa_local_mem_config::regions, and xtensa_local_mem_region_config::size.
Referenced by xtensa_is_cacheable(), and xtensa_target_memory_region_find().
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Returns true if two ranges are overlapping.
Definition at line 1671 of file xtensa.c.
Referenced by xtensa_get_overlap_size().
int xtensa_mmu_is_enabled | ( | struct target * | target, |
int * | enabled | ||
) |
Definition at line 1294 of file xtensa.c.
References xtensa::core_config, xtensa_mmu_config::dtlb_entries_count, ERROR_OK, xtensa_mmu_config::itlb_entries_count, xtensa_config::mmu, and target_to_xtensa().
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Definition at line 1433 of file xtensa.c.
References buf_get_u32(), ERROR_OK, target_to_xtensa(), XT_INS_L32E, XT_INS_L32E_S32E_MASK, XT_INS_RFWO, XT_INS_RFWO_RFWU_MASK, XT_INS_RFWU, XT_INS_S32E, XT_ISNS_SZ_MAX, and xtensa_read_buffer().
Referenced by xtensa_do_step().
int xtensa_poll | ( | struct target * | target | ) |
Definition at line 2022 of file xtensa.c.
References xtensa::come_online_probes_num, xtensa_debug_module::core_status, xtensa::dbg_mod, DBG_REASON_BREAKPOINT, DBG_REASON_DBGRQ, DBG_REASON_NOTHALTED, DBG_REASON_SINGLESTEP, DBG_REASON_WATCHPOINT, DBG_REASON_WPTANDBKPT, target::debug_reason, DEBUGCAUSE_BI, DEBUGCAUSE_BN, DEBUGCAUSE_DB, DEBUGCAUSE_IB, DEBUGCAUSE_IC, xtensa_core_status::dsr, ERROR_OK, ERROR_TARGET_NOT_EXAMINED, target::examined, LOG_INFO, LOG_TARGET_DEBUG, LOG_TARGET_INFO, OCDDSR_DEBUGINTBREAK, OCDDSR_DEBUGINTHOST, OCDDSR_DEBUGINTTRAX, OCDDSR_DEBUGPENDBREAK, OCDDSR_DEBUGPENDHOST, OCDDSR_DEBUGPENDTRAX, OCDDSR_STOPPED, xtensa_debug_module::power_status, PWRSTAT_COREWASRESET, PWRSTAT_DEBUGWASRESET, xtensa::smp_break, xtensa_power_status::stat, target::state, xtensa_power_status::stath, TARGET_DEBUG_RUNNING, TARGET_HALTED, TARGET_RESET, TARGET_RUNNING, target_to_xtensa(), TARGET_UNKNOWN, xtensa::trace_active, TRAXSTAT_CTITG, TRAXSTAT_PCMTG, TRAXSTAT_PTITG, TRAXSTAT_TRACT, XT_REG_IDX_EXCCAUSE, XT_REG_IDX_PC, xtensa_cause_get(), xtensa_dm_core_status_clear(), xtensa_dm_core_status_read(), xtensa_dm_core_was_reset(), xtensa_dm_is_powered(), xtensa_dm_poll(), xtensa_dm_power_status_cache(), xtensa_dm_power_status_read(), xtensa_dm_tap_was_reset(), xtensa_dm_trace_status_read(), xtensa_fetch_all_regs(), xtensa_is_stopped(), xtensa_reg_get(), xtensa_smpbreak_write(), and xtensa_wakeup().
Referenced by esp32_soc_reset(), esp32s2_soc_reset(), esp32s3_soc_reset(), esp_xtensa_poll(), and xtensa_chip_poll().
int xtensa_prepare_resume | ( | struct target * | target, |
int | current, | ||
target_addr_t | address, | ||
int | handle_breakpoints, | ||
int | debug_execution | ||
) |
Definition at line 1329 of file xtensa.c.
References breakpoint::address, BIT, xtensa::core_config, xtensa_config::debug, DEBUGCAUSE_BI, DEBUGCAUSE_BN, DEBUGCAUSE_DB, ERROR_OK, ERROR_TARGET_NOT_HALTED, xtensa::hw_brps, xtensa_debug_config::ibreaks_num, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, target::state, TARGET_ADDR_FMT, TARGET_HALTED, target_to_xtensa(), XT_REG_IDX_IBREAKA0, XT_REG_IDX_IBREAKENABLE, XT_REG_IDX_PC, xtensa_cause_get(), xtensa_do_step(), xtensa_reg_set(), and xtensa_write_dirty_registers().
Referenced by esp_xtensa_smp_resume(), xtensa_do_step(), and xtensa_resume().
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Definition at line 495 of file xtensa.c.
References XDMREG_DIR0EXEC, and xtensa_queue_dbg_reg_write().
Referenced by COMMAND_HELPER(), xtensa_do_resume(), xtensa_fetch_all_regs(), xtensa_gdbqc_qxtreg(), xtensa_read_memory(), xtensa_update_instruction(), xtensa_window_state_restore(), xtensa_window_state_save(), xtensa_write_dirty_registers(), and xtensa_write_memory().
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Definition at line 500 of file xtensa.c.
References DIV_ROUND_UP, xtensa::target, target_buffer_get_u32(), XDMREG_DIR0, XDMREG_DIR0EXEC, and xtensa_queue_dbg_reg_write().
Referenced by COMMAND_HELPER(), and xtensa_gdbqc_parse_exec_tie_ops().
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Definition at line 519 of file xtensa.c.
References xtensa::dbg_mod, xtensa_debug_module::pwr_ops, and xtensa_power_ops::queue_reg_write.
Referenced by xtensa_assert_reset(), xtensa_deassert_reset(), xtensa_examine(), and xtensa_wakeup().
int xtensa_read_buffer | ( | struct target * | target, |
target_addr_t | address, | ||
uint32_t | count, | ||
uint8_t * | buffer | ||
) |
Definition at line 1805 of file xtensa.c.
References buffer, count, and xtensa_read_memory().
Referenced by xtensa_pc_in_winexc().
int xtensa_read_memory | ( | struct target * | target, |
target_addr_t | address, | ||
uint32_t | size, | ||
uint32_t | count, | ||
uint8_t * | buffer | ||
) |
Definition at line 1722 of file xtensa.c.
References ALIGN_DOWN, ALIGN_UP, buf_bswap32(), buffer, count, xtensa::dbg_mod, target::endianness, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, LOG_DEBUG, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, xtensa::permissive_mode, xtensa::probe_lsddr32p, size, target::state, xtensa::suppress_dsr_errors, xtensa::target, TARGET_ADDR_FMT, TARGET_BIG_ENDIAN, TARGET_HALTED, target_to_xtensa(), XDMREG_DDR, XDMREG_DDREXEC, XT_INS_L32I, XT_INS_LDDR32P, XT_INS_RSR, XT_INS_WSR, XT_MEM_ACCESS_READ, XT_REG_A3, XT_REG_A4, XT_REG_IDX_A3, XT_REG_IDX_A4, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_mark_register_dirty(), xtensa_memory_op_validate_range(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), and xtensa_queue_exec_ins().
Referenced by xtensa_gdbqc_qxtreg(), and xtensa_read_buffer().
xtensa_reg_val_t xtensa_reg_get | ( | struct target * | target, |
enum xtensa_reg_id | reg_id | ||
) |
Definition at line 918 of file xtensa.c.
References xtensa::core_cache, reg_cache::reg_list, target_to_xtensa(), and xtensa_reg_get_value().
Referenced by COMMAND_HELPER(), esp_xtensa_semihosting(), xtensa_cause_get(), xtensa_do_step(), xtensa_gdbqc_qxtreg(), xtensa_poll(), xtensa_reg_set_deep_relgen(), and xtensa_write_dirty_registers().
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Definition at line 870 of file xtensa.c.
References buf_get_u32(), and reg::value.
Referenced by xtensa_get_gdb_reg_list(), xtensa_reg_get(), and xtensa_reg_set().
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Definition at line 566 of file xtensa.c.
References BIT, XT_REGF_COPROC0, and XT_REGF_NOREAD.
Referenced by xtensa_fetch_all_regs().
void xtensa_reg_set | ( | struct target * | target, |
enum xtensa_reg_id | reg_id, | ||
xtensa_reg_val_t | value | ||
) |
Definition at line 925 of file xtensa.c.
References xtensa::core_cache, reg_cache::reg_list, target_to_xtensa(), reg::value, xtensa_reg_get_value(), and xtensa_reg_set_value().
Referenced by COMMAND_HELPER(), esp_xtensa_semihosting_post_result(), xtensa_cause_clear(), xtensa_do_step(), xtensa_fetch_all_regs(), xtensa_prepare_resume(), xtensa_reg_set_deep_relgen(), xtensa_watchpoint_add(), and xtensa_watchpoint_remove().
void xtensa_reg_set_deep_relgen | ( | struct target * | target, |
enum xtensa_reg_id | a_idx, | ||
xtensa_reg_val_t | value | ||
) |
Definition at line 935 of file xtensa.c.
References xtensa::core_config, target_to_xtensa(), xtensa_config::windowed, XT_REG_IDX_WINDOWBASE, xtensa_reg_get(), xtensa_reg_set(), and xtensa_windowbase_offset_to_canonical().
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Definition at line 875 of file xtensa.c.
References buf_set_u32(), reg::dirty, and reg::value.
Referenced by xtensa_reg_set().
int xtensa_resume | ( | struct target * | target, |
int | current, | ||
target_addr_t | address, | ||
int | handle_breakpoints, | ||
int | debug_execution | ||
) |
Definition at line 1404 of file xtensa.c.
References DBG_REASON_NOTHALTED, target::debug_reason, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, target::state, target_call_event_callbacks(), TARGET_DEBUG_RUNNING, TARGET_EVENT_RESUMED, TARGET_RUNNING, xtensa_do_resume(), and xtensa_prepare_resume().
Referenced by esp32_soc_reset(), and esp32s3_soc_reset().
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Definition at line 575 of file xtensa.c.
References xtensa_keyval_info_s::intval, LOG_DEBUG, xtensa::scratch_ars, XT_AR_SCRATCH_A3, and XT_REG_IDX_AR0.
Referenced by xtensa_write_dirty_registers().
void xtensa_set_permissive_mode | ( | struct target * | target, |
bool | state | ||
) |
Definition at line 2890 of file xtensa.c.
References xtensa::permissive_mode, state, and target_to_xtensa().
int xtensa_smpbreak_get | ( | struct target * | target, |
uint32_t * | val | ||
) |
Definition at line 863 of file xtensa.c.
References ERROR_OK, xtensa::smp_break, and target_to_xtensa().
Referenced by esp_xtensa_smp_resume(), and esp_xtensa_smp_smpbreak_disable().
int xtensa_smpbreak_read | ( | struct xtensa * | xtensa, |
uint32_t * | val | ||
) |
Definition at line 851 of file xtensa.c.
References buf_get_u32(), xtensa::dbg_mod, XDMREG_DCRSET, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), and xtensa_queue_dbg_reg_read().
Referenced by COMMAND_HELPER().
int xtensa_smpbreak_set | ( | struct target * | target, |
uint32_t | set | ||
) |
Definition at line 839 of file xtensa.c.
References ERROR_OK, LOG_TARGET_DEBUG, xtensa::smp_break, target::state, target_to_xtensa(), target_was_examined(), and xtensa_smpbreak_write().
Referenced by COMMAND_HELPER(), esp_xtensa_smp_smpbreak_disable(), and esp_xtensa_smp_smpbreak_restore().
int xtensa_smpbreak_write | ( | struct xtensa * | xtensa, |
uint32_t | set | ||
) |
Definition at line 824 of file xtensa.c.
References xtensa::dbg_mod, LOG_TARGET_DEBUG, OCDDCR_BREAKINEN, OCDDCR_BREAKOUTEN, OCDDCR_DEBUGMODEOUTEN, OCDDCR_ENABLEOCD, OCDDCR_RUNSTALLINEN, xtensa::target, XDMREG_DCRCLR, XDMREG_DCRSET, XDMREG_DSR, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), and xtensa_queue_dbg_reg_write().
Referenced by esp32s2_deassert_reset(), esp32s2_soc_reset(), xtensa_examine(), xtensa_poll(), and xtensa_smpbreak_set().
int xtensa_soft_reset_halt | ( | struct target * | target | ) |
Definition at line 1001 of file xtensa.c.
References LOG_TARGET_DEBUG, and xtensa_assert_reset().
Referenced by esp32s2_soft_reset_halt().
int xtensa_step | ( | struct target * | target, |
int | current, | ||
target_addr_t | address, | ||
int | handle_breakpoints | ||
) |
Definition at line 1658 of file xtensa.c.
References ERROR_OK, target_call_event_callbacks(), TARGET_EVENT_HALTED, and xtensa_do_step().
Referenced by esp32s2_step(), and esp_xtensa_smp_step().
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Definition at line 2217 of file xtensa.c.
References breakpoint::address, ERROR_OK, xtensa_sw_breakpoint::insn, xtensa_sw_breakpoint::insn_sz, breakpoint::length, LOG_TARGET_ERROR, MIN, xtensa_sw_breakpoint::oocd_bp, target_read_buffer(), target_to_xtensa(), XT_INS_BREAK, XT_INS_BREAKN, XT_ISNS_SZ_MAX, and xtensa_update_instruction().
Referenced by xtensa_breakpoint_add().
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Definition at line 2243 of file xtensa.c.
References breakpoint::address, ERROR_OK, xtensa_sw_breakpoint::insn, xtensa_sw_breakpoint::insn_sz, LOG_TARGET_ERROR, NULL, xtensa_sw_breakpoint::oocd_bp, and xtensa_update_instruction().
Referenced by xtensa_breakpoint_remove().
void xtensa_target_deinit | ( | struct target * | target | ) |
Definition at line 2961 of file xtensa.c.
References xtensa_keyval_info_s::chrval, xtensa::core_config, xtensa::dbg_mod, ERROR_OK, xtensa::hw_brps, xtensa::hw_wps, LOG_DEBUG, LOG_ERROR, NULL, OCDDCR_ENABLEOCD, xtensa::scratch_ars, xtensa::spill_buf, xtensa::sw_brps, target_to_xtensa(), target_was_examined(), XDMREG_DCRCLR, XT_AR_SCRATCH_NUM, xtensa_dm_deinit(), xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), xtensa_free_reg_cache(), and xtensa_queue_dbg_reg_write().
Referenced by esp_xtensa_target_deinit(), and xtensa_chip_target_deinit().
int xtensa_target_init | ( | struct command_context * | cmd_ctx, |
struct target * | target | ||
) |
Definition at line 2895 of file xtensa.c.
References xtensa::come_online_probes_num, ERROR_FAIL, xtensa::hw_brps, xtensa::hw_wps, LOG_ERROR, NULL, xtensa::probe_lsddr32p, xtensa::spill_buf, xtensa::spill_bytes, xtensa::spill_loc, xtensa::sw_brps, target_to_xtensa(), XT_HW_DBREAK_MAX_NUM, XT_HW_IBREAK_MAX_NUM, XT_SW_BREAKPOINTS_MAX_NUM, and xtensa_build_reg_cache().
Referenced by esp_xtensa_target_init(), and xtensa_chip_target_init().
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Returns a corresponding xtensa_local_mem_region_config from the xtensa target for a given address Returns NULL if nothing found.
Definition at line 361 of file xtensa.c.
References NULL, xtensa_get_mem_config(), XTENSA_MEM_REGS_NUM, and xtensa_memory_region_find().
Referenced by xtensa_memory_op_validate_range().
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Definition at line 2140 of file xtensa.c.
References buffer, xtensa::core_config, xtensa::dbg_mod, xtensa_config::dcache, ERROR_FAIL, ERROR_OK, xtensa_config::icache, xtensa_cache_config::line_size, LOG_DEBUG, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, size, TARGET_ADDR_FMT, target_to_xtensa(), target_write_buffer(), XDMREG_DDR, XT_INS_DHWB, XT_INS_DHWBI, XT_INS_IHI, XT_INS_RSR, XT_REG_A3, XT_REG_IDX_A3, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_is_dcacheable(), xtensa_is_icacheable(), xtensa_mark_register_dirty(), xtensa_queue_dbg_reg_write(), and xtensa_queue_exec_ins().
Referenced by xtensa_sw_breakpoint_add(), and xtensa_sw_breakpoint_remove().
int xtensa_wakeup | ( | struct target * | target | ) |
Definition at line 810 of file xtensa.c.
References cmd, xtensa::dbg_mod, PWRCTL_CORERESET, PWRCTL_COREWAKEUP, PWRCTL_DEBUGWAKEUP, PWRCTL_JTAGDEBUGUSE, PWRCTL_MEMWAKEUP, xtensa::reset_asserted, target_to_xtensa(), XDMREG_PWRCTL, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), and xtensa_queue_pwr_reg_write().
Referenced by xtensa_poll().
int xtensa_watchpoint_add | ( | struct target * | target, |
struct watchpoint * | watchpoint | ||
) |
Definition at line 2334 of file xtensa.c.
References watchpoint::address, ALIGN_DOWN, BIT, xtensa::core_config, xtensa_debug_config::dbreaks_num, xtensa_config::debug, ERROR_OK, ERROR_TARGET_NOT_HALTED, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa::hw_wps, IS_ALIGNED, IS_PWR_OF_2, watchpoint::length, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, watchpoint::mask, watchpoint::rw, target::state, TARGET_ADDR_FMT, TARGET_HALTED, target_to_xtensa(), WPT_ACCESS, WPT_READ, WPT_WRITE, XT_REG_IDX_DBREAKA0, XT_REG_IDX_DBREAKC0, and xtensa_reg_set().
Referenced by esp_xtensa_smp_watchpoint_add().
int xtensa_watchpoint_remove | ( | struct target * | target, |
struct watchpoint * | watchpoint | ||
) |
Definition at line 2390 of file xtensa.c.
References watchpoint::address, xtensa::core_config, xtensa_debug_config::dbreaks_num, xtensa_config::debug, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa::hw_wps, LOG_TARGET_DEBUG, LOG_TARGET_WARNING, NULL, TARGET_ADDR_FMT, target_to_xtensa(), XT_REG_IDX_DBREAKC0, and xtensa_reg_set().
Referenced by esp_xtensa_smp_watchpoint_remove().
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Definition at line 554 of file xtensa.c.
References xtensa::core_config, LOG_DEBUG, target_to_xtensa(), xtensa_config::windowed, XDMREG_DDR, XT_INS_RSR, XT_INS_WSR, XT_REG_A3, XT_SR_DDR, XT_SR_PS, xtensa_queue_dbg_reg_write(), and xtensa_queue_exec_ins().
Referenced by xtensa_fetch_all_regs(), and xtensa_write_dirty_registers().
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Definition at line 526 of file xtensa.c.
References buf_get_u32(), xtensa::core_config, xtensa::dbg_mod, ERROR_OK, LOG_DEBUG, LOG_ERROR, target_to_xtensa(), xtensa_config::windowed, XDMREG_DDR, XT_INS_RSR, XT_INS_WSR, XT_PS_WOE_MSK, XT_REG_A3, XT_SR_DDR, XT_SR_PS, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), and xtensa_queue_exec_ins().
Referenced by xtensa_fetch_all_regs(), and xtensa_write_dirty_registers().
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Definition at line 420 of file xtensa.c.
Referenced by xtensa_fetch_all_regs(), xtensa_reg_set_deep_relgen(), and xtensa_write_dirty_registers().
int xtensa_write_buffer | ( | struct target * | target, |
target_addr_t | address, | ||
uint32_t | count, | ||
const uint8_t * | buffer | ||
) |
Definition at line 2010 of file xtensa.c.
References buffer, count, and xtensa_write_memory().
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Definition at line 588 of file xtensa.c.
References buf_get_u32(), xtensa::core_cache, xtensa::core_config, xtensa::dbg_mod, xtensa_config::debug, reg::dirty, ERROR_OK, xtensa_reg_desc::exist, xtensa_keyval_info_s::intval, xtensa_debug_config::irq_level, LOG_TARGET_DEBUG, LOG_WARNING, name, reg_cache::num_regs, xtensa::optregs, reg_cache::reg_list, xtensa_reg_desc::reg_num, xtensa::scratch_ars, target_to_xtensa(), type, xtensa_config::windowed, XDMREG_DDR, XT_AR_SCRATCH_A3, XT_AR_SCRATCH_A4, XT_AR_SCRATCH_AR3, XT_AR_SCRATCH_AR4, XT_AR_SCRATCH_NUM, XT_EPC_REG_NUM_BASE, XT_INS_ROTW, XT_INS_RSR, XT_INS_WFR, XT_INS_WSR, XT_INS_WUR, XT_NUM_REGS, XT_PC_REG_NUM_VIRTUAL, XT_REG_A3, XT_REG_FR, XT_REG_IDX_A0, XT_REG_IDX_A15, XT_REG_IDX_A3, XT_REG_IDX_A4, XT_REG_IDX_AR0, XT_REG_IDX_ARLAST, XT_REG_IDX_CPENABLE, XT_REG_IDX_WINDOWBASE, XT_REG_SPECIAL, XT_REG_USER, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_mark_register_dirty(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_reg_get(), xtensa_regs, xtensa_scratch_regs_fixup(), xtensa_window_state_restore(), xtensa_window_state_save(), and xtensa_windowbase_offset_to_canonical().
Referenced by COMMAND_HELPER(), xtensa_do_step(), and xtensa_prepare_resume().
int xtensa_write_memory | ( | struct target * | target, |
target_addr_t | address, | ||
uint32_t | size, | ||
uint32_t | count, | ||
const uint8_t * | buffer | ||
) |
Definition at line 1811 of file xtensa.c.
References ALIGN_DOWN, ALIGN_UP, buf_bswap32(), buf_get_u32(), buffer, xtensa::core_config, count, xtensa::dbg_mod, xtensa_config::dcache, target::endianness, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa_config::icache, xtensa_cache_config::line_size, LOG_ERROR, LOG_TARGET_ERROR, LOG_TARGET_INFO, LOG_TARGET_WARNING, LOG_WARNING, MIN, xtensa::permissive_mode, xtensa::probe_lsddr32p, size, target::state, xtensa::suppress_dsr_errors, xtensa::target, TARGET_ADDR_FMT, TARGET_BIG_ENDIAN, TARGET_HALTED, target_to_xtensa(), XDMREG_DDR, XDMREG_DDREXEC, XT_INS_DHWBI, XT_INS_IHI, XT_INS_L32I, XT_INS_LDDR32P, XT_INS_RSR, XT_INS_S32I, XT_INS_SDDR32P, XT_INS_WSR, XT_MEM_ACCESS_WRITE, XT_REG_A3, XT_REG_A4, XT_REG_IDX_A3, XT_REG_IDX_A4, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_is_dcacheable(), xtensa_is_icacheable(), xtensa_mark_register_dirty(), xtensa_memory_op_validate_range(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), and xtensa_queue_exec_ins().
Referenced by xtensa_gdbqc_qxtreg(), and xtensa_write_buffer().
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Definition at line 1 of file xtensa.c.
Referenced by xtensa_gdb_query_custom(), and xtensa_gdbqc_qxtreg().
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const struct command_registration xtensa_command_handlers[] |
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Definition at line 312 of file xtensa.c.
Referenced by COMMAND_HELPER(), xtensa_build_reg_cache(), xtensa_fetch_all_regs(), and xtensa_get_gdb_reg_list().
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Definition at line 420 of file xtensa.c.
Referenced by xtensa_build_reg_cache().
struct xtensa_reg_desc xtensa_regs[XT_NUM_REGS] |
Definition at line 1 of file xtensa.c.
Referenced by COMMAND_HELPER(), xtensa_build_reg_cache(), xtensa_fetch_all_regs(), xtensa_get_gdb_reg_list(), and xtensa_write_dirty_registers().