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xtensa.h File Reference

Holds the interface to Xtensa cores. More...

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Data Structures

struct  xtensa
 Represents a generic Xtensa core. More...
 
struct  xtensa_algorithm
 Xtensa algorithm data. More...
 
struct  xtensa_cache_config
 
struct  xtensa_config
 
struct  xtensa_debug_config
 
struct  xtensa_high_prio_irq_config
 
struct  xtensa_irq_config
 
struct  xtensa_keyval_info
 
struct  xtensa_local_mem_config
 
struct  xtensa_local_mem_region_config
 
struct  xtensa_mmu_config
 
struct  xtensa_mpu_config
 
struct  xtensa_sw_breakpoint
 
struct  xtensa_tracing_config
 

Macros

#define XT_AREGS_NUM_MAX   64
 
#define XT_IBREAKC_FB   (0x80000000)
 
#define XT_IMPR_EXC_MSK   (0x00000013)
 
#define XT_INS_BREAK(X, S, T)   (XT_ISBE(X) ? XT_INS_BREAK_BE(S, T) : XT_INS_BREAK_LE(S, T))
 
#define XT_INS_BREAK_BE(S, T)   (0x000400 | (((S) & 0xF) << 12) | ((T) & 0xF))
 
#define XT_INS_BREAK_LE(S, T)   (0x004000 | (((S) & 0xF) << 8) | (((T) & 0xF) << 4))
 
#define XT_INS_BREAKN(X, IMM4)   (XT_ISBE(X) ? XT_INS_BREAKN_BE(IMM4) : XT_INS_BREAKN_LE(IMM4))
 
#define XT_INS_BREAKN_BE(IMM4)   (0x0FD2 | (((IMM4) & 0xF) << 12))
 
#define XT_INS_BREAKN_LE(IMM4)   (0xF02D | (((IMM4) & 0xF) << 8))
 
#define XT_ISBE(X)   ((X)->target->endianness == TARGET_BIG_ENDIAN)
 
#define XT_ISNS_SZ_MAX   3
 
#define XT_LOCAL_MEM_REGIONS_NUM_MAX   8
 
#define XT_MAX_TIE_REG_WIDTH   (512) /* TIE register file max 4096 bits */
 
#define XT_MEM_ACCESS_NONE   0x0
 
#define XT_MEM_ACCESS_READ   0x1
 
#define XT_MEM_ACCESS_WRITE   0x2
 
#define XT_MESRCLR_IMPR_EXC_MSK   (0x00000090)
 
#define XT_MS_DE_MSK   BIT(5)
 
#define XT_MS_DISPST_DBG   (0x10)
 
#define XT_MS_DISPST_MSK   (0x1f)
 
#define XT_PS_CALLINC_MSK   (0x3 << 16)
 
#define XT_PS_DIEXC_MSK   BIT(2)
 
#define XT_PS_OWB_MSK   (0xF << 8)
 
#define XT_PS_RING(_v_)   ((uint32_t)((_v_) & 0x3) << 6)
 
#define XT_PS_RING_GET(_v_)   (((_v_) >> 6) & 0x3)
 
#define XT_PS_RING_MSK   (0x3 << 6)
 
#define XT_PS_WOE_MSK   BIT(18)
 
#define XT_QUERYPKT_RESP_MAX   (XT_MAX_TIE_REG_WIDTH * 2 + 1)
 
#define XT_USER_REGS_NUM_MAX   256
 
#define XT_WB_C_MSK   (0x7U << XT_WB_C_SHIFT)
 
#define XT_WB_C_SHIFT   (4)
 
#define XT_WB_N_MSK   (0x7U << XT_WB_N_SHIFT)
 
#define XT_WB_N_SHIFT   (8)
 
#define XT_WB_P_MSK   (0x7U << XT_WB_P_SHIFT)
 
#define XT_WB_P_SHIFT   (0)
 
#define XT_WB_S_MSK   (0x3U << XT_WB_S_SHIFT)
 
#define XT_WB_S_SHIFT   (30)
 
#define XTENSA_COMMON_MAGIC   0x54E4E555U
 

Typedefs

typedef uint32_t xtensa_insn_t
 

Enumerations

enum  xtensa_ar_scratch_set_e {
  XT_AR_SCRATCH_A3 = 0 , XT_AR_SCRATCH_AR3 , XT_AR_SCRATCH_A4 , XT_AR_SCRATCH_AR4 ,
  XT_AR_SCRATCH_NUM
}
 
enum  xtensa_mode {
  XT_MODE_RING0 , XT_MODE_RING1 , XT_MODE_RING2 , XT_MODE_RING3 ,
  XT_MODE_ANY
}
 
enum  xtensa_nx_reg_idx {
  XT_NX_REG_IDX_IBREAKC0 = 0 , XT_NX_REG_IDX_WB , XT_NX_REG_IDX_MS , XT_NX_REG_IDX_IEVEC ,
  XT_NX_REG_IDX_IEEXTERN , XT_NX_REG_IDX_MESR , XT_NX_REG_IDX_MESRCLR , XT_NX_REG_IDX_NUM
}
 
enum  xtensa_qerr_e {
  XT_QERR_INTERNAL = 0 , XT_QERR_FAIL , XT_QERR_INVAL , XT_QERR_MEM ,
  XT_QERR_NUM
}
 
enum  xtensa_stepping_isr_mode { XT_STEPPING_ISR_OFF , XT_STEPPING_ISR_ON }
 
enum  xtensa_type { XT_UNDEF = 0 , XT_LX , XT_NX }
 

Functions

 COMMAND_HELPER (xtensa_cmd_mask_interrupts_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_perfmon_dump_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_perfmon_enable_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_permissive_mode_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_smpbreak_do, struct target *target)
 
 COMMAND_HELPER (xtensa_cmd_tracedump_do, struct xtensa *xtensa, const char *fname)
 
 COMMAND_HELPER (xtensa_cmd_tracestart_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_tracestop_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_xtdef_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_xtmem_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_xtmmu_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_xtmpu_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_xtopt_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_xtreg_do, struct xtensa *xtensa)
 
 COMMAND_HELPER (xtensa_cmd_xtregfmt_do, struct xtensa *xtensa)
 
static struct xtensatarget_to_xtensa (struct target *target)
 
static bool xtensa_addr_in_mem (const struct xtensa_local_mem_config *mem, uint32_t addr)
 
int xtensa_assert_reset (struct target *target)
 
int xtensa_breakpoint_add (struct target *target, struct breakpoint *breakpoint)
 
int xtensa_breakpoint_remove (struct target *target, struct breakpoint *breakpoint)
 
void xtensa_cause_clear (struct target *target)
 
uint32_t xtensa_cause_get (struct target *target)
 
void xtensa_cause_reset (struct target *target)
 
int xtensa_checksum_memory (struct target *target, target_addr_t address, uint32_t count, uint32_t *checksum)
 
int xtensa_core_status_check (struct target *target)
 
static int xtensa_core_status_clear (struct target *target, uint32_t bits)
 
static bool xtensa_data_addr_valid (struct target *target, uint32_t addr)
 
int xtensa_deassert_reset (struct target *target)
 
int xtensa_do_resume (struct target *target)
 
int xtensa_do_step (struct target *target, int current, target_addr_t address, int handle_breakpoints)
 
int xtensa_examine (struct target *target)
 
int xtensa_fetch_all_regs (struct target *target)
 
int xtensa_gdb_query_custom (struct target *target, const char *packet, char **response_p)
 
const char * xtensa_get_gdb_arch (const struct target *target)
 
int xtensa_get_gdb_reg_list (struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class)
 
int xtensa_halt (struct target *target)
 
int xtensa_init_arch_info (struct target *target, struct xtensa *xtensa, const struct xtensa_debug_module_config *dm_cfg)
 
int xtensa_mmu_is_enabled (struct target *target, int *enabled)
 
void xtensa_on_poll (struct target *target)
 
int xtensa_poll (struct target *target)
 
int xtensa_prepare_resume (struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution)
 
static int xtensa_queue_dbg_reg_read (struct xtensa *xtensa, enum xtensa_dm_reg reg, uint8_t *data)
 
static int xtensa_queue_dbg_reg_write (struct xtensa *xtensa, enum xtensa_dm_reg reg, uint32_t data)
 
int xtensa_read_buffer (struct target *target, target_addr_t address, uint32_t count, uint8_t *buffer)
 
int xtensa_read_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 
xtensa_reg_val_t xtensa_reg_get (struct target *target, enum xtensa_reg_id reg_id)
 
void xtensa_reg_set (struct target *target, enum xtensa_reg_id reg_id, xtensa_reg_val_t value)
 
void xtensa_reg_set_deep_relgen (struct target *target, enum xtensa_reg_id a_idx, xtensa_reg_val_t value)
 
int xtensa_resume (struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution)
 
int xtensa_run_algorithm (struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t entry_point, target_addr_t exit_point, unsigned int timeout_ms, void *arch_info)
 
void xtensa_set_permissive_mode (struct target *target, bool state)
 
int xtensa_smpbreak_get (struct target *target, uint32_t *val)
 
int xtensa_smpbreak_read (struct xtensa *xtensa, uint32_t *val)
 
int xtensa_smpbreak_set (struct target *target, uint32_t set)
 
int xtensa_smpbreak_write (struct xtensa *xtensa, uint32_t set)
 
int xtensa_soft_reset_halt (struct target *target)
 
int xtensa_start_algorithm (struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t entry_point, target_addr_t exit_point, void *arch_info)
 
int xtensa_step (struct target *target, int current, target_addr_t address, int handle_breakpoints)
 
void xtensa_target_deinit (struct target *target)
 
int xtensa_target_init (struct command_context *cmd_ctx, struct target *target)
 
int xtensa_wait_algorithm (struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t exit_point, unsigned int timeout_ms, void *arch_info)
 Waits for an algorithm in the target. More...
 
int xtensa_wakeup (struct target *target)
 
int xtensa_watchpoint_add (struct target *target, struct watchpoint *watchpoint)
 
int xtensa_watchpoint_remove (struct target *target, struct watchpoint *watchpoint)
 
int xtensa_write_buffer (struct target *target, target_addr_t address, uint32_t count, const uint8_t *buffer)
 
int xtensa_write_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
 

Variables

const struct command_registration xtensa_command_handlers []
 

Detailed Description

Holds the interface to Xtensa cores.

Definition in file xtensa.h.

Macro Definition Documentation

◆ XT_AREGS_NUM_MAX

#define XT_AREGS_NUM_MAX   64

Definition at line 73 of file xtensa.h.

◆ XT_IBREAKC_FB

#define XT_IBREAKC_FB   (0x80000000)

Definition at line 65 of file xtensa.h.

◆ XT_IMPR_EXC_MSK

#define XT_IMPR_EXC_MSK   (0x00000013)

Definition at line 68 of file xtensa.h.

◆ XT_INS_BREAK

#define XT_INS_BREAK (   X,
  S,
 
)    (XT_ISBE(X) ? XT_INS_BREAK_BE(S, T) : XT_INS_BREAK_LE(S, T))

Definition at line 29 of file xtensa.h.

◆ XT_INS_BREAK_BE

#define XT_INS_BREAK_BE (   S,
 
)    (0x000400 | (((S) & 0xF) << 12) | ((T) & 0xF))

Definition at line 28 of file xtensa.h.

◆ XT_INS_BREAK_LE

#define XT_INS_BREAK_LE (   S,
 
)    (0x004000 | (((S) & 0xF) << 8) | (((T) & 0xF) << 4))

Definition at line 27 of file xtensa.h.

◆ XT_INS_BREAKN

#define XT_INS_BREAKN (   X,
  IMM4 
)    (XT_ISBE(X) ? XT_INS_BREAKN_BE(IMM4) : XT_INS_BREAKN_LE(IMM4))

Definition at line 34 of file xtensa.h.

◆ XT_INS_BREAKN_BE

#define XT_INS_BREAKN_BE (   IMM4)    (0x0FD2 | (((IMM4) & 0xF) << 12))

Definition at line 33 of file xtensa.h.

◆ XT_INS_BREAKN_LE

#define XT_INS_BREAKN_LE (   IMM4)    (0xF02D | (((IMM4) & 0xF) << 8))

Definition at line 32 of file xtensa.h.

◆ XT_ISBE

#define XT_ISBE (   X)    ((X)->target->endianness == TARGET_BIG_ENDIAN)

Definition at line 24 of file xtensa.h.

◆ XT_ISNS_SZ_MAX

#define XT_ISNS_SZ_MAX   3

Definition at line 36 of file xtensa.h.

◆ XT_LOCAL_MEM_REGIONS_NUM_MAX

#define XT_LOCAL_MEM_REGIONS_NUM_MAX   8

Definition at line 71 of file xtensa.h.

◆ XT_MAX_TIE_REG_WIDTH

#define XT_MAX_TIE_REG_WIDTH   (512) /* TIE register file max 4096 bits */

Definition at line 80 of file xtensa.h.

◆ XT_MEM_ACCESS_NONE

#define XT_MEM_ACCESS_NONE   0x0

Definition at line 76 of file xtensa.h.

◆ XT_MEM_ACCESS_READ

#define XT_MEM_ACCESS_READ   0x1

Definition at line 77 of file xtensa.h.

◆ XT_MEM_ACCESS_WRITE

#define XT_MEM_ACCESS_WRITE   0x2

Definition at line 78 of file xtensa.h.

◆ XT_MESRCLR_IMPR_EXC_MSK

#define XT_MESRCLR_IMPR_EXC_MSK   (0x00000090)

Definition at line 69 of file xtensa.h.

◆ XT_MS_DE_MSK

#define XT_MS_DE_MSK   BIT(5)

Definition at line 50 of file xtensa.h.

◆ XT_MS_DISPST_DBG

#define XT_MS_DISPST_DBG   (0x10)

Definition at line 52 of file xtensa.h.

◆ XT_MS_DISPST_MSK

#define XT_MS_DISPST_MSK   (0x1f)

Definition at line 51 of file xtensa.h.

◆ XT_PS_CALLINC_MSK

#define XT_PS_CALLINC_MSK   (0x3 << 16)

Definition at line 42 of file xtensa.h.

◆ XT_PS_DIEXC_MSK

#define XT_PS_DIEXC_MSK   BIT(2)

Definition at line 47 of file xtensa.h.

◆ XT_PS_OWB_MSK

#define XT_PS_OWB_MSK   (0xF << 8)

Definition at line 43 of file xtensa.h.

◆ XT_PS_RING

#define XT_PS_RING (   _v_)    ((uint32_t)((_v_) & 0x3) << 6)

Definition at line 39 of file xtensa.h.

◆ XT_PS_RING_GET

#define XT_PS_RING_GET (   _v_)    (((_v_) >> 6) & 0x3)

Definition at line 41 of file xtensa.h.

◆ XT_PS_RING_MSK

#define XT_PS_RING_MSK   (0x3 << 6)

Definition at line 40 of file xtensa.h.

◆ XT_PS_WOE_MSK

#define XT_PS_WOE_MSK   BIT(18)

Definition at line 44 of file xtensa.h.

◆ XT_QUERYPKT_RESP_MAX

#define XT_QUERYPKT_RESP_MAX   (XT_MAX_TIE_REG_WIDTH * 2 + 1)

Definition at line 81 of file xtensa.h.

◆ XT_USER_REGS_NUM_MAX

#define XT_USER_REGS_NUM_MAX   256

Definition at line 74 of file xtensa.h.

◆ XT_WB_C_MSK

#define XT_WB_C_MSK   (0x7U << XT_WB_C_SHIFT)

Definition at line 58 of file xtensa.h.

◆ XT_WB_C_SHIFT

#define XT_WB_C_SHIFT   (4)

Definition at line 57 of file xtensa.h.

◆ XT_WB_N_MSK

#define XT_WB_N_MSK   (0x7U << XT_WB_N_SHIFT)

Definition at line 60 of file xtensa.h.

◆ XT_WB_N_SHIFT

#define XT_WB_N_SHIFT   (8)

Definition at line 59 of file xtensa.h.

◆ XT_WB_P_MSK

#define XT_WB_P_MSK   (0x7U << XT_WB_P_SHIFT)

Definition at line 56 of file xtensa.h.

◆ XT_WB_P_SHIFT

#define XT_WB_P_SHIFT   (0)

Definition at line 55 of file xtensa.h.

◆ XT_WB_S_MSK

#define XT_WB_S_MSK   (0x3U << XT_WB_S_SHIFT)

Definition at line 62 of file xtensa.h.

◆ XT_WB_S_SHIFT

#define XT_WB_S_SHIFT   (30)

Definition at line 61 of file xtensa.h.

◆ XTENSA_COMMON_MAGIC

#define XTENSA_COMMON_MAGIC   0x54E4E555U

Definition at line 236 of file xtensa.h.

Typedef Documentation

◆ xtensa_insn_t

typedef uint32_t xtensa_insn_t

Definition at line 190 of file xtensa.h.

Enumeration Type Documentation

◆ xtensa_ar_scratch_set_e

Enumerator
XT_AR_SCRATCH_A3 
XT_AR_SCRATCH_AR3 
XT_AR_SCRATCH_A4 
XT_AR_SCRATCH_AR4 
XT_AR_SCRATCH_NUM 

Definition at line 92 of file xtensa.h.

◆ xtensa_mode

Enumerator
XT_MODE_RING0 
XT_MODE_RING1 
XT_MODE_RING2 
XT_MODE_RING3 
XT_MODE_ANY 

Definition at line 209 of file xtensa.h.

◆ xtensa_nx_reg_idx

Enumerator
XT_NX_REG_IDX_IBREAKC0 
XT_NX_REG_IDX_WB 
XT_NX_REG_IDX_MS 
XT_NX_REG_IDX_IEVEC 
XT_NX_REG_IDX_IEEXTERN 
XT_NX_REG_IDX_MESR 
XT_NX_REG_IDX_MESRCLR 
XT_NX_REG_IDX_NUM 

Definition at line 197 of file xtensa.h.

◆ xtensa_qerr_e

Enumerator
XT_QERR_INTERNAL 
XT_QERR_FAIL 
XT_QERR_INVAL 
XT_QERR_MEM 
XT_QERR_NUM 

Definition at line 83 of file xtensa.h.

◆ xtensa_stepping_isr_mode

Enumerator
XT_STEPPING_ISR_OFF 
XT_STEPPING_ISR_ON 

Definition at line 192 of file xtensa.h.

◆ xtensa_type

Enumerator
XT_UNDEF 
XT_LX 
XT_NX 

Definition at line 105 of file xtensa.h.

Function Documentation

◆ COMMAND_HELPER() [1/15]

COMMAND_HELPER ( xtensa_cmd_mask_interrupts_do  ,
struct xtensa xtensa 
)

◆ COMMAND_HELPER() [2/15]

◆ COMMAND_HELPER() [3/15]

◆ COMMAND_HELPER() [4/15]

COMMAND_HELPER ( xtensa_cmd_permissive_mode_do  ,
struct xtensa xtensa 
)

Definition at line 4065 of file xtensa.c.

References CALL_COMMAND_HANDLER, and xtensa::permissive_mode.

◆ COMMAND_HELPER() [5/15]

COMMAND_HELPER ( xtensa_cmd_smpbreak_do  ,
struct target target 
)

◆ COMMAND_HELPER() [6/15]

◆ COMMAND_HELPER() [7/15]

◆ COMMAND_HELPER() [8/15]

COMMAND_HELPER ( xtensa_cmd_tracestop_do  ,
struct xtensa xtensa 
)

◆ COMMAND_HELPER() [9/15]

COMMAND_HELPER ( xtensa_cmd_xtdef_do  ,
struct xtensa xtensa 
)

◆ COMMAND_HELPER() [10/15]

◆ COMMAND_HELPER() [11/15]

◆ COMMAND_HELPER() [12/15]

◆ COMMAND_HELPER() [13/15]

◆ COMMAND_HELPER() [14/15]

◆ COMMAND_HELPER() [15/15]

COMMAND_HELPER ( xtensa_cmd_xtregfmt_do  ,
struct xtensa xtensa 
)

◆ target_to_xtensa()

static struct xtensa* target_to_xtensa ( struct target target)
inlinestatic

Definition at line 290 of file xtensa.h.

References target::arch_info, xtensa::common_magic, and XTENSA_COMMON_MAGIC.

Referenced by COMMAND_HANDLER(), COMMAND_HELPER(), esp32_soc_reset(), esp32s2_deassert_reset(), esp32s2_soc_reset(), esp32s3_soc_reset(), esp_xtensa_apptrace_block_max_size_get(), esp_xtensa_apptrace_buffs_write(), esp_xtensa_apptrace_ctrl_reg_read(), esp_xtensa_apptrace_ctrl_reg_write(), esp_xtensa_apptrace_data_read(), esp_xtensa_apptrace_queue_normal_write(), esp_xtensa_apptrace_queue_reverse_write(), esp_xtensa_apptrace_status_reg_read(), esp_xtensa_apptrace_status_reg_write(), esp_xtensa_poll(), esp_xtensa_profiling(), esp_xtensa_stub_tramp_get(), esp_xtensa_swdbg_activate(), xtensa_assert_reset(), xtensa_breakpoint_add(), xtensa_breakpoint_remove(), xtensa_build_reg_cache(), xtensa_cause_clear(), xtensa_cause_get(), xtensa_cause_reset(), xtensa_chip_examine(), xtensa_chip_target_deinit(), xtensa_core_status_check(), xtensa_core_status_clear(), xtensa_data_addr_valid(), xtensa_deassert_reset(), xtensa_do_resume(), xtensa_do_step(), xtensa_examine(), xtensa_fetch_all_regs(), xtensa_fileio_detect_proc(), xtensa_free_reg_cache(), xtensa_gdb_fileio_end(), xtensa_gdb_query_custom(), xtensa_gdbqc_parse_exec_tie_ops(), xtensa_gdbqc_qxtreg(), xtensa_get_gdb_fileio_info(), xtensa_get_gdb_reg_list(), xtensa_halt(), xtensa_imprecise_exception_clear(), xtensa_imprecise_exception_occurred(), xtensa_is_stopped(), xtensa_mmu_is_enabled(), xtensa_pc_in_winexc(), xtensa_poll(), xtensa_prepare_resume(), xtensa_read_memory(), xtensa_reg_get(), xtensa_reg_set(), xtensa_reg_set_deep_relgen(), xtensa_region_ar_exec(), xtensa_set_permissive_mode(), xtensa_smpbreak_get(), xtensa_smpbreak_set(), xtensa_start_algorithm(), xtensa_sw_breakpoint_add(), xtensa_target_deinit(), xtensa_target_init(), xtensa_update_instruction(), xtensa_wait_algorithm(), xtensa_wakeup(), xtensa_watchpoint_add(), xtensa_watchpoint_remove(), xtensa_window_state_restore(), xtensa_window_state_save(), xtensa_write_dirty_registers(), and xtensa_write_memory().

◆ xtensa_addr_in_mem()

static bool xtensa_addr_in_mem ( const struct xtensa_local_mem_config mem,
uint32_t  addr 
)
inlinestatic

◆ xtensa_assert_reset()

◆ xtensa_breakpoint_add()

◆ xtensa_breakpoint_remove()

◆ xtensa_cause_clear()

◆ xtensa_cause_get()

◆ xtensa_cause_reset()

void xtensa_cause_reset ( struct target target)

Definition at line 1154 of file xtensa.c.

References xtensa::nx_stop_cause, and target_to_xtensa().

Referenced by xtensa_do_resume().

◆ xtensa_checksum_memory()

int xtensa_checksum_memory ( struct target target,
target_addr_t  address,
uint32_t  count,
uint32_t *  checksum 
)

Definition at line 2298 of file xtensa.c.

References ERROR_FAIL, and LOG_WARNING.

◆ xtensa_core_status_check()

◆ xtensa_core_status_clear()

static int xtensa_core_status_clear ( struct target target,
uint32_t  bits 
)
inlinestatic

Definition at line 351 of file xtensa.h.

References bits, xtensa::dbg_mod, target_to_xtensa(), and xtensa_dm_core_status_clear().

◆ xtensa_data_addr_valid()

static bool xtensa_data_addr_valid ( struct target target,
uint32_t  addr 
)
inlinestatic

◆ xtensa_deassert_reset()

◆ xtensa_do_resume()

◆ xtensa_do_step()

◆ xtensa_examine()

◆ xtensa_fetch_all_regs()

int xtensa_fetch_all_regs ( struct target target)

Definition at line 1210 of file xtensa.c.

References a0, a3, xtensa_reg_val_u::buf, buf_cpy(), buf_get_u32(), xtensa_keyval_info::chrval, xtensa_config::coproc, xtensa::core_cache, xtensa::core_config, xtensa_config::core_type, xtensa::dbg_mod, xtensa_config::debug, reg::dirty, ERROR_FAIL, ERROR_OK, xtensa_reg_desc::exist, xtensa_reg_desc::flags, xtensa_keyval_info::intval, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_ERROR, LOG_INFO, LOG_LEVEL_IS, LOG_LVL_DEBUG, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, name, reg_cache::num_regs, xtensa::nx_reg_idx, OCDDSR_EXECEXCEPTION, xtensa::optregs, reg_cache::reg_list, xtensa_reg_desc::reg_num, xtensa::regs_fetched, xtensa::scratch_ars, size, target_to_xtensa(), type, xtensa_reg_desc::type, reg::valid, xtensa_config::windowed, XDMREG_DDR, XDMREG_DSR, XT_AR_SCRATCH_AR3, XT_AR_SCRATCH_AR4, XT_AR_SCRATCH_NUM, XT_AREGS_NUM_MAX, XT_EPC_REG_NUM_BASE, XT_EPS_REG_NUM_BASE, XT_INS_CALL0, XT_INS_RFR, XT_INS_ROTW, XT_INS_RSR, XT_INS_RUR, XT_INS_WSR, XT_LX, XT_MS_DISPST_DBG, XT_NUM_REGS, XT_NX, XT_NX_REG_IDX_MS, XT_NX_REG_IDX_WB, XT_PC_REG_NUM_VIRTUAL, XT_REG_A0, XT_REG_A3, XT_REG_DEBUG, XT_REG_FR, XT_REG_GENERAL, XT_REG_IDX_A0, XT_REG_IDX_A3, XT_REG_IDX_A4, XT_REG_IDX_AR0, XT_REG_IDX_CPENABLE, XT_REG_IDX_PS, XT_REG_IDX_WINDOWBASE, XT_REG_OTHER, XT_REG_RELGEN, XT_REG_SPECIAL, XT_REG_TIE, XT_REG_USER, XT_REGF_MASK, XT_REGF_NOREAD, XT_SR_DDR, XT_WB_P_MSK, XT_WB_P_SHIFT, xtensa_canonical_to_windowbase_offset(), xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_extra_debug_log, xtensa_mark_register_dirty(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_reg_is_readable(), xtensa_reg_set(), xtensa_regs, xtensa_window_state_restore(), xtensa_window_state_save(), and xtensa_windowbase_offset_to_canonical().

Referenced by COMMAND_HELPER(), xtensa_do_step(), and xtensa_poll().

◆ xtensa_gdb_query_custom()

◆ xtensa_get_gdb_arch()

const char* xtensa_get_gdb_arch ( const struct target target)

Definition at line 3518 of file xtensa.c.

◆ xtensa_get_gdb_reg_list()

◆ xtensa_halt()

◆ xtensa_init_arch_info()

◆ xtensa_mmu_is_enabled()

int xtensa_mmu_is_enabled ( struct target target,
int *  enabled 
)

◆ xtensa_on_poll()

void xtensa_on_poll ( struct target target)

◆ xtensa_poll()

int xtensa_poll ( struct target target)

Definition at line 2304 of file xtensa.c.

References xtensa::come_online_probes_num, xtensa::core_config, xtensa_debug_module::core_status, xtensa_config::core_type, xtensa::dbg_mod, DBG_REASON_BREAKPOINT, DBG_REASON_DBGRQ, DBG_REASON_NOTHALTED, DBG_REASON_SINGLESTEP, DBG_REASON_WATCHPOINT, DBG_REASON_WPTANDBKPT, target::debug_reason, DEBUGCAUSE_BI, DEBUGCAUSE_BN, DEBUGCAUSE_DB, DEBUGCAUSE_IB, DEBUGCAUSE_IC, xtensa_core_status::dsr, ERROR_OK, ERROR_TARGET_NOT_EXAMINED, target::examined, LOG_INFO, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_INFO, OCDDSR_DEBUGINTBREAK, OCDDSR_DEBUGINTHOST, OCDDSR_DEBUGINTTRAX, OCDDSR_DEBUGPENDBREAK, OCDDSR_DEBUGPENDHOST, OCDDSR_DEBUGPENDTRAX, OCDDSR_STOPPED, xtensa_debug_module::power_status, PWRSTAT_COREWASRESET, PWRSTAT_DEBUGWASRESET, xtensa::smp_break, xtensa_power_status::stat, target::state, xtensa_power_status::stath, TARGET_DEBUG_RUNNING, TARGET_HALTED, TARGET_RESET, TARGET_RUNNING, target_to_xtensa(), TARGET_UNKNOWN, xtensa::trace_active, TRAXSTAT_CTITG, TRAXSTAT_PCMTG, TRAXSTAT_PTITG, TRAXSTAT_TRACT, XDMREG_DDR, XT_INS_RSR, XT_INS_WSR, XT_NX, XT_PS_DIEXC_MSK, XT_REG_A3, XT_REG_IDX_EXCCAUSE, XT_REG_IDX_PC, XT_REG_IDX_PS, XT_SR_DDR, XT_SR_PS, xtensa_cause_get(), xtensa_core_status_check(), xtensa_dm_core_status_clear(), xtensa_dm_core_status_read(), xtensa_dm_core_was_reset(), xtensa_dm_is_powered(), xtensa_dm_poll(), xtensa_dm_power_status_cache(), xtensa_dm_power_status_read(), xtensa_dm_queue_execute(), xtensa_dm_tap_was_reset(), xtensa_dm_trace_status_read(), xtensa_fetch_all_regs(), xtensa_is_stopped(), xtensa_mark_register_dirty(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_reg_get(), xtensa_smpbreak_write(), and xtensa_wakeup().

Referenced by esp32_soc_reset(), esp32s2_soc_reset(), esp32s3_soc_reset(), esp_xtensa_poll(), and xtensa_chip_poll().

◆ xtensa_prepare_resume()

◆ xtensa_queue_dbg_reg_read()

◆ xtensa_queue_dbg_reg_write()

◆ xtensa_read_buffer()

int xtensa_read_buffer ( struct target target,
target_addr_t  address,
uint32_t  count,
uint8_t *  buffer 
)

Definition at line 2081 of file xtensa.c.

References buffer, count, and xtensa_read_memory().

Referenced by xtensa_pc_in_winexc().

◆ xtensa_read_memory()

◆ xtensa_reg_get()

◆ xtensa_reg_set()

◆ xtensa_reg_set_deep_relgen()

◆ xtensa_resume()

int xtensa_resume ( struct target target,
int  current,
target_addr_t  address,
int  handle_breakpoints,
int  debug_execution 
)

◆ xtensa_run_algorithm()

int xtensa_run_algorithm ( struct target target,
int  num_mem_params,
struct mem_param mem_params,
int  num_reg_params,
struct reg_param reg_params,
target_addr_t  entry_point,
target_addr_t  exit_point,
unsigned int  timeout_ms,
void *  arch_info 
)

Definition at line 2911 of file xtensa.c.

References reg::arch_info, ERROR_OK, xtensa_start_algorithm(), and xtensa_wait_algorithm().

◆ xtensa_set_permissive_mode()

void xtensa_set_permissive_mode ( struct target target,
bool  state 
)

Definition at line 3414 of file xtensa.c.

References xtensa::permissive_mode, state, and target_to_xtensa().

◆ xtensa_smpbreak_get()

int xtensa_smpbreak_get ( struct target target,
uint32_t *  val 
)

Definition at line 968 of file xtensa.c.

References ERROR_OK, xtensa::smp_break, and target_to_xtensa().

Referenced by esp_xtensa_smp_resume(), and esp_xtensa_smp_smpbreak_disable().

◆ xtensa_smpbreak_read()

int xtensa_smpbreak_read ( struct xtensa xtensa,
uint32_t *  val 
)

◆ xtensa_smpbreak_set()

int xtensa_smpbreak_set ( struct target target,
uint32_t  set 
)

◆ xtensa_smpbreak_write()

◆ xtensa_soft_reset_halt()

int xtensa_soft_reset_halt ( struct target target)

Definition at line 1204 of file xtensa.c.

References LOG_TARGET_DEBUG, and xtensa_assert_reset().

Referenced by esp32s2_soft_reset_halt().

◆ xtensa_start_algorithm()

◆ xtensa_step()

int xtensa_step ( struct target target,
int  current,
target_addr_t  address,
int  handle_breakpoints 
)

◆ xtensa_target_deinit()

◆ xtensa_target_init()

◆ xtensa_wait_algorithm()

◆ xtensa_wakeup()

◆ xtensa_watchpoint_add()

◆ xtensa_watchpoint_remove()

◆ xtensa_write_buffer()

int xtensa_write_buffer ( struct target target,
target_addr_t  address,
uint32_t  count,
const uint8_t *  buffer 
)

Definition at line 2292 of file xtensa.c.

References buffer, count, and xtensa_write_memory().

◆ xtensa_write_memory()

Variable Documentation

◆ xtensa_command_handlers

const struct command_registration xtensa_command_handlers[]
extern

Definition at line 4472 of file xtensa.c.