xtensa.c File Reference

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Data Structures
union	xtensa_reg_val_u

Macros
#define	_XT_INS_FORMAT_RRI4(X, OPCODE, IMM4, R, S, T)
#define	_XT_INS_FORMAT_RRI8(X, OPCODE, R, S, T, IMM8)
#define	_XT_INS_FORMAT_RRR(X, OPCODE, ST, R)
#define	_XT_INS_FORMAT_RRRN(X, OPCODE, S, T, IMM4)
#define	_XT_INS_FORMAT_RSR(X, OPCODE, SR, T)
#define	XT_EPC_REG_NUM_BASE   (0xb0U) /* (EPC1 - 1), for adding DBGLEVEL */
#define	XT_EPS_REG_NUM_BASE   (0xc0U) /* (EPS2 - 2), for adding DBGLEVEL */
#define	XT_HW_DBREAK_MAX_NUM   2
#define	XT_HW_IBREAK_MAX_NUM   2
#define	XT_INS_CALL0(X, IMM18)   (XT_ISBE(X) ? (0x500000 | ((IMM18) & 0x3ffff)) : (0x000005 | (((IMM18) & 0x3ffff) << 6)))
#define	XT_INS_DHWB(X, S, IMM8)   _XT_INS_FORMAT_RRI8(X, 0x007042, 0, S, 0, IMM8)
#define	XT_INS_DHWBI(X, S, IMM8)   _XT_INS_FORMAT_RRI8(X, 0x007052, 0, S, 0, IMM8)
#define	XT_INS_IHI(X, S, IMM8)   _XT_INS_FORMAT_RRI8(X, 0x0070E2, 0, S, 0, IMM8)
#define	XT_INS_ISYNC(X)   (XT_ISBE(X) ? 0x000200 << 8 : 0x002000)
#define	XT_INS_JX(X, S)   (XT_ISBE(X) ? (0x050000 | ((S) << 12)) : (0x0000a0 | ((S) << 8)))
#define	XT_INS_L16UI(X, S, T, IMM8)   _XT_INS_FORMAT_RRI8(X, 0x001002, 0, S, T, IMM8)
#define	XT_INS_L32E(X, R, S, T)   _XT_INS_FORMAT_RRI4(X, 0x090000, 0, R, S, T)
#define	XT_INS_L32E_S32E_MASK(X)   (XT_ISBE(X) ? 0xF000FF << 8 : 0xFF000F)
#define	XT_INS_L32I(X, S, T, IMM8)   _XT_INS_FORMAT_RRI8(X, 0x002002, 0, S, T, IMM8)
#define	XT_INS_L8UI(X, S, T, IMM8)   _XT_INS_FORMAT_RRI8(X, 0x000002, 0, S, T, IMM8)
#define	XT_INS_LDDR32P(X, S)   (XT_ISBE(X) ? (0x0E0700 | ((S) << 12)) << 8 : (0x0070E0 | ((S) << 8)))
#define	XT_INS_PPTLB(X, S, T)   _XT_INS_FORMAT_RRR(X, 0x500000, ((S) << 4) | (T), 0xD)
#define	XT_INS_RFDD(X)   (XT_ISBE(X) ? 0x010e1f << 8 : 0xf1e010)
#define	XT_INS_RFDO(X)   (XT_ISBE(X) ? 0x000e1f << 8 : 0xf1e000)
#define	XT_INS_RFR(X, FR, T)   _XT_INS_FORMAT_RRR(X, 0xFA0000, ((FR << 4) | 0x4), T)
#define	XT_INS_RFWO(X)   (XT_ISBE(X) ? 0x004300 << 8 : 0x003400)
#define	XT_INS_RFWO_RFWU_MASK(X)   (XT_ISBE(X) ? 0xFFFFFF << 8 : 0xFFFFFF)
#define	XT_INS_RFWU(X)   (XT_ISBE(X) ? 0x005300 << 8 : 0x003500)
#define	XT_INS_ROTW(X, N)   (XT_ISBE(X) ? ((0x000804) | (((N) & 15) << 16)) << 8 : ((0x408000) | (((N) & 15) << 4)))
#define	XT_INS_RSR(X, SR, T)   _XT_INS_FORMAT_RSR(X, 0x030000, SR, T)
#define	XT_INS_RUR(X, UR, T)   _XT_INS_FORMAT_RRR(X, 0xE30000, UR, T)
#define	XT_INS_S16I(X, S, T, IMM8)   _XT_INS_FORMAT_RRI8(X, 0x005002, 0, S, T, IMM8)
#define	XT_INS_S32E(X, R, S, T)   _XT_INS_FORMAT_RRI4(X, 0x490000, 0, R, S, T)
#define	XT_INS_S32I(X, S, T, IMM8)   _XT_INS_FORMAT_RRI8(X, 0x006002, 0, S, T, IMM8)
#define	XT_INS_S8I(X, S, T, IMM8)   _XT_INS_FORMAT_RRI8(X, 0x004002, 0, S, T, IMM8)
#define	XT_INS_SDDR32P(X, S)   (XT_ISBE(X) ? (0x0F0700 | ((S) << 12)) << 8 : (0x0070F0 | ((S) << 8)))
#define	XT_INS_WFR(X, FR, T)   _XT_INS_FORMAT_RRR(X, 0xFA0000, ((T << 4) | 0x5), FR)
#define	XT_INS_WSR(X, SR, T)   _XT_INS_FORMAT_RSR(X, 0x130000, SR, T)
#define	XT_INS_WUR(X, UR, T)   _XT_INS_FORMAT_RSR(X, 0xF30000, UR, T)
#define	XT_INS_XSR(X, SR, T)   _XT_INS_FORMAT_RSR(X, 0x610000, SR, T)
#define	XT_NIBSWAP16(V)
#define	XT_NIBSWAP24(V)
#define	XT_NIBSWAP8(V)
#define	XT_NX_IBREAKC_BASE   (0xc0U) /* (IBREAKC0..IBREAKC1) for NX */
#define	XT_PC_DBREG_NUM_BASE   (0x20U) /* External (i.e., GDB) access */
#define	XT_PC_REG_NUM_VIRTUAL   (0xffU) /* Marker for computing PC (EPC[DBGLEVEL) */
#define	XT_PS_REG_NUM   (0xe6U)
#define	XT_REG_A0   (xtensa_regs[XT_REG_IDX_AR0].reg_num)
#define	XT_REG_A3   (xtensa_regs[XT_REG_IDX_AR3].reg_num)
#define	XT_REG_A4   (xtensa_regs[XT_REG_IDX_AR4].reg_num)
#define	XT_SR_DDR   (xtensa_regs[XT_REG_IDX_DDR].reg_num)
#define	XT_SR_PS   (xtensa_regs[XT_REG_IDX_PS].reg_num)
#define	XT_SR_WB   (xtensa_regs[XT_REG_IDX_WINDOWBASE].reg_num)
#define	XT_SW_BREAKPOINTS_MAX_NUM   32
#define	XT_TLB1_ACC_MSK   0xF
#define	XT_TLB1_ACC_SHIFT   8
#define	XT_WATCHPOINTS_NUM_MAX   2

Enumerations
enum	xtensa_mem_region_type {   XTENSA_MEM_REG_IROM = 0x0 , XTENSA_MEM_REG_IRAM , XTENSA_MEM_REG_DROM , XTENSA_MEM_REG_DRAM ,   XTENSA_MEM_REG_SRAM , XTENSA_MEM_REG_SROM , XTENSA_MEM_REGS_NUM }
	Types of memory used at xtensa target. More...
enum	xtensa_mpu_access_type {   XTENSA_ACC_00X_000 = 0x2 , XTENSA_ACC_000_00X , XTENSA_ACC_R00_000 , XTENSA_ACC_R0X_000 ,   XTENSA_ACC_RW0_000 , XTENSA_ACC_RWX_000 , XTENSA_ACC_0W0_0W0 , XTENSA_ACC_RW0_RWX ,   XTENSA_ACC_RW0_R00 , XTENSA_ACC_RWX_R0X , XTENSA_ACC_R00_R00 , XTENSA_ACC_R0X_R0X ,   XTENSA_ACC_RW0_RW0 , XTENSA_ACC_RWX_RWX }
	Types of access rights for MPU option The first block is kernel RWX ARs; the second block is user rwx ARs. More...

Functions
	COMMAND_HANDLER (xtensa_cmd_dm_rw)
	COMMAND_HANDLER (xtensa_cmd_exe)
	COMMAND_HANDLER (xtensa_cmd_mask_interrupts)
	COMMAND_HANDLER (xtensa_cmd_perfmon_dump)
	COMMAND_HANDLER (xtensa_cmd_perfmon_enable)
	COMMAND_HANDLER (xtensa_cmd_permissive_mode)
	COMMAND_HANDLER (xtensa_cmd_smpbreak)
	COMMAND_HANDLER (xtensa_cmd_tracedump)
	COMMAND_HANDLER (xtensa_cmd_tracestart)
	COMMAND_HANDLER (xtensa_cmd_tracestop)
	COMMAND_HANDLER (xtensa_cmd_xtdef)
	COMMAND_HANDLER (xtensa_cmd_xtmem)
	COMMAND_HANDLER (xtensa_cmd_xtmmu)
	COMMAND_HANDLER (xtensa_cmd_xtmpu)
	COMMAND_HANDLER (xtensa_cmd_xtopt)
	COMMAND_HANDLER (xtensa_cmd_xtreg)
	COMMAND_HANDLER (xtensa_cmd_xtregfmt)
	COMMAND_HELPER (xtensa_cmd_dm_rw_do, struct xtensa *xtensa)
static	COMMAND_HELPER (xtensa_cmd_exe_do, struct target *target)
	COMMAND_HELPER (xtensa_cmd_mask_interrupts_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_perfmon_dump_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_perfmon_enable_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_permissive_mode_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_smpbreak_do, struct target *target)
	COMMAND_HELPER (xtensa_cmd_tracedump_do, struct xtensa *xtensa, const char *fname)
	COMMAND_HELPER (xtensa_cmd_tracestart_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_tracestop_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_xtdef_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_xtmem_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_xtmmu_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_xtmpu_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_xtopt_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_xtreg_do, struct xtensa *xtensa)
	COMMAND_HELPER (xtensa_cmd_xtregfmt_do, struct xtensa *xtensa)
int	xtensa_assert_reset (struct target *target)
int	xtensa_breakpoint_add (struct target *target, struct breakpoint *breakpoint)
int	xtensa_breakpoint_remove (struct target *target, struct breakpoint *breakpoint)
static int	xtensa_build_reg_cache (struct target *target)
static enum xtensa_reg_id	xtensa_canonical_to_windowbase_offset (struct xtensa *xtensa, enum xtensa_reg_id reg_idx, int windowbase)
void	xtensa_cause_clear (struct target *target)
uint32_t	xtensa_cause_get (struct target *target)
void	xtensa_cause_reset (struct target *target)
int	xtensa_checksum_memory (struct target *target, target_addr_t address, uint32_t count, uint32_t *checksum)
static bool	xtensa_cmd_xtopt_legal_val (char *opt, int val, int min, int max)
static int	xtensa_core_reg_get (struct reg *reg)
static int	xtensa_core_reg_set (struct reg *reg, uint8_t *buf)
int	xtensa_core_status_check (struct target *target)
int	xtensa_deassert_reset (struct target *target)
int	xtensa_do_resume (struct target *target)
int	xtensa_do_step (struct target *target, int current, target_addr_t address, int handle_breakpoints)
int	xtensa_examine (struct target *target)
int	xtensa_fetch_all_regs (struct target *target)
static void	xtensa_free_reg_cache (struct target *target)
int	xtensa_gdb_query_custom (struct target *target, const char *packet, char **response_p)
static int32_t	xtensa_gdbqc_parse_exec_tie_ops (struct target *target, char *opstr)
static int	xtensa_gdbqc_qxtreg (struct target *target, const char *packet, char **response_p)
const char *	xtensa_get_gdb_arch (const struct target *target)
int	xtensa_get_gdb_reg_list (struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class)
static const struct xtensa_local_mem_config *	xtensa_get_mem_config (struct xtensa *xtensa, enum xtensa_mem_region_type type)
	Gets a config for the specific mem type. More...
static target_addr_t	xtensa_get_overlap_size (target_addr_t r1_start, target_addr_t r1_end, target_addr_t r2_start, target_addr_t r2_end)
	Returns a size of overlapped region of two ranges. More...
int	xtensa_halt (struct target *target)
static void	xtensa_imprecise_exception_clear (struct target *target)
static int	xtensa_imprecise_exception_occurred (struct target *target)
int	xtensa_init_arch_info (struct target *target, struct xtensa *xtensa, const struct xtensa_debug_module_config *dm_cfg)
static bool	xtensa_is_cacheable (const struct xtensa_cache_config *cache, const struct xtensa_local_mem_config *mem, target_addr_t address)
static bool	xtensa_is_dcacheable (struct xtensa *xtensa, target_addr_t address)
static bool	xtensa_is_icacheable (struct xtensa *xtensa, target_addr_t address)
static bool	xtensa_is_stopped (struct target *target)
static void	xtensa_mark_register_dirty (struct xtensa *xtensa, enum xtensa_reg_id reg_idx)
static bool	xtensa_memory_op_validate_range (struct xtensa *xtensa, target_addr_t address, size_t size, int access)
	Check if the address gets to memory regions, and its access mode. More...
static const struct xtensa_local_mem_region_config *	xtensa_memory_region_find (const struct xtensa_local_mem_config *mem, target_addr_t address)
	Extracts an exact xtensa_local_mem_region_config from xtensa_local_mem_config for a given address Returns NULL if nothing found. More...
static bool	xtensa_memory_regions_overlap (target_addr_t r1_start, target_addr_t r1_end, target_addr_t r2_start, target_addr_t r2_end)
	Returns true if two ranges are overlapping. More...
int	xtensa_mmu_is_enabled (struct target *target, int *enabled)
static bool	xtensa_pc_in_winexc (struct target *target, target_addr_t pc)
int	xtensa_poll (struct target *target)
int	xtensa_prepare_resume (struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution)
static void	xtensa_queue_exec_ins (struct xtensa *xtensa, uint32_t ins)
static void	xtensa_queue_exec_ins_wide (struct xtensa *xtensa, uint8_t *ops, uint8_t oplen)
static int	xtensa_queue_pwr_reg_write (struct xtensa *xtensa, unsigned int reg, uint32_t data)
int	xtensa_read_buffer (struct target *target, target_addr_t address, uint32_t count, uint8_t *buffer)
int	xtensa_read_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
xtensa_reg_val_t	xtensa_reg_get (struct target *target, enum xtensa_reg_id reg_id)
static xtensa_reg_val_t	xtensa_reg_get_value (struct reg *reg)
static bool	xtensa_reg_is_readable (int flags, int cpenable)
void	xtensa_reg_set (struct target *target, enum xtensa_reg_id reg_id, xtensa_reg_val_t value)
void	xtensa_reg_set_deep_relgen (struct target *target, enum xtensa_reg_id a_idx, xtensa_reg_val_t value)
static void	xtensa_reg_set_value (struct reg *reg, xtensa_reg_val_t value)
static bool	xtensa_region_ar_exec (struct target *target, target_addr_t start, target_addr_t end)
int	xtensa_resume (struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution)
int	xtensa_run_algorithm (struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t entry_point, target_addr_t exit_point, unsigned int timeout_ms, void *arch_info)
static bool	xtensa_scratch_regs_fixup (struct xtensa *xtensa, struct reg *reg_list, int i, int j, int a_idx, int ar_idx)
void	xtensa_set_permissive_mode (struct target *target, bool state)
int	xtensa_smpbreak_get (struct target *target, uint32_t *val)
int	xtensa_smpbreak_read (struct xtensa *xtensa, uint32_t *val)
int	xtensa_smpbreak_set (struct target *target, uint32_t set)
int	xtensa_smpbreak_write (struct xtensa *xtensa, uint32_t set)
int	xtensa_soft_reset_halt (struct target *target)
int	xtensa_start_algorithm (struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t entry_point, target_addr_t exit_point, void *arch_info)
int	xtensa_step (struct target *target, int current, target_addr_t address, int handle_breakpoints)
static int	xtensa_sw_breakpoint_add (struct target *target, struct breakpoint *breakpoint, struct xtensa_sw_breakpoint *sw_bp)
static int	xtensa_sw_breakpoint_remove (struct target *target, struct xtensa_sw_breakpoint *sw_bp)
void	xtensa_target_deinit (struct target *target)
int	xtensa_target_init (struct command_context *cmd_ctx, struct target *target)
static const struct xtensa_local_mem_region_config *	xtensa_target_memory_region_find (struct xtensa *xtensa, target_addr_t address)
	Returns a corresponding xtensa_local_mem_region_config from the xtensa target for a given address Returns NULL if nothing found. More...
static int	xtensa_update_instruction (struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
int	xtensa_wait_algorithm (struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t exit_point, unsigned int timeout_ms, void *arch_info)
	Waits for an algorithm in the target. More...
int	xtensa_wakeup (struct target *target)
int	xtensa_watchpoint_add (struct target *target, struct watchpoint *watchpoint)
int	xtensa_watchpoint_remove (struct target *target, struct watchpoint *watchpoint)
static void	xtensa_window_state_restore (struct target *target, uint32_t woe)
static int	xtensa_window_state_save (struct target *target, uint32_t *woe)
static enum xtensa_reg_id	xtensa_windowbase_offset_to_canonical (struct xtensa *xtensa, enum xtensa_reg_id reg_idx, int windowbase)
int	xtensa_write_buffer (struct target *target, target_addr_t address, uint32_t count, const uint8_t *buffer)
static int	xtensa_write_dirty_registers (struct target *target)
int	xtensa_write_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)

Variables
static const struct xtensa_keyval_info	xt_qerr [XT_QERR_NUM]
static const struct command_registration	xtensa_any_command_handlers []
const struct command_registration	xtensa_command_handlers []
static const bool	xtensa_extra_debug_log
static const struct reg_arch_type	xtensa_reg_type
struct xtensa_reg_desc	xtensa_regs [XT_NUM_REGS]

Macro Definition Documentation

_XT_INS_FORMAT_RRI4

#define _XT_INS_FORMAT_RRI4	(		X,
			OPCODE,
			IMM4,
			R,
			S,
			T
	)

Value:

    (XT_ISBE(X) ? (XT_NIBSWAP24(OPCODE)                 \
            | (((T) & 0x0F) << 16)                      \
            | (((S) & 0x0F) << 12)                      \
            | (((R) & 0x0F) << 8)) << 8                 \
        | ((IMM4) & 0x0F)                               \
        : (OPCODE)                                      \
        | (((IMM4) & 0x0F) << 20)                       \
        | (((R) & 0x0F) << 12)                          \
        | (((S) & 0x0F) << 8)                           \
        | (((T) & 0x0F) << 4))

Definition at line 85 of file xtensa.c.

_XT_INS_FORMAT_RRI8

#define _XT_INS_FORMAT_RRI8	(		X,
			OPCODE,
			R,
			S,
			T,
			IMM8
	)

Value:

    (XT_ISBE(X) ? (XT_NIBSWAP24(OPCODE)                 \
            | (((T) & 0x0F) << 16)                      \
            | (((S) & 0x0F) << 12)                      \
            | (((R) & 0x0F) << 8)                       \
            | ((IMM8) & 0xFF)) << 8                     \
        : (OPCODE)                                      \
        | (((IMM8) & 0xFF) << 16)                       \
        | (((R) & 0x0F) << 12)                          \
        | (((S) & 0x0F) << 8)                           \
        | (((T) & 0x0F) << 4))

Definition at line 73 of file xtensa.c.

_XT_INS_FORMAT_RRR

#define _XT_INS_FORMAT_RRR	(		X,
			OPCODE,
			ST,
			R
	)

Value:

    (XT_ISBE(X) ? (XT_NIBSWAP24(OPCODE)                 \
            | ((XT_NIBSWAP8((ST) & 0xFF)) << 12)        \
            | (((R) & 0x0F) << 8)) << 8                 \
        : (OPCODE)                                      \
        | (((ST) & 0xFF) << 4)                          \
        | (((R) & 0x0F) << 12))

Definition at line 55 of file xtensa.c.

_XT_INS_FORMAT_RRRN

#define _XT_INS_FORMAT_RRRN	(		X,
			OPCODE,
			S,
			T,
			IMM4
	)

Value:

    (XT_ISBE(X) ? (XT_NIBSWAP16(OPCODE)                 \
            | (((T) & 0x0F) << 8)                       \
            | (((S) & 0x0F) << 4)                       \
            | ((IMM4) & 0x0F)) << 16                    \
        : (OPCODE)                                      \
        | (((T) & 0x0F) << 4)                           \
        | (((S) & 0x0F) << 8)                           \
        | (((IMM4) & 0x0F) << 12))

Definition at line 63 of file xtensa.c.

_XT_INS_FORMAT_RSR

#define _XT_INS_FORMAT_RSR	(		X,
			OPCODE,
			SR,
			T
	)

Value:

    (XT_ISBE(X) ? (XT_NIBSWAP24(OPCODE)                 \
            | (((T) & 0x0F) << 16)                      \
            | (((SR) & 0xFF) << 8)) << 8                \
        : (OPCODE)                                      \
        | (((SR) & 0xFF) << 8)                          \
        | (((T) & 0x0F) << 4))

Definition at line 47 of file xtensa.c.

XT_EPC_REG_NUM_BASE

#define XT_EPC_REG_NUM_BASE   (0xb0U) /* (EPC1 - 1), for adding DBGLEVEL */

Definition at line 181 of file xtensa.c.

XT_EPS_REG_NUM_BASE

#define XT_EPS_REG_NUM_BASE   (0xc0U) /* (EPS2 - 2), for adding DBGLEVEL */

Definition at line 180 of file xtensa.c.

XT_HW_DBREAK_MAX_NUM

#define XT_HW_DBREAK_MAX_NUM   2

Definition at line 188 of file xtensa.c.

XT_HW_IBREAK_MAX_NUM

#define XT_HW_IBREAK_MAX_NUM   2

Definition at line 187 of file xtensa.c.

XT_INS_CALL0

#define XT_INS_CALL0	(		X,
			IMM18
	)		(XT_ISBE(X) ? (0x500000 | ((IMM18) & 0x3ffff)) : (0x000005 | (((IMM18) & 0x3ffff) << 6)))

Definition at line 131 of file xtensa.c.

XT_INS_DHWB

#define XT_INS_DHWB	(		X,
			S,
			IMM8
	)		_XT_INS_FORMAT_RRI8(X, 0x007042, 0, S, 0, IMM8)

Definition at line 126 of file xtensa.c.

XT_INS_DHWBI

#define XT_INS_DHWBI	(		X,
			S,
			IMM8
	)		_XT_INS_FORMAT_RRI8(X, 0x007052, 0, S, 0, IMM8)

Definition at line 125 of file xtensa.c.

XT_INS_IHI

#define XT_INS_IHI	(		X,
			S,
			IMM8
	)		_XT_INS_FORMAT_RRI8(X, 0x0070E2, 0, S, 0, IMM8)

Definition at line 124 of file xtensa.c.

XT_INS_ISYNC

#define XT_INS_ISYNC

(

X

)

(XT_ISBE(X) ? 0x000200 << 8 : 0x002000)

Definition at line 127 of file xtensa.c.

XT_INS_JX

#define XT_INS_JX	(		X,
			S
	)		(XT_ISBE(X) ? (0x050000 | ((S) << 12)) : (0x0000a0 | ((S) << 8)))

Definition at line 130 of file xtensa.c.

XT_INS_L16UI

#define XT_INS_L16UI	(		X,
			S,
			T,
			IMM8
	)		_XT_INS_FORMAT_RRI8(X, 0x001002, 0, S, T, IMM8)

Definition at line 112 of file xtensa.c.

XT_INS_L32E

#define XT_INS_L32E	(		X,
			R,
			S,
			T
	)		_XT_INS_FORMAT_RRI4(X, 0x090000, 0, R, S, T)

Definition at line 153 of file xtensa.c.

XT_INS_L32E_S32E_MASK

#define XT_INS_L32E_S32E_MASK

(

X

)

(XT_ISBE(X) ? 0xF000FF << 8 : 0xFF000F)

Definition at line 155 of file xtensa.c.

XT_INS_L32I

#define XT_INS_L32I	(		X,
			S,
			T,
			IMM8
	)		_XT_INS_FORMAT_RRI8(X, 0x002002, 0, S, T, IMM8)

Definition at line 110 of file xtensa.c.

XT_INS_L8UI

#define XT_INS_L8UI	(		X,
			S,
			T,
			IMM8
	)		_XT_INS_FORMAT_RRI8(X, 0x000002, 0, S, T, IMM8)

Definition at line 114 of file xtensa.c.

XT_INS_LDDR32P

#define XT_INS_LDDR32P	(		X,
			S
	)		(XT_ISBE(X) ? (0x0E0700 | ((S) << 12)) << 8 : (0x0070E0 | ((S) << 8)))

Definition at line 105 of file xtensa.c.

XT_INS_PPTLB

#define XT_INS_PPTLB	(		X,
			S,
			T
	)		_XT_INS_FORMAT_RRR(X, 0x500000, ((S) << 4) | (T), 0xD)

Definition at line 162 of file xtensa.c.

XT_INS_RFDD

#define XT_INS_RFDD

(

X

)

(XT_ISBE(X) ? 0x010e1f << 8 : 0xf1e010)

Definition at line 102 of file xtensa.c.

XT_INS_RFDO

#define XT_INS_RFDO

(

X

)

(XT_ISBE(X) ? 0x000e1f << 8 : 0xf1e000)

Definition at line 100 of file xtensa.c.

XT_INS_RFR

#define XT_INS_RFR	(		X,
			FR,
			T
	)		_XT_INS_FORMAT_RRR(X, 0xFA0000, ((FR << 4) | 0x4), T)

Definition at line 149 of file xtensa.c.

XT_INS_RFWO

#define XT_INS_RFWO

(

X

)

(XT_ISBE(X) ? 0x004300 << 8 : 0x003400)

Definition at line 157 of file xtensa.c.

XT_INS_RFWO_RFWU_MASK

#define XT_INS_RFWO_RFWU_MASK

(

X

)

(XT_ISBE(X) ? 0xFFFFFF << 8 : 0xFFFFFF)

Definition at line 159 of file xtensa.c.

XT_INS_RFWU

#define XT_INS_RFWU

(

X

)

(XT_ISBE(X) ? 0x005300 << 8 : 0x003500)

Definition at line 158 of file xtensa.c.

XT_INS_ROTW

#define XT_INS_ROTW	(		X,
			N
	)		(XT_ISBE(X) ? ((0x000804) | (((N) & 15) << 16)) << 8 : ((0x408000) | (((N) & 15) << 4)))

Definition at line 141 of file xtensa.c.

XT_INS_RSR

#define XT_INS_RSR	(		X,
			SR,
			T
	)		_XT_INS_FORMAT_RSR(X, 0x030000, SR, T)

Definition at line 134 of file xtensa.c.

XT_INS_RUR

#define XT_INS_RUR	(		X,
			UR,
			T
	)		_XT_INS_FORMAT_RRR(X, 0xE30000, UR, T)

Definition at line 144 of file xtensa.c.

XT_INS_S16I

#define XT_INS_S16I	(		X,
			S,
			T,
			IMM8
	)		_XT_INS_FORMAT_RRI8(X, 0x005002, 0, S, T, IMM8)

Definition at line 119 of file xtensa.c.

XT_INS_S32E

#define XT_INS_S32E	(		X,
			R,
			S,
			T
	)		_XT_INS_FORMAT_RRI4(X, 0x490000, 0, R, S, T)

Definition at line 154 of file xtensa.c.

XT_INS_S32I

#define XT_INS_S32I	(		X,
			S,
			T,
			IMM8
	)		_XT_INS_FORMAT_RRI8(X, 0x006002, 0, S, T, IMM8)

Definition at line 117 of file xtensa.c.

XT_INS_S8I

#define XT_INS_S8I	(		X,
			S,
			T,
			IMM8
	)		_XT_INS_FORMAT_RRI8(X, 0x004002, 0, S, T, IMM8)

Definition at line 121 of file xtensa.c.

XT_INS_SDDR32P

#define XT_INS_SDDR32P	(		X,
			S
	)		(XT_ISBE(X) ? (0x0F0700 | ((S) << 12)) << 8 : (0x0070F0 | ((S) << 8)))

Definition at line 107 of file xtensa.c.

XT_INS_WFR

#define XT_INS_WFR	(		X,
			FR,
			T
	)		_XT_INS_FORMAT_RRR(X, 0xFA0000, ((T << 4) | 0x5), FR)

Definition at line 151 of file xtensa.c.

XT_INS_WSR

#define XT_INS_WSR	(		X,
			SR,
			T
	)		_XT_INS_FORMAT_RSR(X, 0x130000, SR, T)

Definition at line 136 of file xtensa.c.

XT_INS_WUR

#define XT_INS_WUR	(		X,
			UR,
			T
	)		_XT_INS_FORMAT_RSR(X, 0xF30000, UR, T)

Definition at line 146 of file xtensa.c.

XT_INS_XSR

#define XT_INS_XSR	(		X,
			SR,
			T
	)		_XT_INS_FORMAT_RSR(X, 0x610000, SR, T)

Definition at line 138 of file xtensa.c.

XT_NIBSWAP16

#define XT_NIBSWAP16

(

V

)

Value:

    ((((V) & 0x000F) << 12)                             \
        | (((V) & 0x00F0) << 4)                         \
        | (((V) & 0x0F00) >> 4)                         \
        | (((V) & 0xF000) >> 12))

Definition at line 29 of file xtensa.c.

XT_NIBSWAP24

#define XT_NIBSWAP24

(

V

)

Value:

    ((((V) & 0x00000F) << 20)                           \
        | (((V) & 0x0000F0) << 12)                      \
        | (((V) & 0x000F00) << 4)                       \
        | (((V) & 0x00F000) >> 4)                       \
        | (((V) & 0x0F0000) >> 12)                      \
        | (((V) & 0xF00000) >> 20))

Definition at line 35 of file xtensa.c.

XT_NIBSWAP8

#define XT_NIBSWAP8

(

V

)

Value:

    ((((V) & 0x0F) << 4)                                \
        | (((V) & 0xF0) >> 4))

Definition at line 25 of file xtensa.c.

XT_NX_IBREAKC_BASE

#define XT_NX_IBREAKC_BASE   (0xc0U) /* (IBREAKC0..IBREAKC1) for NX */

Definition at line 184 of file xtensa.c.

XT_PC_DBREG_NUM_BASE

#define XT_PC_DBREG_NUM_BASE   (0x20U) /* External (i.e., GDB) access */

Definition at line 183 of file xtensa.c.

XT_PC_REG_NUM_VIRTUAL

#define XT_PC_REG_NUM_VIRTUAL   (0xffU) /* Marker for computing PC (EPC[DBGLEVEL) */

Definition at line 182 of file xtensa.c.

XT_PS_REG_NUM

#define XT_PS_REG_NUM   (0xe6U)

Definition at line 179 of file xtensa.c.

XT_REG_A0

#define XT_REG_A0   (xtensa_regs[XT_REG_IDX_AR0].reg_num)

Definition at line 175 of file xtensa.c.

XT_REG_A3

#define XT_REG_A3   (xtensa_regs[XT_REG_IDX_AR3].reg_num)

Definition at line 176 of file xtensa.c.

XT_REG_A4

#define XT_REG_A4   (xtensa_regs[XT_REG_IDX_AR4].reg_num)

Definition at line 177 of file xtensa.c.

XT_SR_DDR

#define XT_SR_DDR   (xtensa_regs[XT_REG_IDX_DDR].reg_num)

Definition at line 172 of file xtensa.c.

XT_SR_PS

#define XT_SR_PS   (xtensa_regs[XT_REG_IDX_PS].reg_num)

Definition at line 173 of file xtensa.c.

XT_SR_WB

#define XT_SR_WB   (xtensa_regs[XT_REG_IDX_WINDOWBASE].reg_num)

Definition at line 174 of file xtensa.c.

XT_SW_BREAKPOINTS_MAX_NUM

#define XT_SW_BREAKPOINTS_MAX_NUM   32

Definition at line 186 of file xtensa.c.

XT_TLB1_ACC_MSK

#define XT_TLB1_ACC_MSK   0xF

Definition at line 165 of file xtensa.c.

XT_TLB1_ACC_SHIFT

#define XT_TLB1_ACC_SHIFT   8

Definition at line 164 of file xtensa.c.

XT_WATCHPOINTS_NUM_MAX

#define XT_WATCHPOINTS_NUM_MAX   2

Definition at line 167 of file xtensa.c.

Enumeration Type Documentation

xtensa_mem_region_type

enum xtensa_mem_region_type

Types of memory used at xtensa target.

Enumerator
XTENSA_MEM_REG_IROM
XTENSA_MEM_REG_IRAM
XTENSA_MEM_REG_DROM
XTENSA_MEM_REG_DRAM
XTENSA_MEM_REG_SRAM
XTENSA_MEM_REG_SROM
XTENSA_MEM_REGS_NUM

Definition at line 297 of file xtensa.c.

xtensa_mpu_access_type

enum xtensa_mpu_access_type

Types of access rights for MPU option The first block is kernel RWX ARs; the second block is user rwx ARs.

Enumerator
XTENSA_ACC_00X_000
XTENSA_ACC_000_00X
XTENSA_ACC_R00_000
XTENSA_ACC_R0X_000
XTENSA_ACC_RW0_000
XTENSA_ACC_RWX_000
XTENSA_ACC_0W0_0W0
XTENSA_ACC_RW0_RWX
XTENSA_ACC_RW0_R00
XTENSA_ACC_RWX_R0X
XTENSA_ACC_R00_R00
XTENSA_ACC_R0X_R0X
XTENSA_ACC_RW0_RW0
XTENSA_ACC_RWX_RWX

Definition at line 311 of file xtensa.c.

Function Documentation

COMMAND_HANDLER() [1/17]

COMMAND_HANDLER

(

xtensa_cmd_dm_rw

)

Definition at line 4299 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [2/17]

COMMAND_HANDLER

(

xtensa_cmd_exe

)

Definition at line 3593 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, and get_current_target().

COMMAND_HANDLER() [3/17]

COMMAND_HANDLER

(

xtensa_cmd_mask_interrupts

)

Definition at line 4213 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [4/17]

COMMAND_HANDLER

(

xtensa_cmd_perfmon_dump

)

Definition at line 4171 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [5/17]

COMMAND_HANDLER

(

xtensa_cmd_perfmon_enable

)

Definition at line 4131 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [6/17]

COMMAND_HANDLER

(

xtensa_cmd_permissive_mode

)

Definition at line 4071 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [7/17]

COMMAND_HANDLER

(

xtensa_cmd_smpbreak

)

Definition at line 4267 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, and get_current_target().

COMMAND_HANDLER() [8/17]

COMMAND_HANDLER

(

xtensa_cmd_tracedump

)

Definition at line 4472 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), ERROR_FAIL, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [9/17]

COMMAND_HANDLER

(

xtensa_cmd_tracestart

)

Definition at line 4356 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [10/17]

COMMAND_HANDLER

(

xtensa_cmd_tracestop

)

Definition at line 4384 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [11/17]

COMMAND_HANDLER

(

xtensa_cmd_xtdef

)

Definition at line 3616 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [12/17]

COMMAND_HANDLER

(

xtensa_cmd_xtmem

)

Definition at line 3795 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [13/17]

COMMAND_HANDLER

(

xtensa_cmd_xtmmu

)

Definition at line 3862 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [14/17]

COMMAND_HANDLER

(

xtensa_cmd_xtmpu

)

Definition at line 3834 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [15/17]

COMMAND_HANDLER

(

xtensa_cmd_xtopt

)

Definition at line 3724 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [16/17]

COMMAND_HANDLER

(

xtensa_cmd_xtreg

)

Definition at line 4028 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HANDLER() [17/17]

COMMAND_HANDLER

(

xtensa_cmd_xtregfmt

)

Definition at line 4059 of file xtensa.c.

References CALL_COMMAND_HANDLER, CMD_CTX, get_current_target(), and target_to_xtensa().

COMMAND_HELPER() [1/17]

COMMAND_HELPER	(	xtensa_cmd_dm_rw_do	,
		struct xtensa *	xtensa
	)

Definition at line 4273 of file xtensa.c.

References addr, CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::dbg_mod, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, NULL, xtensa_dm_read(), and xtensa_dm_write().

COMMAND_HELPER() [2/17]

static COMMAND_HELPER ( xtensa_cmd_exe_do  , struct target *  target  )

static

Definition at line 3524 of file xtensa.c.

References a3, CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::dbg_mod, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, LOG_TARGET_DEBUG, NULL, status, target_name(), target_to_xtensa(), XDMREG_DDR, XT_INS_RSR, XT_INS_WSR, XT_REG_A3, XT_REG_IDX_A3, XT_REG_IDX_CPENABLE, XT_REG_IDX_EXCCAUSE, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_fetch_all_regs(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_queue_exec_ins_wide(), xtensa_reg_get(), xtensa_reg_set(), xtensa_regs, and xtensa_write_dirty_registers().

COMMAND_HELPER() [3/17]

COMMAND_HELPER	(	xtensa_cmd_mask_interrupts_do	,
		struct xtensa *	xtensa
	)

Definition at line 4177 of file xtensa.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::core_config, xtensa_config::core_type, ERROR_FAIL, ERROR_OK, state, xtensa::stepping_isr_mode, XT_NX, XT_STEPPING_ISR_OFF, and XT_STEPPING_ISR_ON.

COMMAND_HELPER() [4/17]

COMMAND_HELPER	(	xtensa_cmd_perfmon_dump_do	,
		struct xtensa *	xtensa
	)

Definition at line 4138 of file xtensa.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::dbg_mod, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, NULL, xtensa_perfmon_result::overflow, xtensa_perfmon_result::value, xtensa_dm_perfmon_dump(), and XTENSA_MAX_PERF_COUNTERS.

COMMAND_HELPER() [5/17]

COMMAND_HELPER	(	xtensa_cmd_perfmon_enable_do	,
		struct xtensa *	xtensa
	)

Definition at line 4078 of file xtensa.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), config, xtensa::core_config, xtensa::dbg_mod, xtensa_config::debug, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, xtensa_debug_config::irq_level, NULL, xtensa_dm_perfmon_enable(), XTENSA_MAX_PERF_COUNTERS, XTENSA_MAX_PERF_MASK, and XTENSA_MAX_PERF_SELECT.

COMMAND_HELPER() [6/17]

COMMAND_HELPER	(	xtensa_cmd_permissive_mode_do	,
		struct xtensa *	xtensa
	)

Definition at line 4065 of file xtensa.c.

References CALL_COMMAND_HANDLER, and xtensa::permissive_mode.

COMMAND_HELPER() [7/17]

COMMAND_HELPER	(	xtensa_cmd_smpbreak_do	,
		struct target *	target
	)

Definition at line 4219 of file xtensa.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), ERROR_OK, OCDDCR_BREAKINEN, OCDDCR_BREAKOUTEN, OCDDCR_DEBUGMODEOUTEN, OCDDCR_RUNSTALLINEN, target_to_xtensa(), xtensa_smpbreak_read(), and xtensa_smpbreak_set().

COMMAND_HELPER() [8/17]

COMMAND_HELPER	(	xtensa_cmd_tracedump_do	,
		struct xtensa *	xtensa,
		const char *	fname
	)

Definition at line 4390 of file xtensa.c.

References xtensa_trace_config::addr, CMD, command_print(), xtensa_trace_config::ctrl, xtensa::dbg_mod, ERROR_FAIL, ERROR_OK, xtensa_trace_config::memaddr_end, xtensa_trace_config::memaddr_start, TRAXADDR_TADDR_MASK, TRAXADDR_TWRAP_MASK, TRAXADDR_TWRAP_SHIFT, TRAXADDR_TWSAT, TRAXCTRL_TREN, TRAXSTAT_TRACT, xtensa_dm_trace_config_read(), xtensa_dm_trace_data_read(), and xtensa_dm_trace_status_read().

COMMAND_HELPER() [9/17]

COMMAND_HELPER	(	xtensa_cmd_tracestart_do	,
		struct xtensa *	xtensa
	)

Definition at line 4305 of file xtensa.c.

References xtensa_trace_start_config::after, xtensa_trace_start_config::after_is_words, CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::dbg_mod, ERROR_FAIL, ERROR_OK, LOG_WARNING, NULL, xtensa_trace_start_config::stopmask, xtensa_trace_start_config::stoppc, xtensa::trace_active, TRAXSTAT_TRACT, xtensa_dm_trace_start(), xtensa_dm_trace_status_read(), xtensa_dm_trace_stop(), and XTENSA_STOPMASK_DISABLED.

COMMAND_HELPER() [10/17]

COMMAND_HELPER	(	xtensa_cmd_tracestop_do	,
		struct xtensa *	xtensa
	)

Definition at line 4362 of file xtensa.c.

References CMD, command_print(), xtensa::dbg_mod, ERROR_FAIL, ERROR_OK, xtensa::trace_active, TRAXSTAT_TRACT, xtensa_dm_trace_status_read(), and xtensa_dm_trace_stop().

COMMAND_HELPER() [11/17]

COMMAND_HELPER	(	xtensa_cmd_xtdef_do	,
		struct xtensa *	xtensa
	)

Definition at line 3599 of file xtensa.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::core_config, xtensa_config::core_type, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, XT_LX, and XT_NX.

COMMAND_HELPER() [12/17]

COMMAND_HELPER	(	xtensa_cmd_xtmem_do	,
		struct xtensa *	xtensa
	)

Definition at line 3731 of file xtensa.c.

References xtensa_local_mem_region_config::access, xtensa_local_mem_region_config::base, CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::core_config, xtensa_local_mem_config::count, xtensa_config::dcache, xtensa_config::dram, xtensa_config::drom, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa_config::icache, xtensa_config::iram, xtensa_config::irom, xtensa_cache_config::line_size, NULL, xtensa_local_mem_config::regions, xtensa_cache_config::size, xtensa_local_mem_region_config::size, xtensa_config::sram, xtensa_config::srom, xtensa_cache_config::way_count, xtensa_cache_config::writeback, XT_MEM_ACCESS_READ, and XT_MEM_ACCESS_WRITE.

COMMAND_HELPER() [13/17]

COMMAND_HELPER	(	xtensa_cmd_xtmmu_do	,
		struct xtensa *	xtensa
	)

Definition at line 3841 of file xtensa.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::core_config, xtensa_mmu_config::dtlb_entries_count, xtensa_mmu_config::enabled, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa_mmu_config::itlb_entries_count, xtensa_config::mmu, and NULL.

COMMAND_HELPER() [14/17]

COMMAND_HELPER	(	xtensa_cmd_xtmpu_do	,
		struct xtensa *	xtensa
	)

Definition at line 3802 of file xtensa.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::core_config, xtensa_mpu_config::enabled, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa_mpu_config::execonly, xtensa_mpu_config::lockable, xtensa_mpu_config::minsegsize, xtensa_config::mpu, xtensa_mpu_config::nfgseg, and NULL.

COMMAND_HELPER() [15/17]

COMMAND_HELPER	(	xtensa_cmd_xtopt_do	,
		struct xtensa *	xtensa
	)

Definition at line 3632 of file xtensa.c.

References xtensa_config::aregs_num, CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa_config::coproc, xtensa::core_config, xtensa_config::core_type, xtensa_debug_config::dbreaks_num, xtensa_config::debug, xtensa_irq_config::enabled, xtensa_high_prio_irq_config::enabled, xtensa_debug_config::enabled, xtensa_tracing_config::enabled, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa_config::exceptions, xtensa_high_prio_irq_config::excm_level, xtensa_config::high_irq, xtensa_debug_config::ibreaks_num, xtensa_config::irq, xtensa_debug_config::irq_level, xtensa_irq_config::irq_num, xtensa_high_prio_irq_config::level_num, LOG_WARNING, xtensa_tracing_config::mem_sz, NULL, xtensa_debug_config::perfcount_num, xtensa_tracing_config::reversed_mem_access, xtensa_config::trace, xtensa_config::windowed, XT_LX, and xtensa_cmd_xtopt_legal_val().

COMMAND_HELPER() [16/17]

COMMAND_HELPER	(	xtensa_cmd_xtreg_do	,
		struct xtensa *	xtensa
	)

Definition at line 3870 of file xtensa.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), xtensa::contiguous_regs_desc, xtensa_config::coproc, xtensa::core_config, xtensa::core_regs_num, xtensa_config::core_type, xtensa_reg_desc::dbreg_num, xtensa_config::debug, xtensa::eps_dbglevel_idx, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, xtensa_reg_desc::exist, xtensa_reg_desc::flags, xtensa::genpkt_regs_num, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_ERROR, name, xtensa_reg_desc::name, NULL, xtensa::num_optregs, xtensa::nx_reg_idx, xtensa::optregs, xtensa_reg_desc::reg_num, xtensa::regmap_contiguous, xtensa::total_regs_num, xtensa_reg_desc::type, XT_EPS_REG_NUM_BASE, XT_LX, XT_NUM_REGS, XT_NX, XT_NX_REG_IDX_IBREAKC0, XT_NX_REG_IDX_IEEXTERN, XT_NX_REG_IDX_IEVEC, XT_NX_REG_IDX_MESR, XT_NX_REG_IDX_MESRCLR, XT_NX_REG_IDX_MS, XT_NX_REG_IDX_NUM, XT_NX_REG_IDX_WB, XT_REG_FR, XT_REG_FR_MASK, XT_REG_FR_VAL, XT_REG_GENERAL, XT_REG_GENERAL_MASK, XT_REG_GENERAL_VAL, XT_REG_IDX_ARFIRST, XT_REG_INDEX_MASK, XT_REG_OTHER, XT_REG_RELGEN, XT_REG_RELGEN_MASK, XT_REG_RELGEN_VAL, XT_REG_SPECIAL, XT_REG_SPECIAL_MASK, XT_REG_SPECIAL_VAL, XT_REG_TIE, XT_REG_TIE_MASK, XT_REG_USER, XT_REG_USER_MASK, XT_REG_USER_VAL, XT_REGF_NOREAD, xtensa_extra_debug_log, and xtensa_regs.

COMMAND_HELPER() [17/17]

COMMAND_HELPER	(	xtensa_cmd_xtregfmt_do	,
		struct xtensa *	xtensa
	)

Definition at line 4035 of file xtensa.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, xtensa::genpkt_regs_num, NULL, xtensa::regmap_contiguous, and xtensa::total_regs_num.

xtensa_assert_reset()

int xtensa_assert_reset

(

struct target *

target

)

Definition at line 1161 of file xtensa.c.

References xtensa::core_cache, xtensa::dbg_mod, ERROR_OK, LOG_TARGET_DEBUG, PWRCTL_CORERESET, PWRCTL_COREWAKEUP, PWRCTL_DEBUGWAKEUP, PWRCTL_JTAGDEBUGUSE, PWRCTL_MEMWAKEUP, register_cache_invalidate(), xtensa::reset_asserted, target::state, TARGET_RESET, target_to_xtensa(), XDMREG_PWRCTL, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), and xtensa_queue_pwr_reg_write().

Referenced by esp32_soc_reset(), esp32s2_soc_reset(), esp32s3_soc_reset(), esp_xtensa_smp_soft_reset_halt(), and xtensa_soft_reset_halt().

xtensa_breakpoint_add()

int xtensa_breakpoint_add	(	struct target *	target,
		struct breakpoint *	breakpoint
	)

Definition at line 2554 of file xtensa.c.

References breakpoint::address, BKPT_SOFT, xtensa::core_config, xtensa_config::debug, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa::hw_brps, xtensa_debug_config::ibreaks_num, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, xtensa_sw_breakpoint::oocd_bp, xtensa::sw_brps, TARGET_ADDR_FMT, target_to_xtensa(), breakpoint::type, XT_SW_BREAKPOINTS_MAX_NUM, and xtensa_sw_breakpoint_add().

Referenced by esp_xtensa_breakpoint_add().

xtensa_breakpoint_remove()

int xtensa_breakpoint_remove	(	struct target *	target,
		struct breakpoint *	breakpoint
	)

Definition at line 2598 of file xtensa.c.

References breakpoint::address, BKPT_SOFT, xtensa::core_config, xtensa_config::core_type, xtensa_config::debug, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa::hw_brps, xtensa_debug_config::ibreaks_num, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, NULL, xtensa::nx_reg_idx, xtensa_sw_breakpoint::oocd_bp, xtensa::sw_brps, TARGET_ADDR_FMT, target_to_xtensa(), breakpoint::type, XT_NX, XT_NX_REG_IDX_IBREAKC0, XT_SW_BREAKPOINTS_MAX_NUM, xtensa_reg_set(), and xtensa_sw_breakpoint_remove().

Referenced by esp_xtensa_breakpoint_remove().

xtensa_build_reg_cache()

static int xtensa_build_reg_cache ( struct target *  target )

static

Definition at line 2934 of file xtensa.c.

References xtensa::algo_context_backup, reg::arch_info, xtensa::contiguous_regs_desc, xtensa::contiguous_regs_list, xtensa::core_cache, xtensa::core_regs_num, xtensa_reg_desc::dbreg_num, xtensa::dbregs_num, reg::dirty, xtensa::empty_regs, ERROR_FAIL, ERROR_OK, reg::exist, xtensa_reg_desc::exist, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, name, reg::name, reg_cache::name, xtensa_reg_desc::name, reg_cache::next, NULL, xtensa::num_optregs, reg_cache::num_regs, reg::number, xtensa::optregs, target::reg_cache, reg_cache::reg_list, register_get_last_cache_p(), xtensa::regmap_contiguous, reg::size, target_to_xtensa(), xtensa::total_regs_num, type, reg::type, reg::valid, reg::value, XT_NUM_REGS, xtensa_extra_debug_log, xtensa_reg_type, and xtensa_regs.

Referenced by xtensa_target_init().

xtensa_canonical_to_windowbase_offset()

static enum xtensa_reg_id xtensa_canonical_to_windowbase_offset ( struct xtensa *  xtensa, enum xtensa_reg_id  reg_idx, int  windowbase  )

static

Definition at line 450 of file xtensa.c.

References reg::arch_info, buf_cpy(), buf_get_u32(), xtensa_keyval_info::chrval, xtensa::core_config, reg::dirty, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_OK, ERROR_TARGET_NOT_HALTED, reg::exist, xtensa_keyval_info::intval, LOG_DEBUG, LOG_WARNING, reg::name, NULL, xtensa::scratch_ars, reg::size, target::state, xtensa::target, TARGET_HALTED, reg::valid, reg::value, xtensa_config::windowed, XT_AR_SCRATCH_AR3, XT_AR_SCRATCH_AR4, and XT_AR_SCRATCH_NUM.

Referenced by xtensa_fetch_all_regs().

xtensa_cause_clear()

void xtensa_cause_clear

(

struct target *

target

)

Definition at line 1142 of file xtensa.c.

References xtensa::core_cache, xtensa::core_config, xtensa_config::core_type, DEBUGCAUSE_VALID, reg::dirty, xtensa::nx_stop_cause, reg_cache::reg_list, target_to_xtensa(), XT_LX, XT_REG_IDX_DEBUGCAUSE, and xtensa_reg_set().

Referenced by xtensa_do_step().

xtensa_cause_get()

uint32_t xtensa_cause_get

(

struct target *

target

)

Definition at line 1095 of file xtensa.c.

References xtensa::core_config, xtensa_config::core_type, xtensa::dbg_mod, DEBUGCAUSE_BI, DEBUGCAUSE_BN, DEBUGCAUSE_DB, DEBUGCAUSE_DI, DEBUGCAUSE_IB, DEBUGCAUSE_IC, DEBUGCAUSE_VALID, ERROR_OK, LOG_TARGET_ERROR, xtensa::nx_stop_cause, OCDDSR_STOPCAUSE, OCDDSR_STOPCAUSE_B, OCDDSR_STOPCAUSE_B1, OCDDSR_STOPCAUSE_BN, OCDDSR_STOPCAUSE_DB0, OCDDSR_STOPCAUSE_DB1, OCDDSR_STOPCAUSE_DI, OCDDSR_STOPCAUSE_IB, OCDDSR_STOPCAUSE_SHIFT, OCDDSR_STOPCAUSE_SS, target_to_xtensa(), XT_LX, XT_REG_IDX_DEBUGCAUSE, xtensa_dm_core_status_get(), xtensa_dm_core_status_read(), and xtensa_reg_get().

Referenced by xtensa_do_step(), xtensa_fileio_detect_proc(), xtensa_poll(), and xtensa_prepare_resume().

xtensa_cause_reset()

void xtensa_cause_reset

(

struct target *

target

)

Definition at line 1154 of file xtensa.c.

References xtensa::nx_stop_cause, and target_to_xtensa().

Referenced by xtensa_do_resume().

xtensa_checksum_memory()

int xtensa_checksum_memory	(	struct target *	target,
		target_addr_t	address,
		uint32_t	count,
		uint32_t *	checksum
	)

Definition at line 2298 of file xtensa.c.

References ERROR_FAIL, and LOG_WARNING.

xtensa_cmd_xtopt_legal_val()

static bool xtensa_cmd_xtopt_legal_val ( char *  opt, int  val, int  min, int  max  )

inlinestatic

Definition at line 3622 of file xtensa.c.

References LOG_ERROR.

Referenced by COMMAND_HELPER().

xtensa_core_reg_get()

static int xtensa_core_reg_get ( struct reg *  reg )

static

Definition at line 431 of file xtensa.c.

References reg::arch_info, ERROR_COMMAND_ARGUMENT_INVALID, ERROR_OK, ERROR_TARGET_NOT_HALTED, reg::exist, LOG_WARNING, reg::name, NULL, target::state, xtensa::target, and TARGET_HALTED.

xtensa_core_reg_set()

static int xtensa_core_reg_set ( struct reg *  reg, uint8_t *  buf  )

static

Definition at line 450 of file xtensa.c.

xtensa_core_status_check()

int xtensa_core_status_check

(

struct target *

target

)

Definition at line 1017 of file xtensa.c.

References xtensa::core_config, xtensa_config::core_type, xtensa::dbg_mod, ERROR_FAIL, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, OCDDSR_EXECBUSY, OCDDSR_EXECEXCEPTION, OCDDSR_EXECOVERRUN, xtensa::suppress_dsr_errors, target_name(), target_to_xtensa(), XT_NX, xtensa_dm_core_status_clear(), xtensa_dm_core_status_get(), xtensa_dm_core_status_read(), xtensa_imprecise_exception_clear(), and xtensa_imprecise_exception_occurred().

Referenced by COMMAND_HELPER(), xtensa_do_resume(), xtensa_fetch_all_regs(), xtensa_gdbqc_qxtreg(), xtensa_poll(), xtensa_read_memory(), xtensa_region_ar_exec(), xtensa_update_instruction(), xtensa_window_state_save(), xtensa_write_dirty_registers(), and xtensa_write_memory().

xtensa_deassert_reset()

int xtensa_deassert_reset

(

struct target *

target

)

Definition at line 1182 of file xtensa.c.

References xtensa::dbg_mod, ERROR_OK, LOG_TARGET_DEBUG, OCDDCR_DEBUGINTERRUPT, OCDDCR_ENABLEOCD, PWRCTL_COREWAKEUP, PWRCTL_DEBUGWAKEUP, PWRCTL_JTAGDEBUGUSE, PWRCTL_MEMWAKEUP, xtensa::reset_asserted, target::reset_halt, target::state, TARGET_RUNNING, target_to_xtensa(), XDMREG_DCRSET, XDMREG_PWRCTL, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), xtensa_queue_dbg_reg_write(), and xtensa_queue_pwr_reg_write().

Referenced by esp32_soc_reset(), esp32s2_deassert_reset(), esp32s2_soc_reset(), esp32s3_soc_reset(), and esp_xtensa_smp_deassert_reset().

xtensa_do_resume()

int xtensa_do_resume

(

struct target *

target

)

Definition at line 1656 of file xtensa.c.

References xtensa::dbg_mod, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, target_to_xtensa(), XT_INS_RFDO, xtensa_cause_reset(), xtensa_core_status_check(), xtensa_dm_queue_execute(), and xtensa_queue_exec_ins().

Referenced by esp_xtensa_smp_resume(), xtensa_do_step(), and xtensa_resume().

xtensa_do_step()

int xtensa_do_step	(	struct target *	target,
		int	current,
		target_addr_t	address,
		int	handle_breakpoints
	)

Definition at line 1722 of file xtensa.c.

References xtensa::core_cache, xtensa::core_config, xtensa_config::core_type, xtensa::dbg_mod, DBG_REASON_NOTHALTED, DBG_REASON_SINGLESTEP, xtensa_debug_config::dbreaks_num, xtensa_config::debug, target::debug_reason, DEBUGCAUSE_BI, DEBUGCAUSE_BN, DEBUGCAUSE_DB, xtensa_high_prio_irq_config::enabled, xtensa::eps_dbglevel_idx, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, xtensa_config::high_irq, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, MIN, reg::name, OCDDCR_STEPREQUEST, reg_cache::reg_list, start, target::state, xtensa::stepping_isr_mode, TARGET_ADDR_FMT, TARGET_HALTED, TARGET_RUNNING, target_to_xtensa(), timeval_ms(), xtensa_config::windowed, XDMREG_DCRSET, XT_LX, XT_REG_IDX_DBREAKC0, XT_REG_IDX_EXCCAUSE, XT_REG_IDX_ICOUNT, XT_REG_IDX_ICOUNTLEVEL, XT_REG_IDX_PC, XT_REG_IDX_PS, XT_STEPPING_ISR_OFF, XT_WATCHPOINTS_NUM_MAX, xtensa_cause_clear(), xtensa_cause_get(), xtensa_dm_core_status_get(), xtensa_dm_core_status_read(), xtensa_do_resume(), xtensa_fetch_all_regs(), xtensa_is_stopped(), xtensa_pc_in_winexc(), xtensa_prepare_resume(), xtensa_queue_dbg_reg_write(), xtensa_reg_get(), xtensa_reg_set(), and xtensa_write_dirty_registers().

Referenced by xtensa_prepare_resume(), and xtensa_step().

xtensa_examine()

int xtensa_examine

(

struct target *

target

)

Definition at line 886 of file xtensa.c.

References cmd, xtensa::core_config, xtensa_config::core_type, xtensa::dbg_mod, xtensa_debug_module::device_id, ERROR_FAIL, ERROR_OK, ERROR_TARGET_FAILURE, LOG_DEBUG, LOG_ERROR, LOG_TARGET_DEBUG, PWRCTL_COREWAKEUP, PWRCTL_DEBUGWAKEUP, PWRCTL_JTAGDEBUGUSE, PWRCTL_MEMWAKEUP, xtensa::smp_break, target_set_examined(), target_to_xtensa(), XDMREG_PWRCTL, XT_UNDEF, xtensa_dm_is_online(), xtensa_dm_queue_enable(), xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), xtensa_queue_pwr_reg_write(), and xtensa_smpbreak_write().

Referenced by esp_xtensa_smp_deassert_reset(), and xtensa_chip_examine().

xtensa_fetch_all_regs()

int xtensa_fetch_all_regs

(

struct target *

target

)

Definition at line 1210 of file xtensa.c.

References a0, a3, xtensa_reg_val_u::buf, buf_cpy(), buf_get_u32(), xtensa_keyval_info::chrval, xtensa_config::coproc, xtensa::core_cache, xtensa::core_config, xtensa_config::core_type, xtensa::dbg_mod, xtensa_config::debug, reg::dirty, ERROR_FAIL, ERROR_OK, xtensa_reg_desc::exist, xtensa_reg_desc::flags, xtensa_keyval_info::intval, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_ERROR, LOG_INFO, LOG_LEVEL_IS, LOG_LVL_DEBUG, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, name, reg_cache::num_regs, xtensa::nx_reg_idx, OCDDSR_EXECEXCEPTION, xtensa::optregs, reg_cache::reg_list, xtensa_reg_desc::reg_num, xtensa::regs_fetched, xtensa::scratch_ars, size, target_to_xtensa(), type, xtensa_reg_desc::type, reg::valid, xtensa_config::windowed, XDMREG_DDR, XDMREG_DSR, XT_AR_SCRATCH_AR3, XT_AR_SCRATCH_AR4, XT_AR_SCRATCH_NUM, XT_AREGS_NUM_MAX, XT_EPC_REG_NUM_BASE, XT_EPS_REG_NUM_BASE, XT_INS_CALL0, XT_INS_RFR, XT_INS_ROTW, XT_INS_RSR, XT_INS_RUR, XT_INS_WSR, XT_LX, XT_MS_DISPST_DBG, XT_NUM_REGS, XT_NX, XT_NX_REG_IDX_MS, XT_NX_REG_IDX_WB, XT_PC_REG_NUM_VIRTUAL, XT_REG_A0, XT_REG_A3, XT_REG_DEBUG, XT_REG_FR, XT_REG_GENERAL, XT_REG_IDX_A0, XT_REG_IDX_A3, XT_REG_IDX_A4, XT_REG_IDX_AR0, XT_REG_IDX_CPENABLE, XT_REG_IDX_PS, XT_REG_IDX_WINDOWBASE, XT_REG_OTHER, XT_REG_RELGEN, XT_REG_SPECIAL, XT_REG_TIE, XT_REG_USER, XT_REGF_MASK, XT_REGF_NOREAD, XT_SR_DDR, XT_WB_P_MSK, XT_WB_P_SHIFT, xtensa_canonical_to_windowbase_offset(), xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_extra_debug_log, xtensa_mark_register_dirty(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_reg_is_readable(), xtensa_reg_set(), xtensa_regs, xtensa_window_state_restore(), xtensa_window_state_save(), and xtensa_windowbase_offset_to_canonical().

Referenced by COMMAND_HELPER(), xtensa_do_step(), and xtensa_poll().

xtensa_free_reg_cache()

static void xtensa_free_reg_cache ( struct target *  target )

static

Definition at line 3451 of file xtensa.c.

References xtensa::algo_context_backup, xtensa::core_cache, xtensa::dbregs_num, xtensa::empty_regs, reg::name, xtensa_reg_desc::name, NULL, xtensa::num_optregs, reg_cache::num_regs, xtensa::optregs, target::reg_cache, reg_cache::reg_list, register_unlink_cache(), target_to_xtensa(), and reg::value.

Referenced by xtensa_target_deinit().

xtensa_gdb_query_custom()

int xtensa_gdb_query_custom	(	struct target *	target,
		const char *	packet,
		char **	response_p
	)

Definition at line 3264 of file xtensa.c.

References xtensa_local_mem_region_config::base, xtensa::core_config, xtensa_local_mem_config::count, xtensa_config::dcache, xtensa_high_prio_irq_config::enabled, ERROR_FAIL, ERROR_OK, xtensa_high_prio_irq_config::excm_level, xtensa_config::high_irq, xtensa_config::icache, xtensa_keyval_info::intval, xtensa_config::iram, xtensa_config::irom, xtensa_cache_config::line_size, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, NULL, xtensa::qpkt_resp, xtensa_local_mem_config::regions, size, xtensa_cache_config::size, xtensa_local_mem_region_config::size, xtensa::spill_buf, xtensa::spill_bytes, xtensa::spill_loc, target_to_xtensa(), xtensa_cache_config::way_count, xt_qerr, XT_QERR_INVAL, XT_QERR_MEM, and xtensa_gdbqc_qxtreg().

xtensa_gdbqc_parse_exec_tie_ops()

static int32_t xtensa_gdbqc_parse_exec_tie_ops ( struct target *  target, char *  opstr  )

static

Definition at line 3095 of file xtensa.c.

References ERROR_COMMAND_ARGUMENT_INVALID, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, status, target_to_xtensa(), and xtensa_queue_exec_ins_wide().

Referenced by xtensa_gdbqc_qxtreg().

xtensa_gdbqc_qxtreg()

static int xtensa_gdbqc_qxtreg ( struct target *  target, const char *  packet, char **  response_p  )

static

Definition at line 3126 of file xtensa.c.

References xtensa::dbg_mod, ERROR_OK, xtensa_keyval_info::intval, LOG_DEBUG, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, NULL, xtensa::spill_buf, xtensa::spill_bytes, xtensa::spill_loc, status, target_to_xtensa(), XDMREG_DDR, XT_INS_RSR, xt_qerr, XT_QERR_FAIL, XT_QERR_INVAL, XT_QERR_MEM, XT_QUERYPKT_RESP_MAX, XT_REG_A4, XT_REG_IDX_A4, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_gdbqc_parse_exec_tie_ops(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_read_memory(), xtensa_reg_get(), and xtensa_write_memory().

Referenced by xtensa_gdb_query_custom().

xtensa_get_gdb_arch()

const char* xtensa_get_gdb_arch

(

const struct target *

target

)

Definition at line 3518 of file xtensa.c.

xtensa_get_gdb_reg_list()

int xtensa_get_gdb_reg_list	(	struct target *	target,
		struct reg **	reg_list[],
		int *	reg_list_size,
		enum target_register_class	reg_class
	)

Definition at line 1489 of file xtensa.c.

References xtensa::contiguous_regs_list, xtensa::core_cache, xtensa::core_config, xtensa_config::core_type, xtensa_reg_desc::dbreg_num, xtensa::dbregs_num, xtensa_config::debug, xtensa::empty_regs, xtensa::eps_dbglevel_idx, ERROR_FAIL, ERROR_OK, reg::exist, xtensa::genpkt_regs_num, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_ERROR, reg_cache::num_regs, xtensa::optregs, REG_CLASS_GENERAL, reg_cache::reg_list, xtensa::regmap_contiguous, target_to_xtensa(), xtensa::total_regs_num, type, XT_LX, XT_NUM_REGS, XT_PC_DBREG_NUM_BASE, XT_REG_IDX_ARFIRST, XT_REG_IDX_PC, XT_REG_IDX_PS, XT_REG_RELGEN, xtensa_extra_debug_log, xtensa_reg_get_value(), and xtensa_regs.

xtensa_get_mem_config()

static const struct xtensa_local_mem_config* xtensa_get_mem_config ( struct xtensa *  xtensa, enum xtensa_mem_region_type  type  )

inlinestatic

Gets a config for the specific mem type.

Definition at line 347 of file xtensa.c.

References xtensa::core_config, xtensa_config::dram, xtensa_config::drom, xtensa_config::iram, xtensa_config::irom, NULL, xtensa_config::sram, xtensa_config::srom, type, XTENSA_MEM_REG_DRAM, XTENSA_MEM_REG_DROM, XTENSA_MEM_REG_IRAM, XTENSA_MEM_REG_IROM, XTENSA_MEM_REG_SRAM, and XTENSA_MEM_REG_SROM.

Referenced by xtensa_target_memory_region_find().

xtensa_get_overlap_size()

static target_addr_t xtensa_get_overlap_size ( target_addr_t  r1_start, target_addr_t  r1_end, target_addr_t  r2_start, target_addr_t  r2_end  )

inlinestatic

Returns a size of overlapped region of two ranges.

Definition at line 1962 of file xtensa.c.

References xtensa_memory_regions_overlap().

Referenced by xtensa_memory_op_validate_range().

xtensa_halt()

int xtensa_halt

(

struct target *

target

)

Definition at line 1566 of file xtensa.c.

References xtensa::dbg_mod, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, OCDDCR_DEBUGINTERRUPT, OCDDCR_ENABLEOCD, target::state, TARGET_HALTED, target_to_xtensa(), XDMREG_DCRSET, xtensa_dm_core_status_get(), xtensa_dm_core_status_read(), xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), xtensa_is_stopped(), and xtensa_queue_dbg_reg_write().

Referenced by esp32_soc_reset(), esp32s2_soc_reset(), and esp32s3_soc_reset().

xtensa_imprecise_exception_clear()

static void xtensa_imprecise_exception_clear ( struct target *  target )

static

Definition at line 1003 of file xtensa.c.

References xtensa::core_cache, LOG_TARGET_DEBUG, reg::name, xtensa::nx_reg_idx, reg_cache::reg_list, target_to_xtensa(), XT_MESRCLR_IMPR_EXC_MSK, XT_NX_REG_IDX_IEVEC, XT_NX_REG_IDX_MESR, XT_NX_REG_IDX_MESRCLR, and xtensa_reg_set().

Referenced by xtensa_core_status_check().

xtensa_imprecise_exception_occurred()

static int xtensa_imprecise_exception_occurred ( struct target *  target )

static

Definition at line 986 of file xtensa.c.

References xtensa::core_cache, LOG_TARGET_DEBUG, reg::name, xtensa::nx_reg_idx, reg_cache::reg_list, target_to_xtensa(), XT_IMPR_EXC_MSK, XT_NX_REG_IDX_IEVEC, XT_NX_REG_IDX_MESR, and xtensa_reg_get().

Referenced by xtensa_core_status_check().

xtensa_init_arch_info()

int xtensa_init_arch_info	(	struct target *	target,
		struct xtensa *	xtensa,
		const struct xtensa_debug_module_config *	dm_cfg
	)

Definition at line 3375 of file xtensa.c.

References target::arch_info, xtensa_keyval_info::chrval, xtensa::common_magic, xtensa::core_config, xtensa::dbg_mod, xtensa_config::dcache, ERROR_FAIL, xtensa_config::icache, xtensa_keyval_info::intval, LOG_ERROR, xtensa::scratch_ars, xtensa::stepping_isr_mode, target, xtensa::target, xtensa_cache_config::way_count, XT_AR_SCRATCH_A3, XT_AR_SCRATCH_A4, XT_AR_SCRATCH_AR3, XT_AR_SCRATCH_NUM, XT_STEPPING_ISR_ON, XTENSA_COMMON_MAGIC, and xtensa_dm_init().

Referenced by esp_xtensa_init_arch_info(), and xtensa_chip_init_arch_info().

xtensa_is_cacheable()

static bool xtensa_is_cacheable ( const struct xtensa_cache_config *  cache, const struct xtensa_local_mem_config *  mem, target_addr_t  address  )

inlinestatic

Definition at line 406 of file xtensa.c.

References xtensa_cache_config::size, and xtensa_memory_region_find().

Referenced by xtensa_is_dcacheable(), and xtensa_is_icacheable().

xtensa_is_dcacheable()

static bool xtensa_is_dcacheable ( struct xtensa *  xtensa, target_addr_t  address  )

inlinestatic

Definition at line 423 of file xtensa.c.

References xtensa::core_config, xtensa_config::dcache, xtensa_config::dram, xtensa_config::drom, xtensa_config::sram, xtensa_config::srom, and xtensa_is_cacheable().

Referenced by xtensa_update_instruction(), and xtensa_write_memory().

xtensa_is_icacheable()

static bool xtensa_is_icacheable ( struct xtensa *  xtensa, target_addr_t  address  )

inlinestatic

Definition at line 415 of file xtensa.c.

References xtensa::core_config, xtensa_config::icache, xtensa_config::iram, xtensa_config::irom, xtensa_config::sram, xtensa_config::srom, and xtensa_is_cacheable().

Referenced by xtensa_update_instruction(), and xtensa_write_memory().

xtensa_is_stopped()

static bool xtensa_is_stopped ( struct target *  target )

inlinestatic

Definition at line 880 of file xtensa.c.

References xtensa_debug_module::core_status, xtensa::dbg_mod, xtensa_core_status::dsr, OCDDSR_STOPPED, and target_to_xtensa().

Referenced by xtensa_do_step(), xtensa_halt(), and xtensa_poll().

xtensa_mark_register_dirty()

static void xtensa_mark_register_dirty ( struct xtensa *  xtensa, enum xtensa_reg_id  reg_idx  )

static

Definition at line 521 of file xtensa.c.

References xtensa::core_cache, reg::dirty, and reg_cache::reg_list.

Referenced by xtensa_fetch_all_regs(), xtensa_poll(), xtensa_read_memory(), xtensa_update_instruction(), xtensa_write_dirty_registers(), and xtensa_write_memory().

xtensa_memory_op_validate_range()

static bool xtensa_memory_op_validate_range ( struct xtensa *  xtensa, target_addr_t  address, size_t  size, int  access  )

static

Check if the address gets to memory regions, and its access mode.

Definition at line 1978 of file xtensa.c.

References xtensa_local_mem_region_config::access, xtensa_local_mem_region_config::base, size, xtensa_local_mem_region_config::size, xtensa_get_overlap_size(), and xtensa_target_memory_region_find().

Referenced by xtensa_read_memory(), and xtensa_write_memory().

xtensa_memory_region_find()

static const struct xtensa_local_mem_region_config* xtensa_memory_region_find ( const struct xtensa_local_mem_config *  mem, target_addr_t  address  )

inlinestatic

Extracts an exact xtensa_local_mem_region_config from xtensa_local_mem_config for a given address Returns NULL if nothing found.

Definition at line 374 of file xtensa.c.

References xtensa_local_mem_region_config::base, xtensa_local_mem_config::count, NULL, xtensa_local_mem_config::regions, and xtensa_local_mem_region_config::size.

Referenced by xtensa_is_cacheable(), and xtensa_target_memory_region_find().

xtensa_memory_regions_overlap()

static bool xtensa_memory_regions_overlap ( target_addr_t  r1_start, target_addr_t  r1_end, target_addr_t  r2_start, target_addr_t  r2_end  )

inlinestatic

Returns true if two ranges are overlapping.

Definition at line 1947 of file xtensa.c.

Referenced by xtensa_get_overlap_size().

xtensa_mmu_is_enabled()

int xtensa_mmu_is_enabled	(	struct target *	target,
		int *	enabled
	)

Definition at line 1558 of file xtensa.c.

References xtensa::core_config, xtensa_mmu_config::dtlb_entries_count, ERROR_OK, xtensa_mmu_config::itlb_entries_count, xtensa_config::mmu, and target_to_xtensa().

xtensa_pc_in_winexc()

static bool xtensa_pc_in_winexc ( struct target *  target, target_addr_t  pc  )

static

Definition at line 1702 of file xtensa.c.

References buf_get_u32(), ERROR_OK, target_to_xtensa(), XT_INS_L32E, XT_INS_L32E_S32E_MASK, XT_INS_RFWO, XT_INS_RFWO_RFWU_MASK, XT_INS_RFWU, XT_INS_S32E, XT_ISNS_SZ_MAX, and xtensa_read_buffer().

Referenced by xtensa_do_step().

xtensa_poll()

int xtensa_poll

(

struct target *

target

)

Definition at line 2304 of file xtensa.c.

References xtensa::come_online_probes_num, xtensa::core_config, xtensa_debug_module::core_status, xtensa_config::core_type, xtensa::dbg_mod, DBG_REASON_BREAKPOINT, DBG_REASON_DBGRQ, DBG_REASON_NOTHALTED, DBG_REASON_SINGLESTEP, DBG_REASON_WATCHPOINT, DBG_REASON_WPTANDBKPT, target::debug_reason, DEBUGCAUSE_BI, DEBUGCAUSE_BN, DEBUGCAUSE_DB, DEBUGCAUSE_IB, DEBUGCAUSE_IC, xtensa_core_status::dsr, ERROR_OK, ERROR_TARGET_NOT_EXAMINED, target::examined, LOG_INFO, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_INFO, OCDDSR_DEBUGINTBREAK, OCDDSR_DEBUGINTHOST, OCDDSR_DEBUGINTTRAX, OCDDSR_DEBUGPENDBREAK, OCDDSR_DEBUGPENDHOST, OCDDSR_DEBUGPENDTRAX, OCDDSR_STOPPED, xtensa_debug_module::power_status, PWRSTAT_COREWASRESET, PWRSTAT_DEBUGWASRESET, xtensa::smp_break, xtensa_power_status::stat, target::state, xtensa_power_status::stath, TARGET_DEBUG_RUNNING, TARGET_HALTED, TARGET_RESET, TARGET_RUNNING, target_to_xtensa(), TARGET_UNKNOWN, xtensa::trace_active, TRAXSTAT_CTITG, TRAXSTAT_PCMTG, TRAXSTAT_PTITG, TRAXSTAT_TRACT, XDMREG_DDR, XT_INS_RSR, XT_INS_WSR, XT_NX, XT_PS_DIEXC_MSK, XT_REG_A3, XT_REG_IDX_EXCCAUSE, XT_REG_IDX_PC, XT_REG_IDX_PS, XT_SR_DDR, XT_SR_PS, xtensa_cause_get(), xtensa_core_status_check(), xtensa_dm_core_status_clear(), xtensa_dm_core_status_read(), xtensa_dm_core_was_reset(), xtensa_dm_is_powered(), xtensa_dm_poll(), xtensa_dm_power_status_cache(), xtensa_dm_power_status_read(), xtensa_dm_queue_execute(), xtensa_dm_tap_was_reset(), xtensa_dm_trace_status_read(), xtensa_fetch_all_regs(), xtensa_is_stopped(), xtensa_mark_register_dirty(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_reg_get(), xtensa_smpbreak_write(), and xtensa_wakeup().

Referenced by esp32_soc_reset(), esp32s2_soc_reset(), esp32s3_soc_reset(), esp_xtensa_poll(), and xtensa_chip_poll().

xtensa_prepare_resume()

int xtensa_prepare_resume	(	struct target *	target,
		int	current,
		target_addr_t	address,
		int	handle_breakpoints,
		int	debug_execution
	)

Definition at line 1593 of file xtensa.c.

References breakpoint::address, BIT, xtensa::core_config, xtensa_config::core_type, xtensa_config::debug, DEBUGCAUSE_BI, DEBUGCAUSE_BN, DEBUGCAUSE_DB, ERROR_OK, ERROR_TARGET_NOT_HALTED, xtensa::halt_request, xtensa::hw_brps, xtensa_debug_config::ibreaks_num, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, xtensa::nx_reg_idx, target::state, TARGET_ADDR_FMT, TARGET_HALTED, target_to_xtensa(), XT_IBREAKC_FB, XT_LX, XT_NX, XT_NX_REG_IDX_IBREAKC0, XT_REG_IDX_IBREAKA0, XT_REG_IDX_IBREAKENABLE, XT_REG_IDX_PC, xtensa_cause_get(), xtensa_do_step(), xtensa_reg_set(), and xtensa_write_dirty_registers().

Referenced by esp_xtensa_smp_resume(), xtensa_do_step(), and xtensa_resume().

xtensa_queue_exec_ins()

static void xtensa_queue_exec_ins ( struct xtensa *  xtensa, uint32_t  ins  )

static

Definition at line 527 of file xtensa.c.

References XDMREG_DIR0EXEC, and xtensa_queue_dbg_reg_write().

Referenced by COMMAND_HELPER(), xtensa_do_resume(), xtensa_fetch_all_regs(), xtensa_gdbqc_qxtreg(), xtensa_poll(), xtensa_read_memory(), xtensa_region_ar_exec(), xtensa_update_instruction(), xtensa_window_state_restore(), xtensa_window_state_save(), xtensa_write_dirty_registers(), and xtensa_write_memory().

xtensa_queue_exec_ins_wide()

static void xtensa_queue_exec_ins_wide ( struct xtensa *  xtensa, uint8_t *  ops, uint8_t  oplen  )

static

Definition at line 532 of file xtensa.c.

References DIV_ROUND_UP, xtensa::target, target_buffer_get_u32(), XDMREG_DIR0, XDMREG_DIR0EXEC, and xtensa_queue_dbg_reg_write().

Referenced by COMMAND_HELPER(), and xtensa_gdbqc_parse_exec_tie_ops().

xtensa_queue_pwr_reg_write()

static int xtensa_queue_pwr_reg_write ( struct xtensa *  xtensa, unsigned int  reg, uint32_t  data  )

static

Definition at line 589 of file xtensa.c.

References xtensa::dbg_mod, xtensa_debug_module::pwr_ops, and xtensa_power_ops::queue_reg_write.

Referenced by xtensa_assert_reset(), xtensa_deassert_reset(), xtensa_examine(), and xtensa_wakeup().

xtensa_read_buffer()

int xtensa_read_buffer	(	struct target *	target,
		target_addr_t	address,
		uint32_t	count,
		uint8_t *	buffer
	)

Definition at line 2081 of file xtensa.c.

References buffer, count, and xtensa_read_memory().

Referenced by xtensa_pc_in_winexc().

xtensa_read_memory()

int xtensa_read_memory	(	struct target *	target,
		target_addr_t	address,
		uint32_t	size,
		uint32_t	count,
		uint8_t *	buffer
	)

Definition at line 1998 of file xtensa.c.

References ALIGN_DOWN, ALIGN_UP, buf_bswap32(), buffer, count, xtensa::dbg_mod, target::endianness, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, LOG_DEBUG, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, xtensa::permissive_mode, xtensa::probe_lsddr32p, size, target::state, xtensa::suppress_dsr_errors, xtensa::target, TARGET_ADDR_FMT, TARGET_BIG_ENDIAN, TARGET_HALTED, target_to_xtensa(), XDMREG_DDR, XDMREG_DDREXEC, XT_INS_L32I, XT_INS_LDDR32P, XT_INS_RSR, XT_INS_WSR, XT_MEM_ACCESS_READ, XT_REG_A3, XT_REG_A4, XT_REG_IDX_A3, XT_REG_IDX_A4, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_mark_register_dirty(), xtensa_memory_op_validate_range(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), and xtensa_queue_exec_ins().

Referenced by xtensa_gdbqc_qxtreg(), and xtensa_read_buffer().

xtensa_reg_get()

xtensa_reg_val_t xtensa_reg_get	(	struct target *	target,
		enum xtensa_reg_id	reg_id
	)

Definition at line 1063 of file xtensa.c.

References xtensa::core_cache, reg_cache::reg_list, target_to_xtensa(), and xtensa_reg_get_value().

Referenced by COMMAND_HELPER(), esp_xtensa_semihosting(), xtensa_cause_get(), xtensa_do_step(), xtensa_fileio_detect_proc(), xtensa_gdb_fileio_end(), xtensa_gdbqc_qxtreg(), xtensa_get_gdb_fileio_info(), xtensa_imprecise_exception_occurred(), xtensa_poll(), xtensa_reg_set_deep_relgen(), xtensa_start_algorithm(), xtensa_wait_algorithm(), and xtensa_write_dirty_registers().

xtensa_reg_get_value()

static xtensa_reg_val_t xtensa_reg_get_value ( struct reg *  reg )

inlinestatic

Definition at line 975 of file xtensa.c.

References buf_get_u32(), and reg::value.

Referenced by xtensa_get_gdb_reg_list(), xtensa_reg_get(), xtensa_reg_set(), and xtensa_wait_algorithm().

xtensa_reg_is_readable()

static bool xtensa_reg_is_readable ( int  flags, int  cpenable  )

static

Definition at line 641 of file xtensa.c.

References BIT, XT_REGF_COPROC0, and XT_REGF_NOREAD.

Referenced by xtensa_fetch_all_regs().

xtensa_reg_set()

void xtensa_reg_set	(	struct target *	target,
		enum xtensa_reg_id	reg_id,
		xtensa_reg_val_t	value
	)

Definition at line 1070 of file xtensa.c.

References xtensa::core_cache, reg_cache::reg_list, target_to_xtensa(), reg::value, xtensa_reg_get_value(), and xtensa_reg_set_value().

Referenced by COMMAND_HELPER(), esp_xtensa_semihosting_post_result(), xtensa_breakpoint_remove(), xtensa_cause_clear(), xtensa_do_step(), xtensa_fetch_all_regs(), xtensa_gdb_fileio_end(), xtensa_imprecise_exception_clear(), xtensa_prepare_resume(), xtensa_reg_set_deep_relgen(), xtensa_start_algorithm(), xtensa_wait_algorithm(), xtensa_watchpoint_add(), and xtensa_watchpoint_remove().

xtensa_reg_set_deep_relgen()

void xtensa_reg_set_deep_relgen	(	struct target *	target,
		enum xtensa_reg_id	a_idx,
		xtensa_reg_val_t	value
	)

Definition at line 1080 of file xtensa.c.

References xtensa::core_config, xtensa_config::core_type, xtensa::nx_reg_idx, target_to_xtensa(), xtensa_config::windowed, XT_LX, XT_NX, XT_NX_REG_IDX_WB, XT_REG_IDX_WINDOWBASE, XT_WB_P_MSK, XT_WB_P_SHIFT, xtensa_reg_get(), xtensa_reg_set(), and xtensa_windowbase_offset_to_canonical().

Referenced by xtensa_gdb_fileio_end().

xtensa_reg_set_value()

static void xtensa_reg_set_value ( struct reg *  reg, xtensa_reg_val_t  value  )

inlinestatic

Definition at line 980 of file xtensa.c.

References buf_set_u32(), reg::dirty, and reg::value.

Referenced by xtensa_reg_set(), and xtensa_start_algorithm().

xtensa_region_ar_exec()

static bool xtensa_region_ar_exec ( struct target *  target, target_addr_t  start, target_addr_t  end  )

inlinestatic

Definition at line 552 of file xtensa.c.

References addr, buf_get_u32(), xtensa::core_config, xtensa::dbg_mod, xtensa_mpu_config::enabled, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, xtensa_config::mpu, start, TARGET_ADDR_FMT, target_to_xtensa(), XDMREG_DDR, XT_INS_PPTLB, XT_INS_RSR, XT_INS_WSR, XT_REG_A3, XT_SR_DDR, XT_TLB1_ACC_MSK, XT_TLB1_ACC_SHIFT, XTENSA_ACC_00X_000, XTENSA_ACC_R0X_000, XTENSA_ACC_R0X_R0X, XTENSA_ACC_RWX_000, XTENSA_ACC_RWX_R0X, XTENSA_ACC_RWX_RWX, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), and xtensa_queue_exec_ins().

Referenced by xtensa_update_instruction(), and xtensa_write_memory().

xtensa_resume()

int xtensa_resume	(	struct target *	target,
		int	current,
		target_addr_t	address,
		int	handle_breakpoints,
		int	debug_execution
	)

Definition at line 1673 of file xtensa.c.

References DBG_REASON_NOTHALTED, target::debug_reason, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, target::state, target_call_event_callbacks(), TARGET_DEBUG_RUNNING, TARGET_EVENT_RESUMED, TARGET_RUNNING, xtensa_do_resume(), and xtensa_prepare_resume().

Referenced by esp32_soc_reset(), esp32s3_soc_reset(), and xtensa_start_algorithm().

xtensa_run_algorithm()

int xtensa_run_algorithm	(	struct target *	target,
		int	num_mem_params,
		struct mem_param *	mem_params,
		int	num_reg_params,
		struct reg_param *	reg_params,
		target_addr_t	entry_point,
		target_addr_t	exit_point,
		unsigned int	timeout_ms,
		void *	arch_info
	)

Definition at line 2911 of file xtensa.c.

References reg::arch_info, ERROR_OK, xtensa_start_algorithm(), and xtensa_wait_algorithm().

xtensa_scratch_regs_fixup()

static bool xtensa_scratch_regs_fixup ( struct xtensa *  xtensa, struct reg *  reg_list, int  i, int  j, int  a_idx, int  ar_idx  )

static

Definition at line 650 of file xtensa.c.

References xtensa_keyval_info::intval, LOG_DEBUG, xtensa::scratch_ars, XT_AR_SCRATCH_A3, and XT_REG_IDX_AR0.

Referenced by xtensa_write_dirty_registers().

xtensa_set_permissive_mode()

void xtensa_set_permissive_mode	(	struct target *	target,
		bool	state
	)

Definition at line 3414 of file xtensa.c.

References xtensa::permissive_mode, state, and target_to_xtensa().

xtensa_smpbreak_get()

int xtensa_smpbreak_get	(	struct target *	target,
		uint32_t *	val
	)

Definition at line 968 of file xtensa.c.

References ERROR_OK, xtensa::smp_break, and target_to_xtensa().

Referenced by esp_xtensa_smp_resume(), and esp_xtensa_smp_smpbreak_disable().

xtensa_smpbreak_read()

int xtensa_smpbreak_read	(	struct xtensa *	xtensa,
		uint32_t *	val
	)

Definition at line 956 of file xtensa.c.

References buf_get_u32(), xtensa::dbg_mod, XDMREG_DCRSET, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), and xtensa_queue_dbg_reg_read().

Referenced by COMMAND_HELPER().

xtensa_smpbreak_set()

int xtensa_smpbreak_set	(	struct target *	target,
		uint32_t	set
	)

Definition at line 944 of file xtensa.c.

References ERROR_OK, LOG_TARGET_DEBUG, xtensa::smp_break, target::state, target_to_xtensa(), target_was_examined(), and xtensa_smpbreak_write().

Referenced by COMMAND_HELPER(), esp_xtensa_smp_smpbreak_disable(), and esp_xtensa_smp_smpbreak_restore().

xtensa_smpbreak_write()

int xtensa_smpbreak_write	(	struct xtensa *	xtensa,
		uint32_t	set
	)

Definition at line 929 of file xtensa.c.

References xtensa::dbg_mod, LOG_TARGET_DEBUG, OCDDCR_BREAKINEN, OCDDCR_BREAKOUTEN, OCDDCR_DEBUGMODEOUTEN, OCDDCR_ENABLEOCD, OCDDCR_RUNSTALLINEN, xtensa::target, XDMREG_DCRCLR, XDMREG_DCRSET, XDMREG_DSR, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), and xtensa_queue_dbg_reg_write().

Referenced by esp32s2_deassert_reset(), esp32s2_soc_reset(), xtensa_examine(), xtensa_poll(), and xtensa_smpbreak_set().

xtensa_soft_reset_halt()

int xtensa_soft_reset_halt

(

struct target *

target

)

Definition at line 1204 of file xtensa.c.

References LOG_TARGET_DEBUG, and xtensa_assert_reset().

Referenced by esp32s2_soft_reset_halt().

xtensa_start_algorithm()

int xtensa_start_algorithm	(	struct target *	target,
		int	num_mem_params,
		struct mem_param *	mem_params,
		int	num_reg_params,
		struct reg_param *	reg_params,
		target_addr_t	entry_point,
		target_addr_t	exit_point,
		void *	arch_info
	)

Definition at line 2712 of file xtensa.c.

References xtensa::algo_context_backup, buf_cpy(), buf_get_u32(), xtensa::core_cache, xtensa::core_config, xtensa_algorithm::core_mode, xtensa_config::core_type, xtensa_algorithm::ctx_debug_reason, xtensa_algorithm::ctx_ps, xtensa_config::debug, target::debug_reason, direction, xtensa::eps_dbglevel_idx, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, xtensa_debug_config::irq_level, LOG_DEBUG, LOG_ERROR, LOG_WARNING, reg_cache::num_regs, PARAM_IN, reg_cache::reg_list, reg_param::reg_name, register_get_by_name(), size, reg_param::size, reg::size, target::state, TARGET_HALTED, target_to_xtensa(), target_write_buffer(), reg::valid, reg::value, XT_LX, XT_MODE_ANY, XT_PS_RING, XT_PS_RING_GET, XT_PS_RING_MSK, xtensa_reg_get(), xtensa_reg_set(), xtensa_reg_set_value(), and xtensa_resume().

Referenced by xtensa_run_algorithm().

xtensa_step()

int xtensa_step	(	struct target *	target,
		int	current,
		target_addr_t	address,
		int	handle_breakpoints
	)

Definition at line 1934 of file xtensa.c.

References ERROR_OK, target_call_event_callbacks(), TARGET_EVENT_HALTED, and xtensa_do_step().

Referenced by esp32s2_step(), and esp_xtensa_smp_step().

xtensa_sw_breakpoint_add()

static int xtensa_sw_breakpoint_add ( struct target *  target, struct breakpoint *  breakpoint, struct xtensa_sw_breakpoint *  sw_bp  )

static

Definition at line 2517 of file xtensa.c.

References breakpoint::address, ERROR_OK, xtensa_sw_breakpoint::insn, xtensa_sw_breakpoint::insn_sz, breakpoint::length, LOG_TARGET_ERROR, MIN, xtensa_sw_breakpoint::oocd_bp, target_read_buffer(), target_to_xtensa(), XT_INS_BREAK, XT_INS_BREAKN, XT_ISNS_SZ_MAX, and xtensa_update_instruction().

Referenced by xtensa_breakpoint_add().

xtensa_sw_breakpoint_remove()

static int xtensa_sw_breakpoint_remove ( struct target *  target, struct xtensa_sw_breakpoint *  sw_bp  )

static

Definition at line 2543 of file xtensa.c.

References breakpoint::address, ERROR_OK, xtensa_sw_breakpoint::insn, xtensa_sw_breakpoint::insn_sz, LOG_TARGET_ERROR, NULL, xtensa_sw_breakpoint::oocd_bp, and xtensa_update_instruction().

Referenced by xtensa_breakpoint_remove().

xtensa_target_deinit()

void xtensa_target_deinit

(

struct target *

target

)

Definition at line 3485 of file xtensa.c.

References xtensa_keyval_info::chrval, xtensa::core_config, xtensa::dbg_mod, ERROR_OK, xtensa::hw_brps, xtensa::hw_wps, LOG_DEBUG, LOG_ERROR, NULL, OCDDCR_ENABLEOCD, xtensa::scratch_ars, xtensa::spill_buf, xtensa::sw_brps, target_to_xtensa(), target_was_examined(), XDMREG_DCRCLR, XT_AR_SCRATCH_NUM, xtensa_dm_deinit(), xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), xtensa_free_reg_cache(), and xtensa_queue_dbg_reg_write().

Referenced by esp_xtensa_target_deinit(), and xtensa_chip_target_deinit().

xtensa_target_init()

int xtensa_target_init	(	struct command_context *	cmd_ctx,
		struct target *	target
	)

Definition at line 3419 of file xtensa.c.

References xtensa::come_online_probes_num, ERROR_FAIL, xtensa::hw_brps, xtensa::hw_wps, LOG_ERROR, NULL, xtensa::probe_lsddr32p, xtensa::spill_buf, xtensa::spill_bytes, xtensa::spill_loc, xtensa::sw_brps, target_to_xtensa(), XT_HW_DBREAK_MAX_NUM, XT_HW_IBREAK_MAX_NUM, XT_SW_BREAKPOINTS_MAX_NUM, and xtensa_build_reg_cache().

Referenced by esp_xtensa_target_init(), and xtensa_chip_target_init().

xtensa_target_memory_region_find()

static const struct xtensa_local_mem_region_config* xtensa_target_memory_region_find ( struct xtensa *  xtensa, target_addr_t  address  )

inlinestatic

Returns a corresponding xtensa_local_mem_region_config from the xtensa target for a given address Returns NULL if nothing found.

Definition at line 391 of file xtensa.c.

References NULL, xtensa_get_mem_config(), XTENSA_MEM_REGS_NUM, and xtensa_memory_region_find().

Referenced by xtensa_memory_op_validate_range().

xtensa_update_instruction()

static int xtensa_update_instruction ( struct target *  target, target_addr_t  address, uint32_t  size, const uint8_t *  buffer  )

static

Definition at line 2438 of file xtensa.c.

References buffer, xtensa::core_config, xtensa::dbg_mod, xtensa_config::dcache, ERROR_FAIL, ERROR_OK, xtensa_config::icache, xtensa_cache_config::line_size, LOG_DEBUG, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, size, TARGET_ADDR_FMT, target_to_xtensa(), target_write_buffer(), XDMREG_DDR, XT_INS_DHWB, XT_INS_DHWBI, XT_INS_IHI, XT_INS_RSR, XT_REG_A3, XT_REG_IDX_A3, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_is_dcacheable(), xtensa_is_icacheable(), xtensa_mark_register_dirty(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), and xtensa_region_ar_exec().

Referenced by xtensa_sw_breakpoint_add(), and xtensa_sw_breakpoint_remove().

xtensa_wait_algorithm()

int xtensa_wait_algorithm	(	struct target *	target,
		int	num_mem_params,
		struct mem_param *	mem_params,
		int	num_reg_params,
		struct reg_param *	reg_params,
		target_addr_t	exit_point,
		unsigned int	timeout_ms,
		void *	arch_info
	)

Waits for an algorithm in the target.

Definition at line 2803 of file xtensa.c.

References xtensa::algo_context_backup, buf_cpy(), buf_get_u32(), buf_get_u64(), buf_set_u32(), xtensa::core_cache, xtensa::core_config, xtensa_config::core_type, xtensa_algorithm::ctx_debug_reason, xtensa_algorithm::ctx_ps, target::debug_reason, direction, reg::dirty, xtensa::eps_dbglevel_idx, ERROR_FAIL, ERROR_OK, ERROR_TARGET_TIMEOUT, keep_alive(), LOG_DEBUG, LOG_ERROR, LOG_TARGET_ERROR, reg::name, reg_cache::num_regs, PARAM_OUT, reg_cache::reg_list, reg_param::reg_name, register_get_by_name(), size, reg_param::size, reg::size, target::state, TARGET_ADDR_FMT, target_halt(), TARGET_HALTED, target_read_buffer(), target_to_xtensa(), target_wait_state(), reg::valid, reg::value, XT_LX, XT_REG_IDX_DEBUGCAUSE, XT_REG_IDX_PC, XT_REG_IDX_PS, xtensa_reg_get(), xtensa_reg_get_value(), xtensa_reg_set(), and xtensa_write_dirty_registers().

Referenced by xtensa_run_algorithm().

xtensa_wakeup()

int xtensa_wakeup

(

struct target *

target

)

Definition at line 915 of file xtensa.c.

References cmd, xtensa::dbg_mod, PWRCTL_CORERESET, PWRCTL_COREWAKEUP, PWRCTL_DEBUGWAKEUP, PWRCTL_JTAGDEBUGUSE, PWRCTL_MEMWAKEUP, xtensa::reset_asserted, target_to_xtensa(), XDMREG_PWRCTL, xtensa_dm_queue_execute(), xtensa_dm_queue_tdi_idle(), and xtensa_queue_pwr_reg_write().

Referenced by xtensa_poll().

xtensa_watchpoint_add()

int xtensa_watchpoint_add	(	struct target *	target,
		struct watchpoint *	watchpoint
	)

Definition at line 2636 of file xtensa.c.

References watchpoint::address, ALIGN_DOWN, BIT, xtensa::core_config, xtensa_debug_config::dbreaks_num, xtensa_config::debug, ERROR_OK, ERROR_TARGET_NOT_HALTED, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa::hw_wps, IS_ALIGNED, IS_PWR_OF_2, watchpoint::length, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, watchpoint::mask, watchpoint::rw, target::state, TARGET_ADDR_FMT, TARGET_HALTED, target_to_xtensa(), WATCHPOINT_IGNORE_DATA_VALUE_MASK, WPT_ACCESS, WPT_READ, WPT_WRITE, XT_REG_IDX_DBREAKA0, XT_REG_IDX_DBREAKC0, and xtensa_reg_set().

Referenced by esp_xtensa_smp_watchpoint_add().

xtensa_watchpoint_remove()

int xtensa_watchpoint_remove	(	struct target *	target,
		struct watchpoint *	watchpoint
	)

Definition at line 2692 of file xtensa.c.

References watchpoint::address, xtensa::core_config, xtensa_debug_config::dbreaks_num, xtensa_config::debug, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa::hw_wps, LOG_TARGET_DEBUG, LOG_TARGET_WARNING, NULL, TARGET_ADDR_FMT, target_to_xtensa(), XT_REG_IDX_DBREAKC0, and xtensa_reg_set().

Referenced by esp_xtensa_smp_watchpoint_remove().

xtensa_window_state_restore()

static void xtensa_window_state_restore ( struct target *  target, uint32_t  woe  )

static

Definition at line 627 of file xtensa.c.

References xtensa::core_config, xtensa_config::core_type, LOG_TARGET_DEBUG, target_to_xtensa(), xtensa_config::windowed, XDMREG_DDR, XT_INS_RSR, XT_INS_WSR, XT_LX, XT_REG_A3, XT_SR_DDR, XT_SR_PS, XT_SR_WB, xtensa_queue_dbg_reg_write(), and xtensa_queue_exec_ins().

Referenced by xtensa_fetch_all_regs(), and xtensa_write_dirty_registers().

xtensa_window_state_save()

static int xtensa_window_state_save ( struct target *  target, uint32_t *  woe  )

static

Definition at line 596 of file xtensa.c.

References buf_get_u32(), xtensa::core_config, xtensa_config::core_type, xtensa::dbg_mod, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, target_to_xtensa(), xtensa_config::windowed, XDMREG_DDR, XT_INS_RSR, XT_INS_WSR, XT_LX, XT_PS_WOE_MSK, XT_REG_A3, XT_SR_DDR, XT_SR_PS, XT_SR_WB, XT_WB_S_MSK, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), and xtensa_queue_exec_ins().

Referenced by xtensa_fetch_all_regs(), and xtensa_write_dirty_registers().

xtensa_windowbase_offset_to_canonical()

static enum xtensa_reg_id xtensa_windowbase_offset_to_canonical ( struct xtensa *  xtensa, enum xtensa_reg_id  reg_idx, int  windowbase  )

static

Definition at line 450 of file xtensa.c.

Referenced by xtensa_fetch_all_regs(), xtensa_reg_set_deep_relgen(), and xtensa_write_dirty_registers().

xtensa_write_buffer()

int xtensa_write_buffer	(	struct target *	target,
		target_addr_t	address,
		uint32_t	count,
		const uint8_t *	buffer
	)

Definition at line 2292 of file xtensa.c.

References buffer, count, and xtensa_write_memory().

xtensa_write_dirty_registers()

static int xtensa_write_dirty_registers ( struct target *  target )

static

Definition at line 663 of file xtensa.c.

References a3, buf_get_u32(), xtensa::core_cache, xtensa::core_config, xtensa_config::core_type, xtensa::dbg_mod, xtensa_config::debug, reg::dirty, ERROR_OK, xtensa_reg_desc::exist, xtensa_keyval_info::intval, xtensa_debug_config::irq_level, LOG_TARGET_DEBUG, LOG_WARNING, name, reg_cache::num_regs, xtensa::nx_reg_idx, xtensa::optregs, reg_cache::reg_list, xtensa_reg_desc::reg_num, xtensa::scratch_ars, target_to_xtensa(), type, xtensa_config::windowed, XDMREG_DDR, XT_AR_SCRATCH_A3, XT_AR_SCRATCH_A4, XT_AR_SCRATCH_AR3, XT_AR_SCRATCH_AR4, XT_AR_SCRATCH_NUM, XT_EPC_REG_NUM_BASE, XT_INS_JX, XT_INS_ROTW, XT_INS_RSR, XT_INS_WFR, XT_INS_WSR, XT_INS_WUR, XT_LX, XT_NUM_REGS, XT_NX, XT_NX_REG_IDX_MS, XT_NX_REG_IDX_WB, XT_PC_REG_NUM_VIRTUAL, XT_REG_A3, XT_REG_FR, XT_REG_IDX_A0, XT_REG_IDX_A15, XT_REG_IDX_A3, XT_REG_IDX_A4, XT_REG_IDX_AR0, XT_REG_IDX_ARLAST, XT_REG_IDX_CPENABLE, XT_REG_IDX_WINDOWBASE, XT_REG_SPECIAL, XT_REG_USER, XT_SR_DDR, XT_WB_P_MSK, XT_WB_P_SHIFT, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_mark_register_dirty(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), xtensa_reg_get(), xtensa_regs, xtensa_scratch_regs_fixup(), xtensa_window_state_restore(), xtensa_window_state_save(), and xtensa_windowbase_offset_to_canonical().

Referenced by COMMAND_HELPER(), xtensa_do_step(), xtensa_prepare_resume(), and xtensa_wait_algorithm().

xtensa_write_memory()

int xtensa_write_memory	(	struct target *	target,
		target_addr_t	address,
		uint32_t	size,
		uint32_t	count,
		const uint8_t *	buffer
	)

Definition at line 2087 of file xtensa.c.

References ALIGN_DOWN, ALIGN_UP, buf_bswap32(), buf_get_u32(), buffer, xtensa::core_config, count, xtensa::dbg_mod, xtensa_config::dcache, target::endianness, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, xtensa_config::icache, xtensa_cache_config::line_size, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_INFO, LOG_TARGET_WARNING, LOG_WARNING, MIN, xtensa::permissive_mode, xtensa::probe_lsddr32p, size, target::state, xtensa::suppress_dsr_errors, xtensa::target, TARGET_ADDR_FMT, TARGET_BIG_ENDIAN, TARGET_HALTED, target_to_xtensa(), XDMREG_DDR, XDMREG_DDREXEC, XT_INS_DHWBI, XT_INS_IHI, XT_INS_L32I, XT_INS_LDDR32P, XT_INS_RSR, XT_INS_S32I, XT_INS_SDDR32P, XT_INS_WSR, XT_MEM_ACCESS_WRITE, XT_REG_A3, XT_REG_A4, XT_REG_IDX_A3, XT_REG_IDX_A4, XT_SR_DDR, xtensa_core_status_check(), xtensa_dm_queue_execute(), xtensa_is_dcacheable(), xtensa_is_icacheable(), xtensa_mark_register_dirty(), xtensa_memory_op_validate_range(), xtensa_queue_dbg_reg_read(), xtensa_queue_dbg_reg_write(), xtensa_queue_exec_ins(), and xtensa_region_ar_exec().

Referenced by xtensa_gdbqc_qxtreg(), and xtensa_write_buffer().

Variable Documentation

xt_qerr

const struct xtensa_keyval_info xt_qerr[XT_QERR_NUM]

static

Initial value:

= {
    { .chrval = "E00", .intval = ERROR_FAIL },
    { .chrval = "E01", .intval = ERROR_FAIL },
    { .chrval = "E02", .intval = ERROR_COMMAND_ARGUMENT_INVALID },
    { .chrval = "E03", .intval = ERROR_FAIL },
}

Definition at line 1 of file xtensa.c.

Referenced by xtensa_gdb_query_custom(), and xtensa_gdbqc_qxtreg().

xtensa_any_command_handlers

const struct command_registration xtensa_any_command_handlers[]

static

Definition at line 4472 of file xtensa.c.

xtensa_command_handlers

const struct command_registration xtensa_command_handlers[]

Initial value:

= {
    {
        .name = "xtensa",
        .mode = COMMAND_ANY,
        .help = "Xtensa command group",
        .usage = "",
        .chain = xtensa_any_command_handlers,
    },
    COMMAND_REGISTRATION_DONE
}

Definition at line 4472 of file xtensa.c.

xtensa_extra_debug_log

const bool xtensa_extra_debug_log

static

Definition at line 342 of file xtensa.c.

Referenced by COMMAND_HELPER(), xtensa_build_reg_cache(), xtensa_fetch_all_regs(), and xtensa_get_gdb_reg_list().

xtensa_reg_type

const struct reg_arch_type xtensa_reg_type

static

Initial value:

= {
    .get = xtensa_core_reg_get,
    .set = xtensa_core_reg_set,
}

Definition at line 450 of file xtensa.c.

Referenced by xtensa_build_reg_cache().

xtensa_regs

struct xtensa_reg_desc xtensa_regs[XT_NUM_REGS]

Definition at line 1 of file xtensa.c.

Referenced by COMMAND_HELPER(), xtensa_build_reg_cache(), xtensa_fetch_all_regs(), xtensa_get_gdb_reg_list(), and xtensa_write_dirty_registers().