25 #define DID0_VER(did0) ((did0 >> 28)&0x07)
28 #define SCB_BASE 0x400FE000
53 #define FLASH_CONTROL_BASE 0x400FD000
54 #define FLASH_FMA (FLASH_CONTROL_BASE | 0x000)
55 #define FLASH_FMD (FLASH_CONTROL_BASE | 0x004)
56 #define FLASH_FMC (FLASH_CONTROL_BASE | 0x008)
57 #define FLASH_CRIS (FLASH_CONTROL_BASE | 0x00C)
58 #define FLASH_CIM (FLASH_CONTROL_BASE | 0x010)
59 #define FLASH_MISC (FLASH_CONTROL_BASE | 0x014)
60 #define FLASH_FSIZE (FLASH_CONTROL_BASE | 0xFC0)
61 #define FLASH_SSIZE (FLASH_CONTROL_BASE | 0xFC4)
70 #define FMC_WRKEY (0xA442 << 16)
71 #define FMC_COMT (1 << 3)
72 #define FMC_MERASE (1 << 2)
73 #define FMC_ERASE (1 << 1)
74 #define FMC_WRITE (1 << 0)
79 #define FLASH_FMA_PRE(x) (2 * (x))
80 #define FLASH_FMA_PPE(x) (2 * (x) + 1)
115 static const struct {
120 {0x00, 0x01,
"LM3S101"},
121 {0x00, 0x02,
"LM3S102"},
122 {0x01, 0xBF,
"LM3S1110"},
123 {0x01, 0xC3,
"LM3S1133"},
124 {0x01, 0xC5,
"LM3S1138"},
125 {0x01, 0xC1,
"LM3S1150"},
126 {0x01, 0xC4,
"LM3S1162"},
127 {0x01, 0xC2,
"LM3S1165"},
128 {0x01, 0xEC,
"LM3S1166"},
129 {0x01, 0xC6,
"LM3S1332"},
130 {0x01, 0xBC,
"LM3S1435"},
131 {0x01, 0xBA,
"LM3S1439"},
132 {0x01, 0xBB,
"LM3S1512"},
133 {0x01, 0xC7,
"LM3S1538"},
134 {0x01, 0xDB,
"LM3S1601"},
135 {0x03, 0x06,
"LM3S1607"},
136 {0x01, 0xDA,
"LM3S1608"},
137 {0x01, 0xC0,
"LM3S1620"},
138 {0x04, 0xCD,
"LM3S1621"},
139 {0x03, 0x03,
"LM3S1625"},
140 {0x03, 0x04,
"LM3S1626"},
141 {0x03, 0x05,
"LM3S1627"},
142 {0x01, 0xB3,
"LM3S1635"},
143 {0x01, 0xEB,
"LM3S1636"},
144 {0x01, 0xBD,
"LM3S1637"},
145 {0x04, 0xB1,
"LM3S1651"},
146 {0x01, 0xB9,
"LM3S1751"},
147 {0x03, 0x10,
"LM3S1776"},
148 {0x04, 0x16,
"LM3S1811"},
149 {0x04, 0x3D,
"LM3S1816"},
150 {0x01, 0xB4,
"LM3S1850"},
151 {0x01, 0xDD,
"LM3S1911"},
152 {0x01, 0xDC,
"LM3S1918"},
153 {0x01, 0xB7,
"LM3S1937"},
154 {0x01, 0xBE,
"LM3S1958"},
155 {0x01, 0xB5,
"LM3S1960"},
156 {0x01, 0xB8,
"LM3S1968"},
157 {0x01, 0xEA,
"LM3S1969"},
158 {0x04, 0xCE,
"LM3S1B21"},
159 {0x06, 0xCA,
"LM3S1C21"},
160 {0x06, 0xCB,
"LM3S1C26"},
161 {0x06, 0x98,
"LM3S1C58"},
162 {0x06, 0xB0,
"LM3S1D21"},
163 {0x06, 0xCC,
"LM3S1D26"},
164 {0x06, 0x1D,
"LM3S1F11"},
165 {0x06, 0x1B,
"LM3S1F16"},
166 {0x06, 0xAF,
"LM3S1G21"},
167 {0x06, 0x95,
"LM3S1G58"},
168 {0x06, 0x1E,
"LM3S1H11"},
169 {0x06, 0x1C,
"LM3S1H16"},
170 {0x04, 0x0F,
"LM3S1J11"},
171 {0x04, 0x3C,
"LM3S1J16"},
172 {0x04, 0x0E,
"LM3S1N11"},
173 {0x04, 0x3B,
"LM3S1N16"},
174 {0x04, 0xB2,
"LM3S1P51"},
175 {0x04, 0x9E,
"LM3S1R21"},
176 {0x04, 0xC9,
"LM3S1R26"},
177 {0x04, 0x30,
"LM3S1W16"},
178 {0x04, 0x2F,
"LM3S1Z16"},
179 {0x01, 0x51,
"LM3S2110"},
180 {0x01, 0x84,
"LM3S2139"},
181 {0x03, 0x39,
"LM3S2276"},
182 {0x01, 0xA2,
"LM3S2410"},
183 {0x01, 0x59,
"LM3S2412"},
184 {0x01, 0x56,
"LM3S2432"},
185 {0x01, 0x5A,
"LM3S2533"},
186 {0x01, 0xE1,
"LM3S2601"},
187 {0x01, 0xE0,
"LM3S2608"},
188 {0x03, 0x33,
"LM3S2616"},
189 {0x01, 0x57,
"LM3S2620"},
190 {0x01, 0x85,
"LM3S2637"},
191 {0x01, 0x53,
"LM3S2651"},
192 {0x03, 0x80,
"LM3S2671"},
193 {0x03, 0x50,
"LM3S2678"},
194 {0x01, 0xA4,
"LM3S2730"},
195 {0x01, 0x52,
"LM3S2739"},
196 {0x03, 0x3A,
"LM3S2776"},
197 {0x04, 0x6D,
"LM3S2793"},
198 {0x01, 0xE3,
"LM3S2911"},
199 {0x01, 0xE2,
"LM3S2918"},
200 {0x01, 0xED,
"LM3S2919"},
201 {0x01, 0x54,
"LM3S2939"},
202 {0x01, 0x8F,
"LM3S2948"},
203 {0x01, 0x58,
"LM3S2950"},
204 {0x01, 0x55,
"LM3S2965"},
205 {0x04, 0x6C,
"LM3S2B93"},
206 {0x06, 0x94,
"LM3S2D93"},
207 {0x06, 0x93,
"LM3S2U93"},
208 {0x00, 0x19,
"LM3S300"},
209 {0x00, 0x11,
"LM3S301"},
210 {0x00, 0x1A,
"LM3S308"},
211 {0x00, 0x12,
"LM3S310"},
212 {0x00, 0x13,
"LM3S315"},
213 {0x00, 0x14,
"LM3S316"},
214 {0x00, 0x17,
"LM3S317"},
215 {0x00, 0x15,
"LM3S328"},
216 {0x03, 0x08,
"LM3S3634"},
217 {0x03, 0x43,
"LM3S3651"},
218 {0x04, 0xC8,
"LM3S3654"},
219 {0x03, 0x44,
"LM3S3739"},
220 {0x03, 0x49,
"LM3S3748"},
221 {0x03, 0x45,
"LM3S3749"},
222 {0x04, 0x42,
"LM3S3826"},
223 {0x04, 0x41,
"LM3S3J26"},
224 {0x04, 0x40,
"LM3S3N26"},
225 {0x04, 0x3F,
"LM3S3W26"},
226 {0x04, 0x3E,
"LM3S3Z26"},
227 {0x03, 0x81,
"LM3S5632"},
228 {0x04, 0x0C,
"LM3S5651"},
229 {0x03, 0x8A,
"LM3S5652"},
230 {0x04, 0x4D,
"LM3S5656"},
231 {0x03, 0x91,
"LM3S5662"},
232 {0x03, 0x96,
"LM3S5732"},
233 {0x03, 0x97,
"LM3S5737"},
234 {0x03, 0xA0,
"LM3S5739"},
235 {0x03, 0x99,
"LM3S5747"},
236 {0x03, 0xA7,
"LM3S5749"},
237 {0x03, 0x9A,
"LM3S5752"},
238 {0x03, 0x9C,
"LM3S5762"},
239 {0x04, 0x69,
"LM3S5791"},
240 {0x04, 0x0B,
"LM3S5951"},
241 {0x04, 0x4E,
"LM3S5956"},
242 {0x04, 0x68,
"LM3S5B91"},
243 {0x06, 0x2E,
"LM3S5C31"},
244 {0x06, 0x2C,
"LM3S5C36"},
245 {0x06, 0x5E,
"LM3S5C51"},
246 {0x06, 0x5B,
"LM3S5C56"},
247 {0x06, 0x5F,
"LM3S5D51"},
248 {0x06, 0x5C,
"LM3S5D56"},
249 {0x06, 0x87,
"LM3S5D91"},
250 {0x06, 0x2D,
"LM3S5G31"},
251 {0x06, 0x1F,
"LM3S5G36"},
252 {0x06, 0x5D,
"LM3S5G51"},
253 {0x06, 0x4F,
"LM3S5G56"},
254 {0x04, 0x09,
"LM3S5K31"},
255 {0x04, 0x4A,
"LM3S5K36"},
256 {0x04, 0x0A,
"LM3S5P31"},
257 {0x04, 0x48,
"LM3S5P36"},
258 {0x04, 0xB6,
"LM3S5P3B"},
259 {0x04, 0x0D,
"LM3S5P51"},
260 {0x04, 0x4C,
"LM3S5P56"},
261 {0x04, 0x07,
"LM3S5R31"},
262 {0x04, 0x4B,
"LM3S5R36"},
263 {0x04, 0x47,
"LM3S5T36"},
264 {0x06, 0x7F,
"LM3S5U91"},
265 {0x04, 0x46,
"LM3S5Y36"},
266 {0x00, 0x2A,
"LM3S600"},
267 {0x00, 0x21,
"LM3S601"},
268 {0x00, 0x2B,
"LM3S608"},
269 {0x00, 0x22,
"LM3S610"},
270 {0x01, 0xA1,
"LM3S6100"},
271 {0x00, 0x23,
"LM3S611"},
272 {0x01, 0x74,
"LM3S6110"},
273 {0x00, 0x24,
"LM3S612"},
274 {0x00, 0x25,
"LM3S613"},
275 {0x00, 0x26,
"LM3S615"},
276 {0x00, 0x28,
"LM3S617"},
277 {0x00, 0x29,
"LM3S618"},
278 {0x00, 0x27,
"LM3S628"},
279 {0x01, 0xA5,
"LM3S6420"},
280 {0x01, 0x82,
"LM3S6422"},
281 {0x01, 0x75,
"LM3S6432"},
282 {0x01, 0x76,
"LM3S6537"},
283 {0x01, 0x71,
"LM3S6610"},
284 {0x01, 0xE7,
"LM3S6611"},
285 {0x01, 0xE6,
"LM3S6618"},
286 {0x01, 0x83,
"LM3S6633"},
287 {0x01, 0x8B,
"LM3S6637"},
288 {0x01, 0xA3,
"LM3S6730"},
289 {0x01, 0x77,
"LM3S6753"},
290 {0x01, 0xE9,
"LM3S6911"},
291 {0x01, 0xE8,
"LM3S6918"},
292 {0x01, 0x89,
"LM3S6938"},
293 {0x01, 0x72,
"LM3S6950"},
294 {0x01, 0x78,
"LM3S6952"},
295 {0x01, 0x73,
"LM3S6965"},
296 {0x06, 0xAA,
"LM3S6C11"},
297 {0x06, 0xAC,
"LM3S6C65"},
298 {0x06, 0x9F,
"LM3S6G11"},
299 {0x06, 0xAB,
"LM3S6G65"},
300 {0x00, 0x38,
"LM3S800"},
301 {0x00, 0x31,
"LM3S801"},
302 {0x00, 0x39,
"LM3S808"},
303 {0x00, 0x32,
"LM3S811"},
304 {0x00, 0x33,
"LM3S812"},
305 {0x00, 0x34,
"LM3S815"},
306 {0x00, 0x36,
"LM3S817"},
307 {0x00, 0x37,
"LM3S818"},
308 {0x00, 0x35,
"LM3S828"},
309 {0x01, 0x64,
"LM3S8530"},
310 {0x01, 0x8E,
"LM3S8538"},
311 {0x01, 0x61,
"LM3S8630"},
312 {0x01, 0x63,
"LM3S8730"},
313 {0x01, 0x8D,
"LM3S8733"},
314 {0x01, 0x86,
"LM3S8738"},
315 {0x01, 0x65,
"LM3S8930"},
316 {0x01, 0x8C,
"LM3S8933"},
317 {0x01, 0x88,
"LM3S8938"},
318 {0x01, 0xA6,
"LM3S8962"},
319 {0x01, 0x62,
"LM3S8970"},
320 {0x01, 0xD7,
"LM3S8971"},
321 {0x06, 0xAE,
"LM3S8C62"},
322 {0x06, 0xAD,
"LM3S8G62"},
323 {0x04, 0xCF,
"LM3S9781"},
324 {0x04, 0x67,
"LM3S9790"},
325 {0x04, 0x6B,
"LM3S9792"},
326 {0x04, 0x2D,
"LM3S9971"},
327 {0x04, 0x20,
"LM3S9997"},
328 {0x04, 0xD0,
"LM3S9B81"},
329 {0x04, 0x66,
"LM3S9B90"},
330 {0x04, 0x6A,
"LM3S9B92"},
331 {0x04, 0x6E,
"LM3S9B95"},
332 {0x04, 0x6F,
"LM3S9B96"},
333 {0x04, 0x1D,
"LM3S9BN2"},
334 {0x04, 0x1E,
"LM3S9BN5"},
335 {0x04, 0x1F,
"LM3S9BN6"},
336 {0x06, 0x70,
"LM3S9C97"},
337 {0x06, 0xA9,
"LM3S9D81"},
338 {0x06, 0x7E,
"LM3S9D90"},
339 {0x06, 0x92,
"LM3S9D92"},
340 {0x06, 0x9D,
"LM3S9D96"},
341 {0x06, 0x7B,
"LM3S9DN5"},
342 {0x06, 0x7C,
"LM3S9DN6"},
343 {0x06, 0x60,
"LM3S9G97"},
344 {0x06, 0x79,
"LM3S9GN5"},
345 {0x04, 0x1B,
"LM3S9L71"},
346 {0x04, 0x18,
"LM3S9L97"},
347 {0x06, 0xA8,
"LM3S9U81"},
348 {0x06, 0x7D,
"LM3S9U90"},
349 {0x06, 0x90,
"LM3S9U92"},
350 {0x06, 0x9B,
"LM3S9U96"},
351 {0x05, 0x01,
"LM4F120B2QR/TM4C1233C3PM"},
352 {0x05, 0x02,
"LM4F120C4QR/TM4C1233D5PM"},
353 {0x05, 0x03,
"LM4F120E5QR/TM4C1233E6PM"},
354 {0x05, 0x04,
"LM4F120H5QR/TM4C1233H6PM"},
355 {0x05, 0x08,
"LM4F121B2QR/TM4C1232C3PM"},
356 {0x05, 0x09,
"LM4F121C4QR/TM4C1232D5PM"},
357 {0x05, 0x0A,
"LM4F121E5QR/TM4C1232E6PM"},
358 {0x05, 0x0B,
"LM4F121H5QR/TM4C1232H6PM"},
359 {0x05, 0x10,
"LM4F110E5QR/TM4C1231E6PM"},
360 {0x05, 0x11,
"LM4F110H5QR/TM4C1231H6PM"},
361 {0x05, 0x18,
"LM4F110B2QR/TM4C1231C3PM"},
362 {0x05, 0x19,
"LM4F110C4QR/TM4C1231D5PM"},
363 {0x05, 0x20,
"LM4F111E5QR/TM4C1230E6PM"},
364 {0x05, 0x21,
"LM4F111H5QR/TM4C1230H6PM"},
365 {0x05, 0x22,
"LM4F111B2QR/TM4C1230C3PM"},
366 {0x05, 0x23,
"LM4F111C4QR/TM4C1230D5PM"},
367 {0x05, 0x30,
"LM4F112E5QC/TM4C1231E6PZ"},
368 {0x05, 0x31,
"LM4F112H5QC/TM4C1231H6PZ"},
369 {0x05, 0x35,
"LM4F112H5QD/TM4C1231H6PGE"},
370 {0x05, 0x36,
"LM4F112C4QC/TM4C1231D5PZ"},
371 {0x05, 0x40,
"LM4F130E5QR/TM4C1237E6PM"},
372 {0x05, 0x41,
"LM4F130H5QR/TM4C1237H6PM"},
373 {0x05, 0x48,
"LM4F130C4QR/TM4C1237D5PM"},
374 {0x05, 0x50,
"LM4F131E5QR/TM4C1236E6PM"},
375 {0x05, 0x51,
"LM4F131H5QR/TM4C1236H6PM"},
376 {0x05, 0x52,
"LM4F131C4QR/TM4C1236D5PM"},
377 {0x05, 0x60,
"LM4F132E5QC/TM4C1237E6PZ"},
378 {0x05, 0x61,
"LM4F132H5QC/TM4C1237H6PZ"},
379 {0x05, 0x65,
"LM4F132H5QD/TM4C1237H6PGE"},
380 {0x05, 0x66,
"LM4F132C4QC/TM4C1237D5PZ"},
381 {0x05, 0x70,
"LM4F210E5QR/TM4C123BE6PM"},
382 {0x05, 0x73,
"LM4F210H5QR/TM4C123BH6PM"},
383 {0x05, 0x80,
"LM4F211E5QR/TM4C123AE6PM"},
384 {0x05, 0x83,
"LM4F211H5QR/TM4C123AH6PM"},
385 {0x05, 0xA0,
"LM4F230E5QR/TM4C123GE6PM"},
386 {0x05, 0xA1,
"LM4F230H5QR/TM4C123GH6PM"},
387 {0x05, 0xB0,
"LM4F231E5QR/TM4C123FE6PM"},
388 {0x05, 0xB1,
"LM4F231H5QR/TM4C123FH6PM"},
389 {0x05, 0xC0,
"LM4F232E5QC/TM4C123GE6PZ"},
390 {0x05, 0xC1,
"LM4F232H5QC/TM4C123GH6PZ"},
391 {0x05, 0xC3,
"LM4F212E5QC/TM4C123BE6PZ"},
392 {0x05, 0xC4,
"LM4F212H5QC/TM4C123BH6PZ"},
393 {0x05, 0xC5,
"LM4F232H5QD/TM4C123GH6PGE"},
394 {0x05, 0xC6,
"LM4F212H5QD/TM4C123BH6PGE"},
395 {0x05, 0xD0,
"LM4F122C4QC/TM4C1233D5PZ"},
396 {0x05, 0xD1,
"LM4F122E5QC/TM4C1233E6PZ"},
397 {0x05, 0xD2,
"LM4F122H5QC/TM4C1233H6PZ"},
398 {0x05, 0xD6,
"LM4F122H5QD/TM4C1233H6PGE"},
399 {0x05, 0xE1,
"LM4FSXLH5BB"},
400 {0x05, 0xE3,
"LM4F232H5BB/TM4C123GH6ZRB"},
401 {0x05, 0xE4,
"LM4FS99H5BB"},
402 {0x05, 0xE5,
"LM4FS1AH5BB"},
403 {0x05, 0xE9,
"LM4F212H5BB/TM4C123BH6ZRB"},
404 {0x05, 0xEA,
"LM4FS1GH5BB"},
405 {0x05, 0xF0,
"TM4C123GH6ZXR"},
406 {0x0A, 0x19,
"TM4C1290NCPDT"},
407 {0x0A, 0x1B,
"TM4C1290NCZAD"},
408 {0x0A, 0x1C,
"TM4C1292NCPDT"},
409 {0x0A, 0x1E,
"TM4C1292NCZAD"},
410 {0x0A, 0x1F,
"TM4C1294NCPDT"},
411 {0x0A, 0x21,
"TM4C1294NCZAD"},
412 {0x0A, 0x22,
"TM4C1297NCZAD"},
413 {0x0A, 0x23,
"TM4C1299NCZAD"},
414 {0x0A, 0x24,
"TM4C129CNCPDT"},
415 {0x0A, 0x26,
"TM4C129CNCZAD"},
416 {0x0A, 0x27,
"TM4C129DNCPDT"},
417 {0x0A, 0x29,
"TM4C129DNCZAD"},
418 {0x0A, 0x2D,
"TM4C129ENCPDT"},
419 {0x0A, 0x2F,
"TM4C129ENCZAD"},
420 {0x0A, 0x30,
"TM4C129LNCZAD"},
421 {0x0A, 0x32,
"TM4C129XNCZAD"},
422 {0x0A, 0x34,
"TM4C1294KCPDT"},
423 {0x0A, 0x35,
"TM4C129EKCPDT"},
424 {0x0A, 0x36,
"TM4C1299KCZAD"},
425 {0x0A, 0x37,
"TM4C129XKCZAD"},
426 {0xFF, 0x00,
"Unknown Part"}
458 bank->driver_priv = stellaris_info;
463 stellaris_info->
did1 = 0;
476 if (stellaris_info->
did1 == 0)
483 "\nTI/LMI Stellaris information: Chip is "
484 "class %i (%s) %s rev %c%i\n",
488 (
int)(
'A' + ((stellaris_info->
did0 >> 8) & 0xFF)),
489 (
int)((stellaris_info->
did0) & 0xFF));
492 "did1: 0x%8.8" PRIx32
", arch: 0x%4.4" PRIx32
493 ", eproc: %s, ramsize: %" PRIu32
"k, flashsize: %" PRIu32
"k\n",
494 stellaris_info->
did1,
495 stellaris_info->
did1,
501 "master clock: %ikHz%s, "
502 "rcc is 0x%" PRIx32
", rcc2 is 0x%" PRIx32
", "
503 "pagesize: %" PRIu32
", pages: %" PRIu32,
504 (
int)(stellaris_info->
mck_freq / 1000),
507 stellaris_info->
rcc2,
523 uint32_t usecrl = (stellaris_info->
mck_freq/1000000ul-1);
571 uint32_t rcc, rcc2, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
573 unsigned long mainfreq;
576 LOG_DEBUG(
"Stellaris RCC %" PRIx32
"", rcc);
579 LOG_DEBUG(
"Stellaris RCC2 %" PRIx32
"", rcc);
582 LOG_DEBUG(
"Stellaris PLLCFG %" PRIx32
"", pllcfg);
584 stellaris_info->
rcc = rcc;
585 stellaris_info->
rcc2 = rcc2;
587 sysdiv = (rcc >> 23) & 0xF;
588 usesysdiv = (rcc >> 22) & 0x1;
589 bypass = (rcc >> 11) & 0x1;
590 oscsrc = (rcc >> 4) & 0x3;
591 xtal = (rcc >> 6) & stellaris_info->
xtal_mask;
598 if (rcc2 & (1 << 31)) {
599 sysdiv = (rcc2 >> 23) & 0x3F;
600 bypass = (rcc2 >> 11) & 0x1;
601 oscsrc = (rcc2 >> 4) & 0x7;
619 mainfreq = stellaris_info->
iosc_freq / 4;
625 stellaris_info->
mck_desc =
" (±30%)";
641 mainfreq = 200000000;
644 stellaris_info->
mck_freq = mainfreq/(1 + sysdiv);
646 stellaris_info->
mck_freq = mainfreq;
654 uint32_t did0, did1, ver, fam;
662 LOG_DEBUG(
"did0 0x%" PRIx32
", did1 0x%" PRIx32
", dc0 0x%" PRIx32
", dc1 0x%" PRIx32
"",
663 did0, did1, stellaris_info->
dc0, stellaris_info->
dc1);
666 if ((ver != 0) && (ver != 1)) {
667 LOG_WARNING(
"Unknown did0 version, cannot identify target");
672 LOG_WARNING(
"Cannot identify target as a Stellaris");
677 fam = (did1 >> 24) & 0xF;
678 if (((ver != 0) && (ver != 1)) || (fam != 0)) {
711 if (((did0 >> 8) & 0xff) < 2) {
744 stellaris_info->
did0 = did0;
745 stellaris_info->
did1 = did1;
751 stellaris_info->
num_pages = 2 * (1 + (stellaris_info->
fsize & 0xFFFF));
752 stellaris_info->
sramsiz = (1 + (stellaris_info->
ssize & 0xFFFF)) / 4;
758 stellaris_info->
pagesize = (1 << ((stellaris_info->
fsize >> 16) & 7)) * 1024;
759 stellaris_info->
num_pages = 2048 * (1 + (stellaris_info->
fsize & 0xFFFF)) /
761 stellaris_info->
sramsiz = (1 + (stellaris_info->
ssize & 0xFFFF)) / 4;
763 stellaris_info->
num_pages = 2 * (1 + (stellaris_info->
dc0 & 0xFFFF));
764 stellaris_info->
sramsiz = (1 + ((stellaris_info->
dc0 >> 16) & 0xFFFF)) / 4;
784 uint32_t flash_sizek = stellaris->
pagesize / 1024 *
789 if (stellaris->
did1 == 0)
792 for (
unsigned int i = 0; i <
bank->num_sectors; i++)
793 bank->sectors[i].is_protected = -1;
800 if (stellaris->
target_class >= 0x0a || flash_sizek > 64)
805 unsigned int page = 0, lockbitnum, lockbitcnt = flash_sizek / 2;
806 unsigned int bits_per_page = stellaris->
pagesize / 2048;
808 for (lockbitnum = 0; lockbitnum < lockbitcnt; lockbitnum += 32) {
812 for (
unsigned int i = 0; i < 32 && lockbitnum + i < lockbitcnt; i++) {
813 bool protect = !(fmppe & (1 << i));
815 bank->sectors[page++].is_protected = protect;
816 i += bits_per_page - 1;
818 bank->sectors[page++].is_protected = protect;
819 bank->sectors[page++].is_protected = protect;
831 uint32_t flash_fmc, flash_cris;
840 if (stellaris_info->
did1 == 0)
843 if ((last < first) || (last >= stellaris_info->
num_pages))
846 if ((first == 0) && (last == (stellaris_info->
num_pages - 1)))
861 for (
unsigned int banknr = first; banknr <= last; banknr++) {
873 if (flash_cris & (
AMASK)) {
874 LOG_WARNING(
"Error erasing flash page %i, flash_cris 0x%" PRIx32
"",
885 unsigned int first,
unsigned int last)
889 uint32_t flash_fmc, flash_cris;
890 unsigned int bits_per_page = stellaris->
pagesize / 2048;
898 LOG_ERROR(
"Hardware doesn't support page-level unprotect. "
899 "Try the 'recover' command.");
903 if (stellaris->
did1 == 0)
907 !((stellaris->
did0 >> 8) & 0xFF) &&
908 !((stellaris->
did0) & 0xFF)) {
909 LOG_ERROR(
"DustDevil A0 parts can't be unprotected, see errata; refusing to proceed");
913 if (!bits_per_page && (first % 2 || !(last % 2))) {
914 LOG_ERROR(
"Can't protect unaligned pages");
926 uint32_t flash_sizek = stellaris->
pagesize / 1024 *
930 if (stellaris->
target_class >= 0x0a || flash_sizek > 64)
935 unsigned int page = 0;
936 unsigned int lockbitnum, lockbitcnt = flash_sizek / 2;
938 for (lockbitnum = 0; lockbitnum < lockbitcnt; lockbitnum += 32) {
942 for (
unsigned int i = 0;
943 i < 32 && lockbitnum + i < lockbitcnt;
945 if (page >= first && page <= last)
949 if (!((i + 1) % bits_per_page))
969 if (flash_cris & (
AMASK)) {
970 LOG_WARNING(
"Error setting flash page protection, flash_cris 0x%" PRIx32
"", flash_cris);
985 0xDF, 0xF8, 0x40, 0x40,
986 0xDF, 0xF8, 0x40, 0x50,
988 0xD0, 0xF8, 0x00, 0x80,
989 0xB8, 0xF1, 0x00, 0x0F,
996 0x02, 0xF1, 0x04, 0x02,
997 0x57, 0xF8, 0x04, 0x8B,
998 0xC4, 0xF8, 0x04, 0x80,
1001 0xD4, 0xF8, 0x08, 0x80,
1002 0x18, 0xF0, 0x01, 0x0F,
1006 0x00, 0xF1, 0x08, 0x07,
1015 0x00, 0xD0, 0x0F, 0x40,
1017 0x01, 0x00, 0x42, 0xA4
1020 const uint8_t *
buffer, uint32_t
offset, uint32_t wcount)
1023 uint32_t buffer_size = 16384;
1032 static const unsigned buf_min = 128;
1035 if (wcount * 4 < buf_min)
1038 LOG_DEBUG(
"(bank=%p buffer=%p offset=%08" PRIx32
" wcount=%08" PRIx32
"",
1044 LOG_DEBUG(
"no working area for block memory writes");
1049 if (wcount * 4 < buffer_size)
1050 buffer_size = wcount * 4;
1055 if (buffer_size <= buf_min) {
1059 LOG_DEBUG(
"retry target_alloc_working_area(%s, size=%u)",
1088 LOG_ERROR(
"error %d executing stellaris flash write algorithm", retval);
1106 uint32_t address =
offset;
1107 uint32_t flash_cris, flash_fmc;
1108 uint32_t words_remaining = (
count / 4);
1109 uint32_t bytes_remaining = (
count & 0x00000003);
1110 uint32_t bytes_written = 0;
1118 LOG_DEBUG(
"(bank=%p buffer=%p offset=%08" PRIx32
" count=%08" PRIx32
"",
1121 if (stellaris_info->
did1 == 0)
1145 if (words_remaining > 0) {
1151 LOG_DEBUG(
"writing flash word-at-a-time");
1156 LOG_ERROR(
"flash writing failed with CRIS: 0x%" PRIx32
"", flash_cris);
1160 buffer += words_remaining * 4;
1161 address += words_remaining * 4;
1162 words_remaining = 0;
1166 while (words_remaining > 0) {
1167 if (!(address & 0xff))
1185 if (bytes_remaining) {
1186 uint8_t last_word[4] = {0xff, 0xff, 0xff, 0xff};
1189 memcpy(last_word,
buffer+bytes_written, bytes_remaining);
1191 if (!(address & 0xff))
1207 if (flash_cris & (
AMASK)) {
1208 LOG_DEBUG(
"flash_cris 0x%" PRIx32
"", flash_cris);
1222 if (stellaris_info->
did1 != 0)
1233 free(
bank->sectors);
1239 for (
unsigned int i = 0; i <
bank->num_sectors; i++) {
1240 bank->sectors[i].offset = i * stellaris_info->
pagesize;
1242 bank->sectors[i].is_erased = -1;
1243 bank->sectors[i].is_protected = -1;
1255 stellaris_info =
bank->driver_priv;
1263 if (stellaris_info->
did1 == 0)
1345 Jim_Eval_Named(
CMD_CTX->interp,
"catch { hla_command \"debug unlock\" }", 0, 0);
1346 if (!strcmp(Jim_GetString(Jim_GetResult(
CMD_CTX->interp),
NULL),
"0")) {
1353 LOG_ERROR(
"Can't recover Stellaris flash without SRST");
1359 for (
int i = 0; i < 5; i++) {
1381 "power cycle Stellaris chip, then restart OpenOCD.");
1389 .
name =
"mass_erase",
1391 .handler = stellaris_handle_mass_erase_command,
1393 .help =
"erase entire device",
1397 .handler = stellaris_handle_recover_command,
1400 .help =
"recover (and erase) locked device",
1406 .
name =
"stellaris",
1408 .help =
"Stellaris flash command group",
1416 .
name =
"stellaris",
1418 .flash_bank_command = stellaris_flash_bank_command,
void init_reg_param(struct reg_param *param, char *reg_name, uint32_t size, enum param_direction direction)
void destroy_reg_param(struct reg_param *param)
static struct arm * target_to_arm(struct target *target)
Convert target handle to generic ARM target state handle.
int dap_to_jtag(struct adiv5_dap *dap)
Put the debug link into JTAG mode, if the target supports it.
int dap_to_swd(struct adiv5_dap *dap)
Put the debug link into SWD mode, if the target supports it.
This defines formats and data structures used to talk to ADIv5 entities.
#define ARMV7M_COMMON_MAGIC
static void buf_set_u32(uint8_t *_buffer, unsigned first, unsigned num, uint32_t value)
Sets num bits in _buffer, starting at the first bit, using the bits in value.
void command_print_sameline(struct command_invocation *cmd, const char *format,...)
void command_print(struct command_invocation *cmd, const char *format,...)
#define CMD
Use this macro to access the command being handled, rather than accessing the variable directly.
#define CALL_COMMAND_HANDLER(name, extra ...)
Use this to macro to call a command helper (or a nested handler).
#define ERROR_COMMAND_SYNTAX_ERROR
#define CMD_ARGC
Use this macro to access the number of arguments for the command being handled, rather than accessing...
#define CMD_CTX
Use this macro to access the context of the command being handled, rather than accessing the variable...
#define COMMAND_REGISTRATION_DONE
Use this as the last entry in an array of command_registration records.
#define ERROR_FLASH_SECTOR_INVALID
#define ERROR_FLASH_BANK_NOT_PROBED
#define ERROR_FLASH_OPERATION_FAILED
#define ERROR_FLASH_DST_BREAKS_ALIGNMENT
#define ERROR_FLASH_DST_OUT_OF_BANK
int default_flash_blank_check(struct flash_bank *bank)
Provides default erased-bank check handling.
struct flash_bank * get_flash_bank_by_num_noprobe(unsigned int num)
Returns the flash bank like get_flash_bank_by_num(), without probing.
int default_flash_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
Provides default read implementation for flash memory.
void default_flash_free_driver_priv(struct flash_bank *bank)
Deallocates bank->driver_priv.
int jtag_execute_queue(void)
For software FIFO implementations, the queued commands can be executed during this call or earlier.
int adapter_deassert_reset(void)
enum reset_types jtag_get_reset_config(void)
int adapter_assert_reset(void)
#define LOG_WARNING(expr ...)
#define LOG_ERROR(expr ...)
#define LOG_INFO(expr ...)
#define LOG_DEBUG(expr ...)
static const struct command_registration stellaris_exec_command_handlers[]
static const struct @12 stellaris_parts[]
COMMAND_HANDLER(stellaris_handle_mass_erase_command)
static void stellaris_read_clock_info(struct flash_bank *bank)
Read clock configuration and set stellaris_info->usec_clocks.
static int get_stellaris_info(struct flash_bank *bank, struct command_invocation *cmd)
static const struct command_registration stellaris_command_handlers[]
static int stellaris_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
static int stellaris_protect_check(struct flash_bank *bank)
static void stellaris_set_flash_timing(struct flash_bank *bank)
static int stellaris_probe(struct flash_bank *bank)
static int stellaris_mass_erase(struct flash_bank *bank)
static const unsigned rcc_xtal[32]
static int stellaris_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last)
static int stellaris_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
const struct flash_driver stellaris_flash
static const uint8_t stellaris_write_code[]
static const char *const stellaris_classname[]
FLASH_BANK_COMMAND_HANDLER(stellaris_flash_bank_command)
static int stellaris_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t wcount)
static int stellaris_read_part_info(struct flash_bank *bank)
Represents a generic ARM core, with standard application registers.
struct adiv5_dap * dap
For targets conforming to ARM Debug Interface v5, this handle references the Debug Access Port (DAP) ...
unsigned int common_magic
When run_command is called, a new instance will be created on the stack, filled with the proper value...
Provides details of a flash bank, available either on-chip or through a major interface.
Provides the implementation-independent structure that defines all of the callbacks required by OpenO...
const char * name
Gives a human-readable name of this flash driver, This field is used to select and initialize the dri...
Describes the geometry and status of a single flash sector within a flash bank.
int target_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
int target_alloc_working_area(struct target *target, uint32_t size, struct working_area **area)
int target_write_u32(struct target *target, target_addr_t address, uint32_t value)
int target_free_working_area(struct target *target, struct working_area *area)
Free a working area.
int target_alloc_working_area_try(struct target *target, uint32_t size, struct working_area **area)
int target_run_flash_async_algorithm(struct target *target, const uint8_t *buffer, uint32_t count, int block_size, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t buffer_start, uint32_t buffer_size, uint32_t entry_point, uint32_t exit_point, void *arch_info)
Streams data to a circular buffer on target intended for consumption by code running asynchronously o...
int target_read_u32(struct target *target, target_addr_t address, uint32_t *value)
#define ERROR_TARGET_NOT_HALTED
static const char * target_name(struct target *target)
Returns the instance-specific name of the specified target.
#define ERROR_TARGET_RESOURCE_NOT_AVAILABLE