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Data Structures | |
struct | embeddedice_reg |
Functions | |
struct reg_cache * | embeddedice_build_reg_cache (struct target *target, struct arm7_9_common *arm7_9) |
Probe EmbeddedICE module and set up local records of its registers. More... | |
void | embeddedice_free_reg_cache (struct reg_cache *reg_cache) |
Free all memory allocated for EmbeddedICE register cache. More... | |
int | embeddedice_handshake (struct arm_jtag *jtag_info, int hsbit, uint32_t timeout) |
Poll DCC control register until read or write handshake completes. More... | |
int | embeddedice_read_reg (struct reg *reg) |
Queue a read for an EmbeddedICE register into the register cache, not checking the value read. More... | |
int | embeddedice_read_reg_w_check (struct reg *reg, uint8_t *check_value, uint8_t *check_mask) |
Queue a read for an EmbeddedICE register into the register cache, optionally checking the value read. More... | |
int | embeddedice_receive (struct arm_jtag *jtag_info, uint32_t *data, uint32_t size) |
Receive a block of size 32-bit words from the DCC. More... | |
int | embeddedice_send (struct arm_jtag *jtag_info, uint32_t *data, uint32_t size) |
Send a block of size 32-bit words to the DCC. More... | |
void | embeddedice_set_reg (struct reg *reg, uint32_t value) |
Queue a write for an EmbeddedICE register, updating the register cache. More... | |
int | embeddedice_setup (struct target *target) |
Initialize EmbeddedICE module, if needed. More... | |
void | embeddedice_store_reg (struct reg *reg) |
Queue a write for an EmbeddedICE register, using cached value. More... | |
void | embeddedice_write_dcc (struct jtag_tap *tap, int reg_addr, const uint8_t *buffer, int little, int count) |
This is an inner loop of the open loop DCC write of data to target. More... | |
void | embeddedice_write_reg (struct reg *reg, uint32_t value) |
Queue a write for an EmbeddedICE register, bypassing the register cache. More... | |
static void | embeddedice_write_reg_inner (struct jtag_tap *tap, int reg_addr, uint32_t value) |
anonymous enum |
Definition at line 19 of file embeddedice.h.
anonymous enum |
Enumerator | |
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EICE_DBG_CONTROL_ICEDIS | |
EICE_DBG_CONTROL_MONEN | |
EICE_DBG_CONTROL_INTDIS | |
EICE_DBG_CONTROL_DBGRQ | |
EICE_DBG_CONTROL_DBGACK |
Definition at line 39 of file embeddedice.h.
anonymous enum |
Enumerator | |
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EICE_DBG_STATUS_IJBIT | |
EICE_DBG_STATUS_ITBIT | |
EICE_DBG_STATUS_SYSCOMP | |
EICE_DBG_STATUS_IFEN | |
EICE_DBG_STATUS_DBGRQ | |
EICE_DBG_STATUS_DBGACK |
Definition at line 47 of file embeddedice.h.
anonymous enum |
Enumerator | |
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EICE_W_CTRL_ENABLE | |
EICE_W_CTRL_RANGE | |
EICE_W_CTRL_CHAIN | |
EICE_W_CTRL_EXTERN | |
EICE_W_CTRL_NTRANS | |
EICE_W_CTRL_NOPC | |
EICE_W_CTRL_MAS | |
EICE_W_CTRL_ITBIT | |
EICE_W_CTRL_NRW |
Definition at line 56 of file embeddedice.h.
anonymous enum |
Enumerator | |
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EICE_COMM_CTRL_WBIT | |
EICE_COMM_CTRL_RBIT |
Definition at line 68 of file embeddedice.h.
struct reg_cache* embeddedice_build_reg_cache | ( | struct target * | target, |
struct arm7_9_common * | arm7_9 | ||
) |
Probe EmbeddedICE module and set up local records of its registers.
Different versions of the modules have different capabilities, such as hardware support for vector_catch, single stepping, and monitor mode.
Definition at line 162 of file embeddedice.c.
References embeddedice_reg::addr, reg::arch_info, ARRAY_SIZE, buf_get_u32(), reg::dirty, EICE_COMMS_CTRL, EICE_DBG_CTRL, EICE_DBG_STAT, eice_reg_type, eice_regs, embeddedice_read_reg(), ERROR_OK, arm7_9_common::has_monitor_mode, arm7_9_common::has_single_step, arm7_9_common::has_vector_catch, jtag_execute_queue(), arm7_9_common::jtag_info, embeddedice_reg::jtag_info, LOG_ERROR, LOG_INFO, reg::name, reg_cache::name, reg_cache::next, NULL, reg_cache::num_regs, reg_cache::reg_list, reg::size, target_name(), target_type_name(), reg::type, reg::valid, reg::value, and arm7_9_common::wp_available_max.
Referenced by arm7_9_examine().
void embeddedice_free_reg_cache | ( | struct reg_cache * | reg_cache | ) |
Free all memory allocated for EmbeddedICE register cache.
Definition at line 298 of file embeddedice.c.
References reg::arch_info, reg_cache::num_regs, reg_cache::reg_list, and reg::value.
Referenced by arm7_9_deinit().
int embeddedice_handshake | ( | struct arm_jtag * | jtag_info, |
int | hsbit, | ||
uint32_t | timeout | ||
) |
Poll DCC control register until read or write handshake completes.
Definition at line 577 of file embeddedice.c.
References arm_jtag_scann(), arm_jtag_set_instr(), buf_get_u32(), EICE_COMM_CTRL_RBIT, EICE_COMM_CTRL_WBIT, EICE_COMMS_DATA, eice_regs, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, ERROR_TARGET_TIMEOUT, gettimeofday(), scan_field::in_value, arm_jtag::intest_instr, jtag_add_dr_scan(), jtag_execute_queue(), LOG_ERROR, NULL, scan_field::num_bits, scan_field::out_value, arm_jtag::tap, TAP_IDLE, timeval_add_time(), and timeval_compare().
Referenced by ocl_erase(), ocl_probe(), and ocl_write().
int embeddedice_read_reg | ( | struct reg * | reg | ) |
Queue a read for an EmbeddedICE register into the register cache, not checking the value read.
Definition at line 464 of file embeddedice.c.
References embeddedice_read_reg_w_check(), and NULL.
Referenced by arm720t_soft_reset_halt(), arm7_9_execute_sys_speed(), arm7_9_handle_target_request(), arm7_9_poll(), arm7_9_setup_semihosting(), arm7_9_soft_reset_halt(), arm7tdmi_branch_resume_thumb(), arm920t_soft_reset_halt(), arm926ejs_examine_debug_reason(), arm926ejs_soft_reset_halt(), arm9tdmi_branch_resume_thumb(), embeddedice_build_reg_cache(), and embeddedice_setup().
int embeddedice_read_reg_w_check | ( | struct reg * | reg, |
uint8_t * | check_value, | ||
uint8_t * | check_mask | ||
) |
Queue a read for an EmbeddedICE register into the register cache, optionally checking the value read.
Note that at this level, all registers are 32 bits wide.
Definition at line 342 of file embeddedice.c.
References embeddedice_reg::addr, reg::arch_info, arm_jtag_scann(), arm_jtag_set_instr(), scan_field::check_mask, scan_field::check_value, EICE_COMMS_CTRL, eice_regs, ERROR_OK, scan_field::in_value, arm_jtag::intest_instr, jtag_add_dr_scan(), jtag_add_dr_scan_check(), embeddedice_reg::jtag_info, NULL, scan_field::num_bits, scan_field::out_value, arm_jtag::tap, TAP_IDLE, and reg::value.
Referenced by arm7_9_execute_fast_sys_speed(), and embeddedice_read_reg().
int embeddedice_receive | ( | struct arm_jtag * | jtag_info, |
uint32_t * | data, | ||
uint32_t | size | ||
) |
Receive a block of size 32-bit words from the DCC.
We assume the target is always going to be fast enough (relative to the JTAG clock) that the debugger won't need to poll the handshake bit. The JTAG clock is usually at least six times slower than the functional clock, so the 50+ JTAG clocks needed to receive the word allow hundreds of instruction cycles (per word) in the target.
Definition at line 412 of file embeddedice.c.
References arm_jtag_scann(), arm_jtag_set_instr(), arm_le_to_h_u32(), EICE_COMMS_CTRL, EICE_COMMS_DATA, eice_regs, ERROR_OK, scan_field::in_value, arm_jtag::intest_instr, jtag_add_callback(), jtag_add_dr_scan(), jtag_execute_queue(), NULL, scan_field::num_bits, scan_field::out_value, size, arm_jtag::tap, and TAP_IDLE.
Referenced by arm7_9_handle_target_request(), arm7_9_target_request_data(), ocl_erase(), ocl_probe(), and ocl_write().
int embeddedice_send | ( | struct arm_jtag * | jtag_info, |
uint32_t * | data, | ||
uint32_t | size | ||
) |
Send a block of size 32-bit words to the DCC.
We assume the target is always going to be fast enough (relative to the JTAG clock) that the debugger won't need to poll the handshake bit. The JTAG clock is usually at least six times slower than the functional clock, so the 50+ JTAG clocks needed to receive the word allow hundreds of instruction cycles (per word) in the target.
Definition at line 532 of file embeddedice.c.
References arm_jtag_scann(), arm_jtag_set_instr(), buf_set_u32(), EICE_COMMS_DATA, eice_regs, ERROR_OK, scan_field::in_value, arm_jtag::intest_instr, jtag_add_dr_scan(), NULL, scan_field::num_bits, scan_field::out_value, size, arm_jtag::tap, and TAP_IDLE.
Referenced by ocl_erase(), ocl_probe(), and ocl_write().
void embeddedice_set_reg | ( | struct reg * | reg, |
uint32_t | value | ||
) |
Queue a write for an EmbeddedICE register, updating the register cache.
Uses embeddedice_write_reg().
Definition at line 473 of file embeddedice.c.
References buf_set_u32(), reg::dirty, embeddedice_write_reg(), reg::size, reg::valid, and reg::value.
Referenced by arm7_9_set_breakpoint(), arm7_9_set_software_breakpoints(), arm7_9_set_watchpoint(), arm7_9_unset_breakpoint(), arm7_9_unset_watchpoint(), and embeddedice_set_reg_w_exec().
int embeddedice_setup | ( | struct target * | target | ) |
Initialize EmbeddedICE module, if needed.
Definition at line 314 of file embeddedice.c.
References buf_set_u32(), arm7_9_common::eice_cache, EICE_DBG_CTRL, embeddedice_read_reg(), embeddedice_set_reg_w_exec(), ERROR_OK, arm7_9_common::has_monitor_mode, jtag_execute_queue(), reg_cache::reg_list, target_to_arm7_9(), and reg::value.
Referenced by arm7_9_examine().
void embeddedice_store_reg | ( | struct reg * | reg | ) |
Queue a write for an EmbeddedICE register, using cached value.
Uses embeddedice_write_reg().
Definition at line 519 of file embeddedice.c.
References buf_get_u32(), embeddedice_write_reg(), reg::size, and reg::value.
Referenced by arm7_9_clear_halt(), arm7_9_debug_entry(), arm7_9_disable_eice_step(), arm7_9_halt(), arm7_9_setup_semihosting(), arm7_9_soft_reset_halt(), arm7_9_write_memory(), arm9tdmi_disable_single_step(), arm9tdmi_enable_single_step(), feroceon_disable_single_step(), and feroceon_set_dbgrq().
void embeddedice_write_dcc | ( | struct jtag_tap * | tap, |
int | reg_addr, | ||
const uint8_t * | buffer, | ||
int | little, | ||
int | count | ||
) |
This is an inner loop of the open loop DCC write of data to target.
Definition at line 640 of file embeddedice.c.
References buffer, count, embeddedice_write_reg_inner(), and fast_target_buffer_get_u32().
Referenced by arm7_9_dcc_completion().
void embeddedice_write_reg | ( | struct reg * | reg, |
uint32_t | value | ||
) |
Queue a write for an EmbeddedICE register, bypassing the register cache.
Definition at line 501 of file embeddedice.c.
References embeddedice_reg::addr, reg::arch_info, arm_jtag_scann(), arm_jtag_set_instr(), embeddedice_write_reg_inner(), arm_jtag::intest_instr, embeddedice_reg::jtag_info, LOG_DEBUG, NULL, arm_jtag::tap, and TAP_IDLE.
Referenced by arm7_9_assert_reset(), arm7_9_clear_watchpoints(), arm7_9_dcc_completion(), arm7_9_enable_eice_step(), arm7_9_halt(), arm7_9_resume(), embeddedice_set_reg(), embeddedice_store_reg(), feroceon_bulk_write_memory(), and feroceon_enable_single_step().
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inlinestatic |
Definition at line 101 of file embeddedice.h.
References buf_set_u32(), jtag_add_dr_scan(), scan_field::num_bits, scan_field::out_value, and TAP_IDLE.
Referenced by embeddedice_write_dcc(), and embeddedice_write_reg().