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Macros | |
#define | CACHE_LEVEL_HAS_D_CACHE 0x2 |
#define | CACHE_LEVEL_HAS_I_CACHE 0x1 |
#define | CACHE_LEVEL_HAS_UNIFIED_CACHE 0x4 |
Functions | |
int | armv7a_cache_auto_flush_all_data (struct target *target) |
int | armv7a_cache_auto_flush_on_write (struct target *target, uint32_t virt, uint32_t size) |
int | armv7a_cache_flush_virt (struct target *target, uint32_t virt, uint32_t size) |
int | armv7a_l1_d_cache_clean_virt (struct target *target, uint32_t virt, unsigned int size) |
int | armv7a_l1_d_cache_flush_virt (struct target *target, uint32_t virt, unsigned int size) |
int | armv7a_l1_d_cache_inval_virt (struct target *target, uint32_t virt, uint32_t size) |
int | armv7a_l1_i_cache_inval_all (struct target *target) |
int | armv7a_l1_i_cache_inval_virt (struct target *target, uint32_t virt, uint32_t size) |
Variables | |
const struct command_registration | arm7a_cache_command_handlers [] |
#define CACHE_LEVEL_HAS_D_CACHE 0x2 |
Definition at line 32 of file armv7a_cache.h.
#define CACHE_LEVEL_HAS_I_CACHE 0x1 |
Definition at line 33 of file armv7a_cache.h.
#define CACHE_LEVEL_HAS_UNIFIED_CACHE 0x4 |
Definition at line 31 of file armv7a_cache.h.
int armv7a_cache_auto_flush_all_data | ( | struct target * | target | ) |
Definition at line 121 of file armv7a_cache.c.
References arm7a_l2x_flush_all_data(), armv7a_mmu_common::armv7a_cache, armv7a_l1_d_cache_clean_inval_all(), armv7a_common::armv7a_mmu, armv7a_cache_common::auto_cache_enabled, ERROR_FAIL, ERROR_OK, foreach_smp_target, target::smp, target::smp_targets, target::state, target_list::target, TARGET_HALTED, and target_to_armv7a().
Referenced by armv7a_identify_cache().
int armv7a_cache_auto_flush_on_write | ( | struct target * | target, |
uint32_t | virt, | ||
uint32_t | size | ||
) |
Definition at line 404 of file armv7a_cache.c.
References armv7a_mmu_common::armv7a_cache, armv7a_cache_flush_virt(), armv7a_common::armv7a_mmu, armv7a_cache_common::auto_cache_enabled, ERROR_OK, size, and target_to_armv7a().
Referenced by cortex_a_write_memory().
int armv7a_cache_flush_virt | ( | struct target * | target, |
uint32_t | virt, | ||
uint32_t | size | ||
) |
Definition at line 385 of file armv7a_cache.c.
References armv7a_l1_d_cache_flush_virt(), armv7a_l2x_cache_flush_virt(), ERROR_OK, and size.
Referenced by armv7a_cache_auto_flush_on_write(), cortex_a_set_breakpoint(), and cortex_a_unset_breakpoint().
int armv7a_l1_d_cache_clean_virt | ( | struct target * | target, |
uint32_t | virt, | ||
unsigned int | size | ||
) |
Definition at line 211 of file armv7a_cache.c.
References armv7a_common::arm, ARMV4_5_MCR, armv7a_mmu_common::armv7a_cache, armv7a_l1_d_cache_sanity_check(), armv7a_common::armv7a_mmu, armv7a_cache_common::dminline, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, keep_alive(), LOG_ERROR, arm_dpm::prepare, size, and target_to_armv7a().
Referenced by COMMAND_HANDLER().
int armv7a_l1_d_cache_flush_virt | ( | struct target * | target, |
uint32_t | virt, | ||
unsigned int | size | ||
) |
Definition at line 255 of file armv7a_cache.c.
References armv7a_common::arm, ARMV4_5_MCR, armv7a_mmu_common::armv7a_cache, armv7a_l1_d_cache_sanity_check(), armv7a_common::armv7a_mmu, armv7a_cache_common::dminline, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, keep_alive(), LOG_ERROR, arm_dpm::prepare, size, and target_to_armv7a().
Referenced by armv7a_cache_flush_virt().
int armv7a_l1_d_cache_inval_virt | ( | struct target * | target, |
uint32_t | virt, | ||
uint32_t | size | ||
) |
Definition at line 147 of file armv7a_cache.c.
References armv7a_common::arm, ARMV4_5_MCR, armv7a_mmu_common::armv7a_cache, armv7a_l1_d_cache_sanity_check(), armv7a_common::armv7a_mmu, armv7a_cache_common::dminline, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, keep_alive(), LOG_ERROR, arm_dpm::prepare, size, and target_to_armv7a().
Referenced by COMMAND_HANDLER(), cortex_a_set_breakpoint(), and cortex_a_unset_breakpoint().
int armv7a_l1_i_cache_inval_all | ( | struct target * | target | ) |
Definition at line 299 of file armv7a_cache.c.
References armv7a_common::arm, ARMV4_5_MCR, armv7a_l1_i_cache_sanity_check(), arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, LOG_ERROR, arm_dpm::prepare, target::smp, and target_to_armv7a().
Referenced by COMMAND_HANDLER().
int armv7a_l1_i_cache_inval_virt | ( | struct target * | target, |
uint32_t | virt, | ||
uint32_t | size | ||
) |
Definition at line 336 of file armv7a_cache.c.
References armv7a_common::arm, ARMV4_5_MCR, armv7a_mmu_common::armv7a_cache, armv7a_l1_i_cache_sanity_check(), armv7a_common::armv7a_mmu, arm::dpm, ERROR_OK, arm_dpm::finish, armv7a_cache_common::iminline, arm_dpm::instr_write_data_r0, keep_alive(), LOG_ERROR, arm_dpm::prepare, size, and target_to_armv7a().
Referenced by COMMAND_HANDLER(), cortex_a_set_breakpoint(), and cortex_a_unset_breakpoint().
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extern |
Definition at line 496 of file armv7a_cache.c.