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armv8.h File Reference
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Data Structures

struct  armv8_arch_cache
 
struct  armv8_cache_common
 
struct  armv8_cachesize
 
struct  armv8_common
 
struct  armv8_l2x_cache
 
struct  armv8_mmu_common
 

Macros

#define ARMV8_COMMON_MAGIC   0x0A450AAAU
 
#define CPUV8_DBG_AUTHSTATUS   0xFB8
 
#define CPUV8_DBG_BCR_BASE   0x408
 
#define CPUV8_DBG_BVR_BASE   0x400
 
#define CPUV8_DBG_CPUFEATURE0   0xD20
 
#define CPUV8_DBG_DBGFEATURE0   0xD28
 
#define CPUV8_DBG_DRCR   0x090
 
#define CPUV8_DBG_DSCR   0x088
 
#define CPUV8_DBG_DTRRX   0x080
 
#define CPUV8_DBG_DTRTX   0x08c
 
#define CPUV8_DBG_ECCR   0x098
 
#define CPUV8_DBG_EDECR   0x24
 
#define CPUV8_DBG_EDESR   0x20
 
#define CPUV8_DBG_EDWAR0   0x30
 
#define CPUV8_DBG_EDWAR1   0x34
 
#define CPUV8_DBG_ITR   0x084
 
#define CPUV8_DBG_LOCKACCESS   0xFB0
 
#define CPUV8_DBG_LOCKSTATUS   0xFB4
 
#define CPUV8_DBG_MAINID0   0xD00
 
#define CPUV8_DBG_MEMFEATURE0   0xD38
 
#define CPUV8_DBG_OSLAR   0x300
 
#define CPUV8_DBG_PRCR   0x310
 
#define CPUV8_DBG_PRSR   0x314
 
#define CPUV8_DBG_SCR   0x088
 
#define CPUV8_DBG_VCR   0x01C
 
#define CPUV8_DBG_WCR_BASE   0x808
 
#define CPUV8_DBG_WVR_BASE   0x800
 
#define PAGE_SIZE_4KB   0x1000
 
#define PAGE_SIZE_4KB_LEVEL0_BITS   39
 
#define PAGE_SIZE_4KB_LEVEL0_MASK   ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL0_BITS)
 
#define PAGE_SIZE_4KB_LEVEL1_BITS   30
 
#define PAGE_SIZE_4KB_LEVEL1_MASK   ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL1_BITS)
 
#define PAGE_SIZE_4KB_LEVEL2_BITS   21
 
#define PAGE_SIZE_4KB_LEVEL2_MASK   ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL2_BITS)
 
#define PAGE_SIZE_4KB_LEVEL3_BITS   12
 
#define PAGE_SIZE_4KB_LEVEL3_MASK   ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL3_BITS)
 
#define PAGE_SIZE_4KB_TRBBASE_MASK   0xFFFFFFFFF000
 
#define V2PCWPR   0
 
#define V2PCWPW   1
 
#define V2PCWUR   2
 
#define V2PCWUW   3
 
#define V2POWPR   4
 
#define V2POWPW   5
 
#define V2POWUR   6
 
#define V2POWUW   7
 

Enumerations

enum  {
  ARMV8_R0 = 0 , ARMV8_R1 , ARMV8_R2 , ARMV8_R3 ,
  ARMV8_R4 , ARMV8_R5 , ARMV8_R6 , ARMV8_R7 ,
  ARMV8_R8 , ARMV8_R9 , ARMV8_R10 , ARMV8_R11 ,
  ARMV8_R12 , ARMV8_R13 , ARMV8_R14 , ARMV8_R15 ,
  ARMV8_R16 , ARMV8_R17 , ARMV8_R18 , ARMV8_R19 ,
  ARMV8_R20 , ARMV8_R21 , ARMV8_R22 , ARMV8_R23 ,
  ARMV8_R24 , ARMV8_R25 , ARMV8_R26 , ARMV8_R27 ,
  ARMV8_R28 , ARMV8_R29 , ARMV8_R30 , ARMV8_SP = 31 ,
  ARMV8_PC = 32 , ARMV8_XPSR = 33 , ARMV8_V0 = 34 , ARMV8_V1 ,
  ARMV8_V2 , ARMV8_V3 , ARMV8_V4 , ARMV8_V5 ,
  ARMV8_V6 , ARMV8_V7 , ARMV8_V8 , ARMV8_V9 ,
  ARMV8_V10 , ARMV8_V11 , ARMV8_V12 , ARMV8_V13 ,
  ARMV8_V14 , ARMV8_V15 , ARMV8_V16 , ARMV8_V17 ,
  ARMV8_V18 , ARMV8_V19 , ARMV8_V20 , ARMV8_V21 ,
  ARMV8_V22 , ARMV8_V23 , ARMV8_V24 , ARMV8_V25 ,
  ARMV8_V26 , ARMV8_V27 , ARMV8_V28 , ARMV8_V29 ,
  ARMV8_V30 , ARMV8_V31 , ARMV8_FPSR , ARMV8_FPCR ,
  ARMV8_ELR_EL1 = 68 , ARMV8_ESR_EL1 = 69 , ARMV8_SPSR_EL1 = 70 , ARMV8_ELR_EL2 = 71 ,
  ARMV8_ESR_EL2 = 72 , ARMV8_SPSR_EL2 = 73 , ARMV8_ELR_EL3 = 74 , ARMV8_ESR_EL3 = 75 ,
  ARMV8_SPSR_EL3 = 76 , ARMV8_PAUTH_DMASK = 77 , ARMV8_PAUTH_CMASK = 78 , ARMV8_LAST_REG
}
 
enum  run_control_op { ARMV8_RUNCONTROL_UNKNOWN = 0 , ARMV8_RUNCONTROL_RESUME = 1 , ARMV8_RUNCONTROL_HALT = 2 , ARMV8_RUNCONTROL_STEP = 3 }
 

Functions

int armv8_arch_state (struct target *target)
 
static unsigned int armv8_curel_from_core_mode (enum arm_mode core_mode)
 
void armv8_free_reg_cache (struct target *target)
 
int armv8_handle_cache_info_command (struct command_invocation *cmd, struct armv8_cache_common *armv8_cache)
 
int armv8_identify_cache (struct armv8_common *armv8)
 
int armv8_init_arch_info (struct target *target, struct armv8_common *armv8)
 
int armv8_mmu_translate_va (struct target *target, target_addr_t va, target_addr_t *val)
 
int armv8_mmu_translate_va_pa (struct target *target, target_addr_t va, target_addr_t *val, int meminfo)
 
const char * armv8_mode_name (unsigned int psr_mode)
 Map PSR mode bits to the name of an ARM processor operating mode. More...
 
int armv8_read_mpidr (struct armv8_common *armv8)
 
void armv8_select_reg_access (struct armv8_common *armv8, bool is_aarch64)
 
void armv8_set_cpsr (struct arm *arm, uint32_t cpsr)
 Configures host-side ARM records to reflect the specified CPSR. More...
 
int armv8_set_dbgreg_bits (struct armv8_common *armv8, unsigned int reg, unsigned long mask, unsigned long value)
 
static bool is_armv8 (struct armv8_common *armv8)
 
static struct armv8_common * target_to_armv8 (struct target *target)
 

Variables

const struct command_registration armv8_command_handlers []
 

Macro Definition Documentation

◆ ARMV8_COMMON_MAGIC

#define ARMV8_COMMON_MAGIC   0x0A450AAAU

Definition at line 115 of file armv8.h.

◆ CPUV8_DBG_AUTHSTATUS

#define CPUV8_DBG_AUTHSTATUS   0xFB8

Definition at line 280 of file armv8.h.

◆ CPUV8_DBG_BCR_BASE

#define CPUV8_DBG_BCR_BASE   0x408

Definition at line 273 of file armv8.h.

◆ CPUV8_DBG_BVR_BASE

#define CPUV8_DBG_BVR_BASE   0x400

Definition at line 272 of file armv8.h.

◆ CPUV8_DBG_CPUFEATURE0

#define CPUV8_DBG_CPUFEATURE0   0xD20

Definition at line 250 of file armv8.h.

◆ CPUV8_DBG_DBGFEATURE0

#define CPUV8_DBG_DBGFEATURE0   0xD28

Definition at line 251 of file armv8.h.

◆ CPUV8_DBG_DRCR

#define CPUV8_DBG_DRCR   0x090

Definition at line 262 of file armv8.h.

◆ CPUV8_DBG_DSCR

#define CPUV8_DBG_DSCR   0x088

Definition at line 261 of file armv8.h.

◆ CPUV8_DBG_DTRRX

#define CPUV8_DBG_DTRRX   0x080

Definition at line 267 of file armv8.h.

◆ CPUV8_DBG_DTRTX

#define CPUV8_DBG_DTRTX   0x08c

Definition at line 270 of file armv8.h.

◆ CPUV8_DBG_ECCR

#define CPUV8_DBG_ECCR   0x098

Definition at line 263 of file armv8.h.

◆ CPUV8_DBG_EDECR

#define CPUV8_DBG_EDECR   0x24

Definition at line 258 of file armv8.h.

◆ CPUV8_DBG_EDESR

#define CPUV8_DBG_EDESR   0x20

Definition at line 257 of file armv8.h.

◆ CPUV8_DBG_EDWAR0

#define CPUV8_DBG_EDWAR0   0x30

Definition at line 259 of file armv8.h.

◆ CPUV8_DBG_EDWAR1

#define CPUV8_DBG_EDWAR1   0x34

Definition at line 260 of file armv8.h.

◆ CPUV8_DBG_ITR

#define CPUV8_DBG_ITR   0x084

Definition at line 268 of file armv8.h.

◆ CPUV8_DBG_LOCKACCESS

#define CPUV8_DBG_LOCKACCESS   0xFB0

Definition at line 254 of file armv8.h.

◆ CPUV8_DBG_LOCKSTATUS

#define CPUV8_DBG_LOCKSTATUS   0xFB4

Definition at line 255 of file armv8.h.

◆ CPUV8_DBG_MAINID0

#define CPUV8_DBG_MAINID0   0xD00

Definition at line 249 of file armv8.h.

◆ CPUV8_DBG_MEMFEATURE0

#define CPUV8_DBG_MEMFEATURE0   0xD38

Definition at line 252 of file armv8.h.

◆ CPUV8_DBG_OSLAR

#define CPUV8_DBG_OSLAR   0x300

Definition at line 278 of file armv8.h.

◆ CPUV8_DBG_PRCR

#define CPUV8_DBG_PRCR   0x310

Definition at line 264 of file armv8.h.

◆ CPUV8_DBG_PRSR

#define CPUV8_DBG_PRSR   0x314

Definition at line 265 of file armv8.h.

◆ CPUV8_DBG_SCR

#define CPUV8_DBG_SCR   0x088

Definition at line 269 of file armv8.h.

◆ CPUV8_DBG_VCR

#define CPUV8_DBG_VCR   0x01C

Definition at line 276 of file armv8.h.

◆ CPUV8_DBG_WCR_BASE

#define CPUV8_DBG_WCR_BASE   0x808

Definition at line 275 of file armv8.h.

◆ CPUV8_DBG_WVR_BASE

#define CPUV8_DBG_WVR_BASE   0x800

Definition at line 274 of file armv8.h.

◆ PAGE_SIZE_4KB

#define PAGE_SIZE_4KB   0x1000

Definition at line 282 of file armv8.h.

◆ PAGE_SIZE_4KB_LEVEL0_BITS

#define PAGE_SIZE_4KB_LEVEL0_BITS   39

Definition at line 283 of file armv8.h.

◆ PAGE_SIZE_4KB_LEVEL0_MASK

#define PAGE_SIZE_4KB_LEVEL0_MASK   ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL0_BITS)

Definition at line 288 of file armv8.h.

◆ PAGE_SIZE_4KB_LEVEL1_BITS

#define PAGE_SIZE_4KB_LEVEL1_BITS   30

Definition at line 284 of file armv8.h.

◆ PAGE_SIZE_4KB_LEVEL1_MASK

#define PAGE_SIZE_4KB_LEVEL1_MASK   ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL1_BITS)

Definition at line 289 of file armv8.h.

◆ PAGE_SIZE_4KB_LEVEL2_BITS

#define PAGE_SIZE_4KB_LEVEL2_BITS   21

Definition at line 285 of file armv8.h.

◆ PAGE_SIZE_4KB_LEVEL2_MASK

#define PAGE_SIZE_4KB_LEVEL2_MASK   ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL2_BITS)

Definition at line 290 of file armv8.h.

◆ PAGE_SIZE_4KB_LEVEL3_BITS

#define PAGE_SIZE_4KB_LEVEL3_BITS   12

Definition at line 286 of file armv8.h.

◆ PAGE_SIZE_4KB_LEVEL3_MASK

#define PAGE_SIZE_4KB_LEVEL3_MASK   ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL3_BITS)

Definition at line 291 of file armv8.h.

◆ PAGE_SIZE_4KB_TRBBASE_MASK

#define PAGE_SIZE_4KB_TRBBASE_MASK   0xFFFFFFFFF000

Definition at line 293 of file armv8.h.

◆ V2PCWPR

#define V2PCWPR   0

Definition at line 118 of file armv8.h.

◆ V2PCWPW

#define V2PCWPW   1

Definition at line 119 of file armv8.h.

◆ V2PCWUR

#define V2PCWUR   2

Definition at line 120 of file armv8.h.

◆ V2PCWUW

#define V2PCWUW   3

Definition at line 121 of file armv8.h.

◆ V2POWPR

#define V2POWPR   4

Definition at line 122 of file armv8.h.

◆ V2POWPW

#define V2POWPW   5

Definition at line 123 of file armv8.h.

◆ V2POWUR

#define V2POWUR   6

Definition at line 124 of file armv8.h.

◆ V2POWUW

#define V2POWUW   7

Definition at line 125 of file armv8.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
ARMV8_R0 
ARMV8_R1 
ARMV8_R2 
ARMV8_R3 
ARMV8_R4 
ARMV8_R5 
ARMV8_R6 
ARMV8_R7 
ARMV8_R8 
ARMV8_R9 
ARMV8_R10 
ARMV8_R11 
ARMV8_R12 
ARMV8_R13 
ARMV8_R14 
ARMV8_R15 
ARMV8_R16 
ARMV8_R17 
ARMV8_R18 
ARMV8_R19 
ARMV8_R20 
ARMV8_R21 
ARMV8_R22 
ARMV8_R23 
ARMV8_R24 
ARMV8_R25 
ARMV8_R26 
ARMV8_R27 
ARMV8_R28 
ARMV8_R29 
ARMV8_R30 
ARMV8_SP 
ARMV8_PC 
ARMV8_XPSR 
ARMV8_V0 
ARMV8_V1 
ARMV8_V2 
ARMV8_V3 
ARMV8_V4 
ARMV8_V5 
ARMV8_V6 
ARMV8_V7 
ARMV8_V8 
ARMV8_V9 
ARMV8_V10 
ARMV8_V11 
ARMV8_V12 
ARMV8_V13 
ARMV8_V14 
ARMV8_V15 
ARMV8_V16 
ARMV8_V17 
ARMV8_V18 
ARMV8_V19 
ARMV8_V20 
ARMV8_V21 
ARMV8_V22 
ARMV8_V23 
ARMV8_V24 
ARMV8_V25 
ARMV8_V26 
ARMV8_V27 
ARMV8_V28 
ARMV8_V29 
ARMV8_V30 
ARMV8_V31 
ARMV8_FPSR 
ARMV8_FPCR 
ARMV8_ELR_EL1 
ARMV8_ESR_EL1 
ARMV8_SPSR_EL1 
ARMV8_ELR_EL2 
ARMV8_ESR_EL2 
ARMV8_SPSR_EL2 
ARMV8_ELR_EL3 
ARMV8_ESR_EL3 
ARMV8_SPSR_EL3 
ARMV8_PAUTH_DMASK 
ARMV8_PAUTH_CMASK 
ARMV8_LAST_REG 

Definition at line 17 of file armv8.h.

◆ run_control_op

enum run_control_op
Enumerator
ARMV8_RUNCONTROL_UNKNOWN 
ARMV8_RUNCONTROL_RESUME 
ARMV8_RUNCONTROL_HALT 
ARMV8_RUNCONTROL_STEP 

Definition at line 108 of file armv8.h.

Function Documentation

◆ armv8_arch_state()

int armv8_arch_state ( struct target *  target)

Definition at line 1329 of file armv8.c.

◆ armv8_curel_from_core_mode()

static unsigned int armv8_curel_from_core_mode ( enum arm_mode  core_mode)
inlinestatic

Definition at line 308 of file armv8.h.

References ARM_MODE_ABT, ARM_MODE_FIQ, ARM_MODE_IRQ, ARM_MODE_MON, ARM_MODE_SVC, ARM_MODE_SYS, ARM_MODE_UND, and ARM_MODE_USR.

Referenced by armv8_dpm_read_current_registers(), armv8_dpm_write_dirty_registers(), armv8_identify_cache(), armv8_mmu_translate_va_pa(), armv8_read_mpidr(), armv8_read_reg(), armv8_read_ttbcr(), and armv8_write_reg().

◆ armv8_free_reg_cache()

void armv8_free_reg_cache ( struct target *  target)

Definition at line 1916 of file armv8.c.

Referenced by aarch64_deinit_target().

◆ armv8_handle_cache_info_command()

int armv8_handle_cache_info_command ( struct command_invocation *  cmd,
struct armv8_cache_common *  armv8_cache 
)

Definition at line 1271 of file armv8.c.

References cmd, command_print(), armv8_cache_common::display_cache_info, ERROR_OK, and armv8_cache_common::info.

Referenced by COMMAND_HANDLER().

◆ armv8_identify_cache()

int armv8_identify_cache ( struct armv8_common *  armv8)

Definition at line 297 of file armv8_cache.c.

References armv8_cache_common::arch, armv8_common::arm, ARM_MODE_ANY, ARMV8_64_EL1H, armv8_mmu_common::armv8_cache, armv8_curel_from_core_mode(), armv8_dpm_modeswitch(), armv8_flush_all_data(), armv8_handle_inner_cache_info_command(), armv8_common::armv8_mmu, armv8_cachesize::associativity, CACHE_LEVEL_HAS_D_CACHE, CACHE_LEVEL_HAS_I_CACHE, CACHE_LEVEL_HAS_UNIFIED_CACHE, armv8_cachesize::cachesize, arm::core_mode, armv8_arch_cache::ctype, armv8_arch_cache::d_u_size, decode_cache_reg(), armv8_cache_common::display_cache_info, armv8_cache_common::dminline, arm::dpm, ERROR_FAIL, ERROR_OK, arm_dpm::finish, armv8_cache_common::flush_all_data_cache, get_cache_info(), armv8_arch_cache::i_size, armv8_cache_common::iminline, armv8_cachesize::index, armv8_cachesize::index_shift, armv8_cache_common::info, arm_dpm::instr_read_data_r0, arm_dpm::instr_write_data_r0, armv8_cachesize::linelen, armv8_cache_common::loc, LOG_DEBUG, arm_dpm::prepare, READ_REG_CLIDR, READ_REG_CSSELR, READ_REG_CTR, SYSTEM_CUREL_EL1, armv8_cachesize::way, armv8_cachesize::way_shift, and WRITE_REG_CSSELR.

Referenced by aarch64_post_debug_entry().

◆ armv8_init_arch_info()

int armv8_init_arch_info ( struct target *  target,
struct armv8_common *  armv8 
)

Definition at line 1289 of file armv8.c.

References arm::arch_info, target::arch_info, armv8_common::arm, ARM_COMMON_MAGIC, armv8_mmu_common::armv8_cache, ARMV8_COMMON_MAGIC, armv8_common::armv8_mmu, armv8_setup_semihosting(), arm::common_magic, armv8_common::common_magic, armv8_cache_common::display_cache_info, ERROR_OK, armv8_cache_common::flush_all_data_cache, armv8_cache_common::info, armv8_cache_common::l2_cache, NULL, arm::setup_semihosting, target, and arm::target.

Referenced by aarch64_init_arch_info().

◆ armv8_mmu_translate_va()

int armv8_mmu_translate_va ( struct target *  target,
target_addr_t  va,
target_addr_t *  val 
)

Definition at line 1025 of file armv8.c.

References ERROR_OK.

◆ armv8_mmu_translate_va_pa()

int armv8_mmu_translate_va_pa ( struct target *  target,
target_addr_t  va,
target_addr_t *  val,
int  meminfo 
)

Definition at line 1106 of file armv8.c.

References ARM_MODE_ANY, ARMV8_64_EL2H, armv8_curel_from_core_mode(), armv8_decode_memory_attr(), armv8_dpm_modeswitch(), ARMV8_MRS, ARMV8_SYS, arm::core_mode, armv8_common::dpm, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, arm_dpm::finish, arm_dpm::instr_read_data_r0_64, arm_dpm::instr_write_data_r0_64, LOG_ERROR, LOG_TARGET_ERROR, LOG_USER, arm_dpm::prepare, target::state, SYSTEM_ATS12E0R, SYSTEM_ATS12E1R, SYSTEM_ATS1E2R, SYSTEM_ATS1E3R, SYSTEM_CUREL_EL0, SYSTEM_CUREL_EL1, SYSTEM_CUREL_EL2, SYSTEM_CUREL_EL3, SYSTEM_PAR_EL1, TARGET_HALTED, target_to_arm(), and target_to_armv8().

Referenced by aarch64_virt2phys().

◆ armv8_mode_name()

const char* armv8_mode_name ( unsigned int  psr_mode)

Map PSR mode bits to the name of an ARM processor operating mode.

Definition at line 108 of file armv8.c.

References armv8_mode_data, ARRAY_SIZE, LOG_ERROR, and psr.

Referenced by aarch64_post_debug_entry(), aarch64_restore_system_control_reg(), armv8_aarch64_state(), and armv8_set_cpsr().

◆ armv8_read_mpidr()

int armv8_read_mpidr ( struct armv8_common *  armv8)

Definition at line 881 of file armv8.c.

References armv8_common::arm, ARM_MODE_ANY, ARMV8_64_EL1H, armv8_curel_from_core_mode(), armv8_dpm_modeswitch(), armv8_common::cluster_id, arm::core_mode, armv8_common::cpu_id, arm::dpm, ERROR_FAIL, ERROR_OK, arm_dpm::finish, arm_dpm::instr_read_data_r0, LOG_ERROR, LOG_INFO, armv8_common::multi_processor_system, arm_dpm::prepare, READ_REG_MPIDR, SYSTEM_CUREL_EL1, arm::target, and target_name().

Referenced by aarch64_post_debug_entry().

◆ armv8_select_reg_access()

void armv8_select_reg_access ( struct armv8_common *  armv8,
bool  is_aarch64 
)

Definition at line 864 of file armv8.c.

References armv8_read_reg(), armv8_read_reg32(), armv8_read_reg_simdfp_aarch32(), armv8_read_reg_simdfp_aarch64(), armv8_write_reg(), armv8_write_reg32(), armv8_write_reg_simdfp_aarch32(), armv8_write_reg_simdfp_aarch64(), armv8_common::read_reg_u128, armv8_common::read_reg_u64, armv8_common::write_reg_u128, and armv8_common::write_reg_u64.

Referenced by aarch64_debug_entry(), armv8_dpm_handle_exception(), and armv8_dpm_modeswitch().

◆ armv8_set_cpsr()

void armv8_set_cpsr ( struct arm *  arm,
uint32_t  cpsr 
)

Configures host-side ARM records to reflect the specified CPSR.

Later, code can use arm_reg_current() to map register numbers according to how they are exposed by this mode.

Definition at line 924 of file armv8.c.

References ARM_STATE_AARCH64, ARM_STATE_ARM, ARM_STATE_JAZELLE, ARM_STATE_THUMB, ARM_STATE_THUMB_EE, armv8_mode_name(), armv8_state_strings, buf_set_u32(), arm::core_mode, arm::core_state, arm::cpsr, reg::dirty, LOG_DEBUG, LOG_ERROR, LOG_WARNING, mode, state, reg::valid, and reg::value.

Referenced by armv8_dpm_read_current_registers().

◆ armv8_set_dbgreg_bits()

int armv8_set_dbgreg_bits ( struct armv8_common *  armv8,
unsigned int  reg,
unsigned long  mask,
unsigned long  value 
)

Definition at line 2020 of file armv8.c.

References armv8_common::debug_ap, armv8_common::debug_base, ERROR_OK, mask, mem_ap_read_atomic_u32(), and mem_ap_write_atomic_u32().

Referenced by aarch64_set_dscr_bits().

◆ is_armv8()

static bool is_armv8 ( struct armv8_common *  armv8)
inlinestatic

Definition at line 243 of file armv8.h.

References ARMV8_COMMON_MAGIC, and armv8_common::common_magic.

Referenced by arm_semihosting(), arm_semihosting_resume(), and post_result().

◆ target_to_armv8()

static struct armv8_common* target_to_armv8 ( struct target *  target)
inlinestatic

Definition at line 238 of file armv8.h.

References target::arch_info, and container_of.

Referenced by __attribute__(), _armv8_flush_all_data(), aarch64_assert_reset(), aarch64_clear_reset_catch(), aarch64_dap_write_memap_register_u32(), aarch64_debug_entry(), aarch64_do_restart_one(), aarch64_enable_reset_catch(), aarch64_halt(), aarch64_halt_one(), aarch64_handle_target_request(), aarch64_hit_watchpoint(), aarch64_init_debug_access(), aarch64_poll(), aarch64_prepare_halt_smp(), aarch64_prepare_restart_one(), aarch64_read_cpu_memory(), aarch64_read_cpu_memory_fast(), aarch64_read_cpu_memory_slow(), aarch64_read_prsr(), aarch64_restore_context(), aarch64_restore_one(), aarch64_restore_system_control_reg(), aarch64_resume(), aarch64_set_dscr_bits(), aarch64_step(), aarch64_write_cpu_memory(), aarch64_write_cpu_memory_fast(), aarch64_write_cpu_memory_slow(), arm_semihosting(), arm_semihosting_resume(), armv8_build_reg_cache(), armv8_flush_all_data(), armv8_mmu_translate_va_pa(), armv8_read_ttbcr(), COMMAND_HANDLER(), and post_result().

Variable Documentation

◆ armv8_command_handlers

const struct command_registration armv8_command_handlers[]
extern

Definition at line 1916 of file armv8.c.