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x86_32_common.h File Reference
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Data Structures

struct  swbp_mem_patch
 
struct  x86_32_common
 
struct  x86_32_dbg_reg
 

Macros

#define BYTE   1
 
#define CR0_CD   ((uint32_t)0x40000000) /* Cache Disable */
 
#define CR0_NW   ((uint32_t)0x20000000) /* Non Write-Through */
 
#define CR0_PE   ((uint32_t)0x00000001) /* Protected Mode Enable */
 
#define CR0_PG   ((uint32_t)0x80000000) /* Paging Enable */
 
#define CSAR_D   ((uint32_t)0x00400000)
 
#define CSAR_DPL   ((uint32_t)0x00006000)
 
#define DR6_BRKDETECT_0   ((uint32_t)0x00000001) /* B0 through B3 */
 
#define DR6_BRKDETECT_1   ((uint32_t)0x00000002) /* breakpoint condition detected */
 
#define DR6_BRKDETECT_2   ((uint32_t)0x00000004)
 
#define DR6_BRKDETECT_3   ((uint32_t)0x00000008)
 
#define DR7_BP_EXECUTE   0 /* 00 - only on instruction execution*/
 
#define DR7_BP_FREE(val, regnum)    ((val & (3 << (DR7_ENABLE_SIZE * (regnum)))) == 0)
 
#define DR7_BP_LENGTH_1   0 /* 00 - 1 byte length */
 
#define DR7_BP_LENGTH_2   1 /* 01 - 2 byte length */
 
#define DR7_BP_LENGTH_4   3 /* 11 - 4 byte length */
 
#define DR7_BP_READWRITE   3 /* on data read or data write */
 
#define DR7_BP_WRITE   1 /* 01 - only on data writes */
 
#define DR7_ENABLE_SIZE   2 /* 2 bits per debug reg */
 
#define DR7_G_ENABLE_SHIFT   1
 
#define DR7_GLOBAL_DISABLE(val, regnum)    (val &= ~(3 << (DR7_ENABLE_SIZE * (regnum))))
 
#define DR7_GLOBAL_ENABLE(val, regnum)    (val |= (1 << (DR7_G_ENABLE_SHIFT + (DR7_ENABLE_SIZE * (regnum)))))
 
#define DR7_LENGTH_SHIFT   18
 
#define DR7_RESET_RWLEN_BITS(val, regnum)    (val &= ~(0x0f << (DR7_RW_SHIFT + DR7_RW_LEN_SIZE * (regnum))))
 
#define DR7_RW_LEN_SIZE   4
 
#define DR7_RW_SHIFT   16
 
#define DR7_SET_ACCESS(val, regnum)    (val |= (DR7_BP_READWRITE << (DR7_RW_SHIFT + DR7_RW_LEN_SIZE * (regnum))))
 
#define DR7_SET_EXE(val, regnum)    (val &= ~(0x0f << (DR7_RW_SHIFT + DR7_RW_LEN_SIZE * (regnum))))
 
#define DR7_SET_LENGTH(val, regnum, len)
 
#define DR7_SET_WRITE(val, regnum)    (val |= (DR7_BP_WRITE << (DR7_RW_SHIFT + DR7_RW_LEN_SIZE * (regnum))))
 
#define DWORD   4
 
#define EFLAGS_IF   ((uint32_t)0x00000200) /* Interrupt Flag */
 
#define EFLAGS_RF   ((uint32_t)0x00010000) /* Resume Flag */
 
#define EFLAGS_TF   ((uint32_t)0x00000100) /* Trap Flag */
 
#define EFLAGS_VM86   ((uint32_t)0x00020000) /* Virtual 8086 Mode */
 
#define MAX_DEBUG_REGS   4
 
#define MAX_SW_BPTS   20
 
#define NUM_PM_REGS   18 /* regs used in save/restore */
 
#define PM_DR6   ((uint32_t)0xFFFF0FF0)
 
#define SSAR_DPL   ((uint32_t)0x00006000)
 
#define SW_BP_OPCODE   0xf1
 
#define WORD   2
 
#define X86_32_COMMON_MAGIC   0x86328632U
 

Enumerations

enum  {
  EAX = 0 , ECX , EDX , EBX ,
  ESP , EBP , ESI , EDI ,
  EIP , EFLAGS , CS , SS ,
  DS , ES , FS , GS ,
  ST0 , ST1 , ST2 , ST3 ,
  ST4 , ST5 , ST6 , ST7 ,
  FCTRL , FSTAT , FTAG , FISEG ,
  FIOFF , FOSEG , FOOFF , FOP ,
  CR0 , CR2 , CR3 , CR4 ,
  DR0 , DR1 , DR2 , DR3 ,
  DR6 , DR7 , IDTB , IDTL ,
  IDTAR , GDTB , GDTL , GDTAR ,
  TR , LDTR , LDTB , LDTL ,
  LDTAR , CSB , CSL , CSAR ,
  DSB , DSL , DSAR , ESB ,
  ESL , ESAR , FSB , FSL ,
  FSAR , GSB , GSL , GSAR ,
  SSB , SSL , SSAR , TSSB ,
  TSSL , TSSAR , PMCR
}
 
enum  {
  MEMRDB32 = 0 , MEMRDB16 , MEMRDH32 , MEMRDH16 ,
  MEMRDW32 , MEMRDW16 , MEMWRB32 , MEMWRB16 ,
  MEMWRH32 , MEMWRH16 , MEMWRW32 , MEMWRW16 ,
  IORDB32 , IORDB16 , IORDH32 , IORDH16 ,
  IORDW32 , IORDW16 , IOWRB32 , IOWRB16 ,
  IOWRH32 , IOWRH16 , IOWRW32 , IOWRW16 ,
  SRAMACCESS , SRAM2PDR , PDR2SRAM , WBINVD
}
 
enum  x86_core_type { LMT1 , LMT3_5 }
 

Functions

bool check_not_halted (const struct target *t)
 
static struct x86_32_commontarget_to_x86_32 (struct target *target)
 
int x86_32_common_add_breakpoint (struct target *t, struct breakpoint *bp)
 
int x86_32_common_add_watchpoint (struct target *t, struct watchpoint *wp)
 
int x86_32_common_init_arch_info (struct target *target, struct x86_32_common *x86_32)
 
int x86_32_common_mmu (struct target *t, int *enabled)
 
int x86_32_common_read_io (struct target *t, uint32_t addr, uint32_t size, uint8_t *buf)
 
int x86_32_common_read_memory (struct target *t, target_addr_t addr, uint32_t size, uint32_t count, uint8_t *buf)
 
int x86_32_common_read_phys_mem (struct target *t, target_addr_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer)
 
int x86_32_common_remove_breakpoint (struct target *t, struct breakpoint *bp)
 
int x86_32_common_remove_watchpoint (struct target *t, struct watchpoint *wp)
 
void x86_32_common_reset_breakpoints_watchpoints (struct target *t)
 
int x86_32_common_virt2phys (struct target *t, target_addr_t address, target_addr_t *physical)
 
int x86_32_common_write_io (struct target *t, uint32_t addr, uint32_t size, const uint8_t *buf)
 
int x86_32_common_write_memory (struct target *t, target_addr_t addr, uint32_t size, uint32_t count, const uint8_t *buf)
 
int x86_32_common_write_phys_mem (struct target *t, target_addr_t phys_address, uint32_t size, uint32_t count, const uint8_t *buffer)
 
int x86_32_get_gdb_reg_list (struct target *t, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class)
 

Variables

const struct command_registration x86_32_command_handlers []
 

Macro Definition Documentation

◆ BYTE

#define BYTE   1

Definition at line 31 of file x86_32_common.h.

◆ CR0_CD

#define CR0_CD   ((uint32_t)0x40000000) /* Cache Disable */

Definition at line 46 of file x86_32_common.h.

◆ CR0_NW

#define CR0_NW   ((uint32_t)0x20000000) /* Non Write-Through */

Definition at line 45 of file x86_32_common.h.

◆ CR0_PE

#define CR0_PE   ((uint32_t)0x00000001) /* Protected Mode Enable */

Definition at line 44 of file x86_32_common.h.

◆ CR0_PG

#define CR0_PG   ((uint32_t)0x80000000) /* Paging Enable */

Definition at line 47 of file x86_32_common.h.

◆ CSAR_D

#define CSAR_D   ((uint32_t)0x00400000)

Definition at line 41 of file x86_32_common.h.

◆ CSAR_DPL

#define CSAR_DPL   ((uint32_t)0x00006000)

Definition at line 40 of file x86_32_common.h.

◆ DR6_BRKDETECT_0

#define DR6_BRKDETECT_0   ((uint32_t)0x00000001) /* B0 through B3 */

Definition at line 52 of file x86_32_common.h.

◆ DR6_BRKDETECT_1

#define DR6_BRKDETECT_1   ((uint32_t)0x00000002) /* breakpoint condition detected */

Definition at line 53 of file x86_32_common.h.

◆ DR6_BRKDETECT_2

#define DR6_BRKDETECT_2   ((uint32_t)0x00000004)

Definition at line 54 of file x86_32_common.h.

◆ DR6_BRKDETECT_3

#define DR6_BRKDETECT_3   ((uint32_t)0x00000008)

Definition at line 55 of file x86_32_common.h.

◆ DR7_BP_EXECUTE

#define DR7_BP_EXECUTE   0 /* 00 - only on instruction execution*/

Definition at line 262 of file x86_32_common.h.

◆ DR7_BP_FREE

#define DR7_BP_FREE (   val,
  regnum 
)     ((val & (3 << (DR7_ENABLE_SIZE * (regnum)))) == 0)

Definition at line 276 of file x86_32_common.h.

◆ DR7_BP_LENGTH_1

#define DR7_BP_LENGTH_1   0 /* 00 - 1 byte length */

Definition at line 266 of file x86_32_common.h.

◆ DR7_BP_LENGTH_2

#define DR7_BP_LENGTH_2   1 /* 01 - 2 byte length */

Definition at line 267 of file x86_32_common.h.

◆ DR7_BP_LENGTH_4

#define DR7_BP_LENGTH_4   3 /* 11 - 4 byte length */

Definition at line 268 of file x86_32_common.h.

◆ DR7_BP_READWRITE

#define DR7_BP_READWRITE   3 /* on data read or data write */

Definition at line 265 of file x86_32_common.h.

◆ DR7_BP_WRITE

#define DR7_BP_WRITE   1 /* 01 - only on data writes */

Definition at line 263 of file x86_32_common.h.

◆ DR7_ENABLE_SIZE

#define DR7_ENABLE_SIZE   2 /* 2 bits per debug reg */

Definition at line 258 of file x86_32_common.h.

◆ DR7_G_ENABLE_SHIFT

#define DR7_G_ENABLE_SHIFT   1

Definition at line 257 of file x86_32_common.h.

◆ DR7_GLOBAL_DISABLE

#define DR7_GLOBAL_DISABLE (   val,
  regnum 
)     (val &= ~(3 << (DR7_ENABLE_SIZE * (regnum))))

Definition at line 273 of file x86_32_common.h.

◆ DR7_GLOBAL_ENABLE

#define DR7_GLOBAL_ENABLE (   val,
  regnum 
)     (val |= (1 << (DR7_G_ENABLE_SHIFT + (DR7_ENABLE_SIZE * (regnum)))))

Definition at line 270 of file x86_32_common.h.

◆ DR7_LENGTH_SHIFT

#define DR7_LENGTH_SHIFT   18

Definition at line 260 of file x86_32_common.h.

◆ DR7_RESET_RWLEN_BITS

#define DR7_RESET_RWLEN_BITS (   val,
  regnum 
)     (val &= ~(0x0f << (DR7_RW_SHIFT + DR7_RW_LEN_SIZE * (regnum))))

Definition at line 279 of file x86_32_common.h.

◆ DR7_RW_LEN_SIZE

#define DR7_RW_LEN_SIZE   4

Definition at line 261 of file x86_32_common.h.

◆ DR7_RW_SHIFT

#define DR7_RW_SHIFT   16

Definition at line 259 of file x86_32_common.h.

◆ DR7_SET_ACCESS

#define DR7_SET_ACCESS (   val,
  regnum 
)     (val |= (DR7_BP_READWRITE << (DR7_RW_SHIFT + DR7_RW_LEN_SIZE * (regnum))))

Definition at line 288 of file x86_32_common.h.

◆ DR7_SET_EXE

#define DR7_SET_EXE (   val,
  regnum 
)     (val &= ~(0x0f << (DR7_RW_SHIFT + DR7_RW_LEN_SIZE * (regnum))))

Definition at line 282 of file x86_32_common.h.

◆ DR7_SET_LENGTH

#define DR7_SET_LENGTH (   val,
  regnum,
  len 
)
Value:
(val |= (len == 1) ? (DR7_BP_LENGTH_1 << (DR7_LENGTH_SHIFT + DR7_RW_LEN_SIZE * (regnum))) : \
(len == 2) ? (DR7_BP_LENGTH_2 << (DR7_LENGTH_SHIFT + DR7_RW_LEN_SIZE * (regnum))) : \
#define DR7_BP_LENGTH_2
#define DR7_BP_LENGTH_4
#define DR7_RW_LEN_SIZE
#define DR7_LENGTH_SHIFT
#define DR7_BP_LENGTH_1

Definition at line 291 of file x86_32_common.h.

◆ DR7_SET_WRITE

#define DR7_SET_WRITE (   val,
  regnum 
)     (val |= (DR7_BP_WRITE << (DR7_RW_SHIFT + DR7_RW_LEN_SIZE * (regnum))))

Definition at line 285 of file x86_32_common.h.

◆ DWORD

#define DWORD   4

Definition at line 33 of file x86_32_common.h.

◆ EFLAGS_IF

#define EFLAGS_IF   ((uint32_t)0x00000200) /* Interrupt Flag */

Definition at line 36 of file x86_32_common.h.

◆ EFLAGS_RF

#define EFLAGS_RF   ((uint32_t)0x00010000) /* Resume Flag */

Definition at line 37 of file x86_32_common.h.

◆ EFLAGS_TF

#define EFLAGS_TF   ((uint32_t)0x00000100) /* Trap Flag */

Definition at line 35 of file x86_32_common.h.

◆ EFLAGS_VM86

#define EFLAGS_VM86   ((uint32_t)0x00020000) /* Virtual 8086 Mode */

Definition at line 38 of file x86_32_common.h.

◆ MAX_DEBUG_REGS

#define MAX_DEBUG_REGS   4

Definition at line 248 of file x86_32_common.h.

◆ MAX_SW_BPTS

#define MAX_SW_BPTS   20

Definition at line 250 of file x86_32_common.h.

◆ NUM_PM_REGS

#define NUM_PM_REGS   18 /* regs used in save/restore */

Definition at line 200 of file x86_32_common.h.

◆ PM_DR6

#define PM_DR6   ((uint32_t)0xFFFF0FF0)

Definition at line 50 of file x86_32_common.h.

◆ SSAR_DPL

#define SSAR_DPL   ((uint32_t)0x00006000)

Definition at line 42 of file x86_32_common.h.

◆ SW_BP_OPCODE

#define SW_BP_OPCODE   0xf1

Definition at line 249 of file x86_32_common.h.

◆ WORD

#define WORD   2

Definition at line 32 of file x86_32_common.h.

◆ X86_32_COMMON_MAGIC

#define X86_32_COMMON_MAGIC   0x86328632U

Definition at line 151 of file x86_32_common.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
EAX 
ECX 
EDX 
EBX 
ESP 
EBP 
ESI 
EDI 
EIP 
EFLAGS 
CS 
SS 
DS 
ES 
FS 
GS 
ST0 
ST1 
ST2 
ST3 
ST4 
ST5 
ST6 
ST7 
FCTRL 
FSTAT 
FTAG 
FISEG 
FIOFF 
FOSEG 
FOOFF 
FOP 
CR0 
CR2 
CR3 
CR4 
DR0 
DR1 
DR2 
DR3 
DR6 
DR7 
IDTB 
IDTL 
IDTAR 
GDTB 
GDTL 
GDTAR 
TR 
LDTR 
LDTB 
LDTL 
LDTAR 
CSB 
CSL 
CSAR 
DSB 
DSL 
DSAR 
ESB 
ESL 
ESAR 
FSB 
FSL 
FSAR 
GSB 
GSL 
GSAR 
SSB 
SSL 
SSAR 
TSSB 
TSSL 
TSSAR 
PMCR 

Definition at line 57 of file x86_32_common.h.

◆ anonymous enum

anonymous enum
Enumerator
MEMRDB32 
MEMRDB16 
MEMRDH32 
MEMRDH16 
MEMRDW32 
MEMRDW16 
MEMWRB32 
MEMWRB16 
MEMWRH32 
MEMWRH16 
MEMWRW32 
MEMWRW16 
IORDB32 
IORDB16 
IORDH32 
IORDH16 
IORDW32 
IORDW16 
IOWRB32 
IOWRB16 
IOWRH32 
IOWRH16 
IOWRW32 
IOWRW16 
SRAMACCESS 
SRAM2PDR 
PDR2SRAM 
WBINVD 

Definition at line 153 of file x86_32_common.h.

◆ x86_core_type

Enumerator
LMT1 
LMT3_5 

Definition at line 187 of file x86_32_common.h.

Function Documentation

◆ check_not_halted()

◆ target_to_x86_32()

◆ x86_32_common_add_breakpoint()

int x86_32_common_add_breakpoint ( struct target t,
struct breakpoint bp 
)

◆ x86_32_common_add_watchpoint()

int x86_32_common_add_watchpoint ( struct target t,
struct watchpoint wp 
)

Definition at line 841 of file x86_32_common.c.

References check_not_halted(), and set_watchpoint().

◆ x86_32_common_init_arch_info()

◆ x86_32_common_mmu()

int x86_32_common_mmu ( struct target t,
int *  enabled 
)

Definition at line 99 of file x86_32_common.c.

References ERROR_OK.

◆ x86_32_common_read_io()

◆ x86_32_common_read_memory()

◆ x86_32_common_read_phys_mem()

int x86_32_common_read_phys_mem ( struct target t,
target_addr_t  phys_address,
uint32_t  size,
uint32_t  count,
uint8_t *  buffer 
)

◆ x86_32_common_remove_breakpoint()

int x86_32_common_remove_breakpoint ( struct target t,
struct breakpoint bp 
)

◆ x86_32_common_remove_watchpoint()

int x86_32_common_remove_watchpoint ( struct target t,
struct watchpoint wp 
)

◆ x86_32_common_reset_breakpoints_watchpoints()

◆ x86_32_common_virt2phys()

int x86_32_common_virt2phys ( struct target t,
target_addr_t  address,
target_addr_t physical 
)

◆ x86_32_common_write_io()

◆ x86_32_common_write_memory()

◆ x86_32_common_write_phys_mem()

◆ x86_32_get_gdb_reg_list()

int x86_32_get_gdb_reg_list ( struct target t,
struct reg **  reg_list[],
int *  reg_list_size,
enum target_register_class  reg_class 
)

Variable Documentation

◆ x86_32_command_handlers

const struct command_registration x86_32_command_handlers[]
extern

Definition at line 1451 of file x86_32_common.c.