Include dependency graph for mips_ejtag.h:

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Data Structures
struct	dcr_feature

struct	mips_ejtag

Macros
#define	EJTAG64_DCR 0xFFFFFFFFFF300000ull

#define	EJTAG64_DCR_DB (1llu << 17)

#define	EJTAG64_DCR_ENM (1llu << 29)

#define	EJTAG64_DCR_IB (1llu << 16)

#define	EJTAG64_DCR_INTE (1llu << 4)

#define	EJTAG64_DCR_MP (1llu << 2)

#define	EJTAG64_V25_DBA0 0xFFFFFFFFFF302100ull

#define	EJTAG64_V25_DBS 0xFFFFFFFFFF302000ull

#define	EJTAG64_V25_IBA0 0xFFFFFFFFFF301100ull

#define	EJTAG64_V25_IBS 0xFFFFFFFFFF301000ull

#define	EJTAG_CTRL_BRKST (1 << 3)

#define	EJTAG_CTRL_DBGISA (1 << 13)

#define	EJTAG_CTRL_DERR (1 << 10)

#define	EJTAG_CTRL_DLOCK (1 << 5)

#define	EJTAG_CTRL_DMAACC (1 << 17)

#define	EJTAG_CTRL_DNM (1 << 28)

#define	EJTAG_CTRL_DRWN (1 << 9)

#define	EJTAG_CTRL_DSTRT (1 << 11)

#define	EJTAG_CTRL_JTAGBRK (1 << 12)

#define	EJTAG_CTRL_PERRST (1 << 20)

#define	EJTAG_CTRL_PRACC (1 << 18)

#define	EJTAG_CTRL_PRNW (1 << 19)

#define	EJTAG_CTRL_PROBEN (1 << 15)

#define	EJTAG_CTRL_PRRST (1 << 16)

#define	EJTAG_CTRL_ROCC (1 << 31)

#define	EJTAG_CTRL_SETDEV (1 << 14)

#define	EJTAG_CTRL_SYNC (1 << 23)

#define	EJTAG_CTRL_TIF (1 << 2)

#define	EJTAG_CTRL_TOF (1 << 1)

#define	EJTAG_DBCN_BE (1 << 0)

#define	EJTAG_DBCN_BLM_MASK 0xff

#define	EJTAG_DBCN_BLM_SHIFT 4

#define	EJTAG_DBCN_NOLB (1 << 12)

#define	EJTAG_DBCN_NOSB (1 << 13)

#define	EJTAG_DCR 0xFF300000

#define	EJTAG_DCR_DB BIT(17)

#define	EJTAG_DCR_ENM BIT(29)

#define	EJTAG_DCR_ENTRIES (ARRAY_SIZE(dcr_features))

#define	EJTAG_DCR_FDC BIT(18)

#define	EJTAG_DCR_IB BIT(16)

#define	EJTAG_DCR_INTE BIT(4)

#define	EJTAG_DCR_MP BIT(2)

#define	EJTAG_DEBUG_CACHEEP (1 << 22)

#define	EJTAG_DEBUG_COUNTDM (1 << 25)

#define	EJTAG_DEBUG_DBD (1 << 31)

#define	EJTAG_DEBUG_DBP (1 << 1)

#define	EJTAG_DEBUG_DBUSEP (1 << 21)

#define	EJTAG_DEBUG_DDBL (1 << 2)

#define	EJTAG_DEBUG_DDBLIMPR (1 << 18)

#define	EJTAG_DEBUG_DDBS (1 << 3)

#define	EJTAG_DEBUG_DDBSIMPR (1 << 19)

#define	EJTAG_DEBUG_DIB (1 << 4)

#define	EJTAG_DEBUG_DINT (1 << 5)

#define	EJTAG_DEBUG_DM (1 << 30)

#define	EJTAG_DEBUG_DOZE (1 << 27)

#define	EJTAG_DEBUG_DSS (1 << 0)

#define	EJTAG_DEBUG_HALT (1 << 26)

#define	EJTAG_DEBUG_IBUSEP (1 << 24)

#define	EJTAG_DEBUG_IEXI (1 << 20)

#define	EJTAG_DEBUG_LSNM (1 << 28)

#define	EJTAG_DEBUG_MCHECKP (1 << 23)

#define	EJTAG_DEBUG_NODCR (1 << 29)

#define	EJTAG_DEBUG_NOSST (1 << 9)

#define	EJTAG_DEBUG_OFFLINE (1 << 7)

#define	EJTAG_DEBUG_SST (1 << 8)

#define	EJTAG_IMP_ASID6 (1 << 21)

#define	EJTAG_IMP_ASID8 (1 << 22)

#define	EJTAG_IMP_HAS(x) (ejtag_info->impcode & (x))

#define	EJTAG_IMP_MIPS16 (1 << 16)

#define	EJTAG_IMP_MIPS64 (1 << 0)

#define	EJTAG_IMP_NODMA (1 << 14)

#define	EJTAG_INST_ADDRESS 0x08

#define	EJTAG_INST_ALL 0x0B

#define	EJTAG_INST_BYPASS 0xFF

#define	EJTAG_INST_CONTROL 0x0A

#define	EJTAG_INST_DATA 0x09

#define	EJTAG_INST_EJTAGBOOT 0x0C

#define	EJTAG_INST_FASTDATA 0x0E

#define	EJTAG_INST_FDC 0x17

#define	EJTAG_INST_IDCODE 0x01

#define	EJTAG_INST_IMPCODE 0x03

#define	EJTAG_INST_NORMALBOOT 0x0D

#define	EJTAG_INST_PCSAMPLE 0x14

#define	EJTAG_INST_TCBCONTROLA 0x10

#define	EJTAG_INST_TCBCONTROLB 0x11

#define	EJTAG_INST_TCBCONTROLC 0x13

#define	EJTAG_INST_TCBCONTROLD 0x15

#define	EJTAG_INST_TCBCONTROLE 0x16

#define	EJTAG_INST_TCBDATA 0x12

#define	EJTAG_V20_DBA0 0xFF300200

#define	EJTAG_V20_DBAN_STEP 0x10

#define	EJTAG_V20_DBC_OFFS 0x4

#define	EJTAG_V20_DBM_OFFS 0x8

#define	EJTAG_V20_DBS 0xFF300008

#define	EJTAG_V20_DBV_OFFS 0xc

#define	EJTAG_V20_IBA0 0xFF300100

#define	EJTAG_V20_IBAN_STEP 0x10 /* Offset for next channel */

#define	EJTAG_V20_IBC_OFFS 0x4 /* IBC Offset */

#define	EJTAG_V20_IBM_OFFS 0x8

#define	EJTAG_V20_IBS 0xFF300004

#define	EJTAG_V20_IMP_BCHANNELS_MASK 0xf

#define	EJTAG_V20_IMP_BCHANNELS_SHIFT 1

#define	EJTAG_V20_IMP_COMPLEX_BREAK (1 << 20) /* Complex Breaks supported*/

#define	EJTAG_V20_IMP_DCACHE_COH (1 << 18) /* DCache does keep DMA coherent */

#define	EJTAG_V20_IMP_EADDR_NO32BIT (1 << 19) /* EJTAG_ADDR > 32 bits wide */

#define	EJTAG_V20_IMP_ICACHE_COH (1 << 17) /* DCache does keep DMA coherent */

#define	EJTAG_V20_IMP_NODB (1 << 6) /* no data breaks */

#define	EJTAG_V20_IMP_NOIB (1 << 5) /* no instruction breaks implemented */

#define	EJTAG_V20_IMP_NOPB (1 << 7) /* no processor breaks */

#define	EJTAG_V20_IMP_SDBBP (1 << 23) /* 1’b1 - sdbbp is Special2 Opcode */

#define	EJTAG_V25_DBA0 0xFF302100

#define	EJTAG_V25_DBAN_STEP 0x100

#define	EJTAG_V25_DBASID_OFFS 0x10

#define	EJTAG_V25_DBC_OFFS 0x18

#define	EJTAG_V25_DBM_OFFS 0x8

#define	EJTAG_V25_DBS 0xFF302000

#define	EJTAG_V25_DBV_OFFS 0x20

#define	EJTAG_V25_IBA0 0xFF301100

#define	EJTAG_V25_IBAN_STEP 0x100

#define	EJTAG_V25_IBASID_OFFS 0x10

#define	EJTAG_V25_IBC_OFFS 0x18

#define	EJTAG_V25_IBM_OFFS 0x8

#define	EJTAG_V25_IBS 0xFF301000

#define	EJTAG_V26_IMP_DINT (1 << 24)

#define	EJTAG_V26_IMP_R3K (1 << 28)

#define	EJTAG_VERSION_20 0

#define	EJTAG_VERSION_25 1

#define	EJTAG_VERSION_26 2

#define	EJTAG_VERSION_31 3

#define	EJTAG_VERSION_41 4

#define	EJTAG_VERSION_51 5

#define	MCHP_ASERT_RST 0xd1

#define	MCHP_DE_ASSERT_RST 0xd0

#define	MCHP_ERASE 0xfc

#define	MCHP_STATUS 0x00

#define	MTAP_COMMAND 0x07

#define	MTAP_SW_ETAP 0x05

#define	MTAP_SW_MTAP 0x04

Functions
void	ejtag_main_print_imp (struct mips_ejtag *ejtag_info)

int	mips64_ejtag_config_step (struct mips_ejtag *ejtag_info, bool enable_step)

int	mips64_ejtag_exit_debug (struct mips_ejtag *ejtag_info)

int	mips64_ejtag_fastdata_scan (struct mips_ejtag ejtag_info, bool write_t, uint64_t data)

void	mips_ejtag_add_scan_96 (struct mips_ejtag ejtag_info, uint32_t ctrl, uint32_t data, uint8_t in_scan_buf)

int	mips_ejtag_config_step (struct mips_ejtag *ejtag_info, int enable_step)

int	mips_ejtag_drscan_32 (struct mips_ejtag ejtag_info, uint32_t data)

void	mips_ejtag_drscan_32_out (struct mips_ejtag *ejtag_info, uint32_t data)

int	mips_ejtag_drscan_64 (struct mips_ejtag ejtag_info, uint64_t data)

int	mips_ejtag_drscan_8 (struct mips_ejtag ejtag_info, uint8_t data)

void	mips_ejtag_drscan_8_out (struct mips_ejtag *ejtag_info, uint8_t data)

int	mips_ejtag_enter_debug (struct mips_ejtag *ejtag_info)

int	mips_ejtag_exit_debug (struct mips_ejtag *ejtag_info)

int	mips_ejtag_fastdata_scan (struct mips_ejtag ejtag_info, int write_t, uint32_t data)

int	mips_ejtag_get_idcode (struct mips_ejtag *ejtag_info)

int	mips_ejtag_get_impcode (struct mips_ejtag *ejtag_info)

int	mips_ejtag_init (struct mips_ejtag *ejtag_info)

void	mips_ejtag_set_instr (struct mips_ejtag *ejtag_info, uint32_t new_instr)

static void	mips_le_to_h_u32 (jtag_callback_data_t arg)

static void	mips_le_to_h_u64 (jtag_callback_data_t arg)

Variables
static const struct dcr_feature	dcr_features []

Macro Definition Documentation

◆ EJTAG64_DCR

#define EJTAG64_DCR 0xFFFFFFFFFF300000ull

Definition at line 178 of file mips_ejtag.h.

◆ EJTAG64_DCR_DB

#define EJTAG64_DCR_DB (1llu << 17)

Definition at line 180 of file mips_ejtag.h.

◆ EJTAG64_DCR_ENM

#define EJTAG64_DCR_ENM (1llu << 29)

Definition at line 179 of file mips_ejtag.h.

◆ EJTAG64_DCR_IB

#define EJTAG64_DCR_IB (1llu << 16)

Definition at line 181 of file mips_ejtag.h.

◆ EJTAG64_DCR_INTE

#define EJTAG64_DCR_INTE (1llu << 4)

Definition at line 182 of file mips_ejtag.h.

◆ EJTAG64_DCR_MP

#define EJTAG64_DCR_MP (1llu << 2)

Definition at line 183 of file mips_ejtag.h.

◆ EJTAG64_V25_DBA0

#define EJTAG64_V25_DBA0 0xFFFFFFFFFF302100ull

Definition at line 184 of file mips_ejtag.h.

◆ EJTAG64_V25_DBS

#define EJTAG64_V25_DBS 0xFFFFFFFFFF302000ull

Definition at line 185 of file mips_ejtag.h.

◆ EJTAG64_V25_IBA0

#define EJTAG64_V25_IBA0 0xFFFFFFFFFF301100ull

Definition at line 186 of file mips_ejtag.h.

◆ EJTAG64_V25_IBS

#define EJTAG64_V25_IBS 0xFFFFFFFFFF301000ull

Definition at line 187 of file mips_ejtag.h.

◆ EJTAG_CTRL_BRKST

#define EJTAG_CTRL_BRKST (1 << 3)

Definition at line 49 of file mips_ejtag.h.

◆ EJTAG_CTRL_DBGISA

#define EJTAG_CTRL_DBGISA (1 << 13)

Definition at line 55 of file mips_ejtag.h.

◆ EJTAG_CTRL_DERR

#define EJTAG_CTRL_DERR (1 << 10)

Definition at line 52 of file mips_ejtag.h.

◆ EJTAG_CTRL_DLOCK

#define EJTAG_CTRL_DLOCK (1 << 5)

Definition at line 50 of file mips_ejtag.h.

◆ EJTAG_CTRL_DMAACC

#define EJTAG_CTRL_DMAACC (1 << 17)

Definition at line 59 of file mips_ejtag.h.

◆ EJTAG_CTRL_DNM

#define EJTAG_CTRL_DNM (1 << 28)

Definition at line 64 of file mips_ejtag.h.

◆ EJTAG_CTRL_DRWN

#define EJTAG_CTRL_DRWN (1 << 9)

Definition at line 51 of file mips_ejtag.h.

◆ EJTAG_CTRL_DSTRT

#define EJTAG_CTRL_DSTRT (1 << 11)

Definition at line 53 of file mips_ejtag.h.

◆ EJTAG_CTRL_JTAGBRK

#define EJTAG_CTRL_JTAGBRK (1 << 12)

Definition at line 54 of file mips_ejtag.h.

◆ EJTAG_CTRL_PERRST

#define EJTAG_CTRL_PERRST (1 << 20)

Definition at line 62 of file mips_ejtag.h.

◆ EJTAG_CTRL_PRACC

#define EJTAG_CTRL_PRACC (1 << 18)

Definition at line 60 of file mips_ejtag.h.

◆ EJTAG_CTRL_PRNW

#define EJTAG_CTRL_PRNW (1 << 19)

Definition at line 61 of file mips_ejtag.h.

◆ EJTAG_CTRL_PROBEN

#define EJTAG_CTRL_PROBEN (1 << 15)

Definition at line 57 of file mips_ejtag.h.

◆ EJTAG_CTRL_PRRST

#define EJTAG_CTRL_PRRST (1 << 16)

Definition at line 58 of file mips_ejtag.h.

◆ EJTAG_CTRL_ROCC

#define EJTAG_CTRL_ROCC (1 << 31)

Definition at line 65 of file mips_ejtag.h.

◆ EJTAG_CTRL_SETDEV

#define EJTAG_CTRL_SETDEV (1 << 14)

Definition at line 56 of file mips_ejtag.h.

◆ EJTAG_CTRL_SYNC

#define EJTAG_CTRL_SYNC (1 << 23)

Definition at line 63 of file mips_ejtag.h.

◆ EJTAG_CTRL_TIF

#define EJTAG_CTRL_TIF (1 << 2)

Definition at line 48 of file mips_ejtag.h.

◆ EJTAG_CTRL_TOF

#define EJTAG_CTRL_TOF (1 << 1)

Definition at line 47 of file mips_ejtag.h.

◆ EJTAG_DBCN_BE

#define EJTAG_DBCN_BE (1 << 0)

Definition at line 166 of file mips_ejtag.h.

◆ EJTAG_DBCN_BLM_MASK

#define EJTAG_DBCN_BLM_MASK 0xff

Definition at line 164 of file mips_ejtag.h.

◆ EJTAG_DBCN_BLM_SHIFT

#define EJTAG_DBCN_BLM_SHIFT 4

Definition at line 165 of file mips_ejtag.h.

◆ EJTAG_DBCN_NOLB

#define EJTAG_DBCN_NOLB (1 << 12)

Definition at line 163 of file mips_ejtag.h.

◆ EJTAG_DBCN_NOSB

#define EJTAG_DBCN_NOSB (1 << 13)

Definition at line 162 of file mips_ejtag.h.

◆ EJTAG_DCR

#define EJTAG_DCR 0xFF300000

Definition at line 125 of file mips_ejtag.h.

◆ EJTAG_DCR_DB

#define EJTAG_DCR_DB BIT(17)

Definition at line 128 of file mips_ejtag.h.

◆ EJTAG_DCR_ENM

#define EJTAG_DCR_ENM BIT(29)

Definition at line 126 of file mips_ejtag.h.

◆ EJTAG_DCR_ENTRIES

#define EJTAG_DCR_ENTRIES (ARRAY_SIZE(dcr_features))

Definition at line 203 of file mips_ejtag.h.

◆ EJTAG_DCR_FDC

#define EJTAG_DCR_FDC BIT(18)

Definition at line 127 of file mips_ejtag.h.

◆ EJTAG_DCR_IB

#define EJTAG_DCR_IB BIT(16)

Definition at line 129 of file mips_ejtag.h.

◆ EJTAG_DCR_INTE

#define EJTAG_DCR_INTE BIT(4)

Definition at line 130 of file mips_ejtag.h.

◆ EJTAG_DCR_MP

#define EJTAG_DCR_MP BIT(2)

Definition at line 131 of file mips_ejtag.h.

◆ EJTAG_DEBUG_CACHEEP

#define EJTAG_DEBUG_CACHEEP (1 << 22)

Definition at line 82 of file mips_ejtag.h.

◆ EJTAG_DEBUG_COUNTDM

#define EJTAG_DEBUG_COUNTDM (1 << 25)

Definition at line 85 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DBD

#define EJTAG_DEBUG_DBD (1 << 31)

Definition at line 91 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DBP

#define EJTAG_DEBUG_DBP (1 << 1)

Definition at line 70 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DBUSEP

#define EJTAG_DEBUG_DBUSEP (1 << 21)

Definition at line 81 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DDBL

#define EJTAG_DEBUG_DDBL (1 << 2)

Definition at line 71 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DDBLIMPR

#define EJTAG_DEBUG_DDBLIMPR (1 << 18)

Definition at line 78 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DDBS

#define EJTAG_DEBUG_DDBS (1 << 3)

Definition at line 72 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DDBSIMPR

#define EJTAG_DEBUG_DDBSIMPR (1 << 19)

Definition at line 79 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DIB

#define EJTAG_DEBUG_DIB (1 << 4)

Definition at line 73 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DINT

#define EJTAG_DEBUG_DINT (1 << 5)

Definition at line 74 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DM

#define EJTAG_DEBUG_DM (1 << 30)

Definition at line 90 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DOZE

#define EJTAG_DEBUG_DOZE (1 << 27)

Definition at line 87 of file mips_ejtag.h.

◆ EJTAG_DEBUG_DSS

#define EJTAG_DEBUG_DSS (1 << 0)

Definition at line 69 of file mips_ejtag.h.

◆ EJTAG_DEBUG_HALT

#define EJTAG_DEBUG_HALT (1 << 26)

Definition at line 86 of file mips_ejtag.h.

◆ EJTAG_DEBUG_IBUSEP

#define EJTAG_DEBUG_IBUSEP (1 << 24)

Definition at line 84 of file mips_ejtag.h.

◆ EJTAG_DEBUG_IEXI

#define EJTAG_DEBUG_IEXI (1 << 20)

Definition at line 80 of file mips_ejtag.h.

◆ EJTAG_DEBUG_LSNM

#define EJTAG_DEBUG_LSNM (1 << 28)

Definition at line 88 of file mips_ejtag.h.

◆ EJTAG_DEBUG_MCHECKP

#define EJTAG_DEBUG_MCHECKP (1 << 23)

Definition at line 83 of file mips_ejtag.h.

◆ EJTAG_DEBUG_NODCR

#define EJTAG_DEBUG_NODCR (1 << 29)

Definition at line 89 of file mips_ejtag.h.

◆ EJTAG_DEBUG_NOSST

#define EJTAG_DEBUG_NOSST (1 << 9)

Definition at line 77 of file mips_ejtag.h.

◆ EJTAG_DEBUG_OFFLINE

#define EJTAG_DEBUG_OFFLINE (1 << 7)

Definition at line 75 of file mips_ejtag.h.

◆ EJTAG_DEBUG_SST

#define EJTAG_DEBUG_SST (1 << 8)

Definition at line 76 of file mips_ejtag.h.

◆ EJTAG_IMP_ASID6

#define EJTAG_IMP_ASID6 (1 << 21)

Definition at line 107 of file mips_ejtag.h.

◆ EJTAG_IMP_ASID8

#define EJTAG_IMP_ASID8 (1 << 22)

Definition at line 106 of file mips_ejtag.h.

◆ EJTAG_IMP_HAS

#define EJTAG_IMP_HAS ( x ) (ejtag_info->impcode & (x))

Definition at line 99 of file mips_ejtag.h.

◆ EJTAG_IMP_MIPS16

#define EJTAG_IMP_MIPS16 (1 << 16)

Definition at line 112 of file mips_ejtag.h.

◆ EJTAG_IMP_MIPS64

#define EJTAG_IMP_MIPS64 (1 << 0)

Definition at line 122 of file mips_ejtag.h.

◆ EJTAG_IMP_NODMA

#define EJTAG_IMP_NODMA (1 << 14)

Definition at line 113 of file mips_ejtag.h.

◆ EJTAG_INST_ADDRESS

#define EJTAG_INST_ADDRESS 0x08

Definition at line 18 of file mips_ejtag.h.

◆ EJTAG_INST_ALL

#define EJTAG_INST_ALL 0x0B

Definition at line 21 of file mips_ejtag.h.

◆ EJTAG_INST_BYPASS

#define EJTAG_INST_BYPASS 0xFF

Definition at line 33 of file mips_ejtag.h.

◆ EJTAG_INST_CONTROL

#define EJTAG_INST_CONTROL 0x0A

Definition at line 20 of file mips_ejtag.h.

◆ EJTAG_INST_DATA

#define EJTAG_INST_DATA 0x09

Definition at line 19 of file mips_ejtag.h.

◆ EJTAG_INST_EJTAGBOOT

#define EJTAG_INST_EJTAGBOOT 0x0C

Definition at line 22 of file mips_ejtag.h.

◆ EJTAG_INST_FASTDATA

#define EJTAG_INST_FASTDATA 0x0E

Definition at line 24 of file mips_ejtag.h.

◆ EJTAG_INST_FDC

#define EJTAG_INST_FDC 0x17

Definition at line 32 of file mips_ejtag.h.

◆ EJTAG_INST_IDCODE

#define EJTAG_INST_IDCODE 0x01

Definition at line 16 of file mips_ejtag.h.

◆ EJTAG_INST_IMPCODE

#define EJTAG_INST_IMPCODE 0x03

Definition at line 17 of file mips_ejtag.h.

◆ EJTAG_INST_NORMALBOOT

#define EJTAG_INST_NORMALBOOT 0x0D

Definition at line 23 of file mips_ejtag.h.

◆ EJTAG_INST_PCSAMPLE

#define EJTAG_INST_PCSAMPLE 0x14

Definition at line 29 of file mips_ejtag.h.

◆ EJTAG_INST_TCBCONTROLA

#define EJTAG_INST_TCBCONTROLA 0x10

Definition at line 25 of file mips_ejtag.h.

◆ EJTAG_INST_TCBCONTROLB

#define EJTAG_INST_TCBCONTROLB 0x11

Definition at line 26 of file mips_ejtag.h.

◆ EJTAG_INST_TCBCONTROLC

#define EJTAG_INST_TCBCONTROLC 0x13

Definition at line 28 of file mips_ejtag.h.

◆ EJTAG_INST_TCBCONTROLD

#define EJTAG_INST_TCBCONTROLD 0x15

Definition at line 30 of file mips_ejtag.h.

◆ EJTAG_INST_TCBCONTROLE

#define EJTAG_INST_TCBCONTROLE 0x16

Definition at line 31 of file mips_ejtag.h.

◆ EJTAG_INST_TCBDATA

#define EJTAG_INST_TCBDATA 0x12

Definition at line 27 of file mips_ejtag.h.

◆ EJTAG_V20_DBA0

#define EJTAG_V20_DBA0 0xFF300200

Definition at line 142 of file mips_ejtag.h.

◆ EJTAG_V20_DBAN_STEP

#define EJTAG_V20_DBAN_STEP 0x10

Definition at line 146 of file mips_ejtag.h.

◆ EJTAG_V20_DBC_OFFS

#define EJTAG_V20_DBC_OFFS 0x4

Definition at line 143 of file mips_ejtag.h.

◆ EJTAG_V20_DBM_OFFS

#define EJTAG_V20_DBM_OFFS 0x8

Definition at line 144 of file mips_ejtag.h.

◆ EJTAG_V20_DBS

#define EJTAG_V20_DBS 0xFF300008

Definition at line 141 of file mips_ejtag.h.

◆ EJTAG_V20_DBV_OFFS

#define EJTAG_V20_DBV_OFFS 0xc

Definition at line 145 of file mips_ejtag.h.

◆ EJTAG_V20_IBA0

#define EJTAG_V20_IBA0 0xFF300100

Definition at line 137 of file mips_ejtag.h.

◆ EJTAG_V20_IBAN_STEP

#define EJTAG_V20_IBAN_STEP 0x10 /* Offset for next channel */

Definition at line 140 of file mips_ejtag.h.

◆ EJTAG_V20_IBC_OFFS

#define EJTAG_V20_IBC_OFFS 0x4 /* IBC Offset */

Definition at line 138 of file mips_ejtag.h.

◆ EJTAG_V20_IBM_OFFS

#define EJTAG_V20_IBM_OFFS 0x8

Definition at line 139 of file mips_ejtag.h.

◆ EJTAG_V20_IBS

#define EJTAG_V20_IBS 0xFF300004

Definition at line 136 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_BCHANNELS_MASK

#define EJTAG_V20_IMP_BCHANNELS_MASK 0xf

Definition at line 120 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_BCHANNELS_SHIFT

#define EJTAG_V20_IMP_BCHANNELS_SHIFT 1

Definition at line 121 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_COMPLEX_BREAK

#define EJTAG_V20_IMP_COMPLEX_BREAK (1 << 20) /* Complex Breaks supported*/

Definition at line 108 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_DCACHE_COH

#define EJTAG_V20_IMP_DCACHE_COH (1 << 18) /* DCache does keep DMA coherent */

Definition at line 110 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_EADDR_NO32BIT

#define EJTAG_V20_IMP_EADDR_NO32BIT (1 << 19) /* EJTAG_ADDR > 32 bits wide */

Definition at line 109 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_ICACHE_COH

#define EJTAG_V20_IMP_ICACHE_COH (1 << 17) /* DCache does keep DMA coherent */

Definition at line 111 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_NODB

#define EJTAG_V20_IMP_NODB (1 << 6) /* no data breaks */

Definition at line 117 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_NOIB

#define EJTAG_V20_IMP_NOIB (1 << 5) /* no instruction breaks implemented */

Definition at line 118 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_NOPB

#define EJTAG_V20_IMP_NOPB (1 << 7) /* no processor breaks */

Definition at line 116 of file mips_ejtag.h.

◆ EJTAG_V20_IMP_SDBBP

#define EJTAG_V20_IMP_SDBBP (1 << 23) /* 1’b1 - sdbbp is Special2 Opcode */

Definition at line 105 of file mips_ejtag.h.

◆ EJTAG_V25_DBA0

#define EJTAG_V25_DBA0 0xFF302100

Definition at line 155 of file mips_ejtag.h.

◆ EJTAG_V25_DBAN_STEP

#define EJTAG_V25_DBAN_STEP 0x100

Definition at line 160 of file mips_ejtag.h.

◆ EJTAG_V25_DBASID_OFFS

#define EJTAG_V25_DBASID_OFFS 0x10

Definition at line 157 of file mips_ejtag.h.

◆ EJTAG_V25_DBC_OFFS

#define EJTAG_V25_DBC_OFFS 0x18

Definition at line 158 of file mips_ejtag.h.

◆ EJTAG_V25_DBM_OFFS

#define EJTAG_V25_DBM_OFFS 0x8

Definition at line 156 of file mips_ejtag.h.

◆ EJTAG_V25_DBS

#define EJTAG_V25_DBS 0xFF302000

Definition at line 154 of file mips_ejtag.h.

◆ EJTAG_V25_DBV_OFFS

#define EJTAG_V25_DBV_OFFS 0x20

Definition at line 159 of file mips_ejtag.h.

◆ EJTAG_V25_IBA0

#define EJTAG_V25_IBA0 0xFF301100

Definition at line 149 of file mips_ejtag.h.

◆ EJTAG_V25_IBAN_STEP

#define EJTAG_V25_IBAN_STEP 0x100

Definition at line 153 of file mips_ejtag.h.

◆ EJTAG_V25_IBASID_OFFS

#define EJTAG_V25_IBASID_OFFS 0x10

Definition at line 151 of file mips_ejtag.h.

◆ EJTAG_V25_IBC_OFFS

#define EJTAG_V25_IBC_OFFS 0x18

Definition at line 152 of file mips_ejtag.h.

◆ EJTAG_V25_IBM_OFFS

#define EJTAG_V25_IBM_OFFS 0x8

Definition at line 150 of file mips_ejtag.h.

◆ EJTAG_V25_IBS

#define EJTAG_V25_IBS 0xFF301000

Definition at line 148 of file mips_ejtag.h.

◆ EJTAG_V26_IMP_DINT

#define EJTAG_V26_IMP_DINT (1 << 24)

Definition at line 104 of file mips_ejtag.h.

◆ EJTAG_V26_IMP_R3K

#define EJTAG_V26_IMP_R3K (1 << 28)

Definition at line 102 of file mips_ejtag.h.

◆ EJTAG_VERSION_20

#define EJTAG_VERSION_20 0

Definition at line 168 of file mips_ejtag.h.

◆ EJTAG_VERSION_25

#define EJTAG_VERSION_25 1

Definition at line 169 of file mips_ejtag.h.

◆ EJTAG_VERSION_26

#define EJTAG_VERSION_26 2

Definition at line 170 of file mips_ejtag.h.

◆ EJTAG_VERSION_31

#define EJTAG_VERSION_31 3

Definition at line 171 of file mips_ejtag.h.

◆ EJTAG_VERSION_41

#define EJTAG_VERSION_41 4

Definition at line 172 of file mips_ejtag.h.

◆ EJTAG_VERSION_51

#define EJTAG_VERSION_51 5

Definition at line 173 of file mips_ejtag.h.

◆ MCHP_ASERT_RST

#define MCHP_ASERT_RST 0xd1

Definition at line 41 of file mips_ejtag.h.

◆ MCHP_DE_ASSERT_RST

#define MCHP_DE_ASSERT_RST 0xd0

Definition at line 42 of file mips_ejtag.h.

◆ MCHP_ERASE

#define MCHP_ERASE 0xfc

Definition at line 43 of file mips_ejtag.h.

◆ MCHP_STATUS

#define MCHP_STATUS 0x00

Definition at line 44 of file mips_ejtag.h.

◆ MTAP_COMMAND

#define MTAP_COMMAND 0x07

Definition at line 38 of file mips_ejtag.h.

◆ MTAP_SW_ETAP

#define MTAP_SW_ETAP 0x05

Definition at line 37 of file mips_ejtag.h.

◆ MTAP_SW_MTAP

#define MTAP_SW_MTAP 0x04

Definition at line 36 of file mips_ejtag.h.

Function Documentation

◆ ejtag_main_print_imp()

void ejtag_main_print_imp ( struct mips_ejtag * ejtag_info )

Definition at line 335 of file mips_ejtag.c.

References EJTAG_IMP_ASID6, EJTAG_IMP_ASID8, EJTAG_IMP_HAS, EJTAG_IMP_MIPS16, EJTAG_IMP_MIPS64, EJTAG_IMP_NODMA, mips32_common::ejtag_info, ejtag_v20_print_imp(), ejtag_v26_print_imp(), mips_ejtag::ejtag_version, EJTAG_VERSION_20, EJTAG_VERSION_25, EJTAG_VERSION_26, EJTAG_VERSION_31, EJTAG_VERSION_41, EJTAG_VERSION_51, and LOG_DEBUG.

Referenced by COMMAND_HANDLER(), and mips_ejtag_init().

◆ mips64_ejtag_config_step()

int mips64_ejtag_config_step	(	struct mips_ejtag *	ejtag_info,
		bool	enable_step
	)

Definition at line 451 of file mips_ejtag.c.

References ARRAY_SIZE, LOWER16, MIPS64_AND, MIPS64_B, MIPS64_LD, MIPS64_LUI, MIPS64_MFC0, MIPS64_MTC0, MIPS64_NOP, MIPS64_ORI, mips64_pracc_exec(), MIPS64_PRACC_STACK, MIPS64_SD, MIPS64_SYNC, NEG16, NULL, and UPPER16.

Referenced by mips_mips64_debug_entry(), mips_mips64_single_step_core(), and mips_mips64_step().

◆ mips64_ejtag_exit_debug()

int mips64_ejtag_exit_debug ( struct mips_ejtag * ejtag_info )

Definition at line 503 of file mips_ejtag.c.

References ARRAY_SIZE, LOG_DEBUG, MIPS64_DRET, MIPS64_NOP, mips64_pracc_exec(), and NULL.

Referenced by mips_mips64_resume(), mips_mips64_single_step_core(), and mips_mips64_step().

◆ mips64_ejtag_fastdata_scan()

int mips64_ejtag_fastdata_scan	(	struct mips_ejtag *	ejtag_info,
		bool	write_t,
		uint64_t *	data
	)

Definition at line 520 of file mips_ejtag.c.

References buf_set_u64(), ERROR_OK, scan_field::in_value, jtag_add_callback(), jtag_add_dr_scan(), keep_alive(), mips_le_to_h_u64(), NULL, scan_field::num_bits, scan_field::out_value, mips_ejtag::tap, and TAP_IDLE.

Referenced by mips64_pracc_fastdata_xfer().

◆ mips_ejtag_add_scan_96()

void mips_ejtag_add_scan_96	(	struct mips_ejtag *	ejtag_info,
		uint32_t	ctrl,
		uint32_t	data,
		uint8_t *	in_scan_buf
	)

Definition at line 58 of file mips_ejtag.c.

References buf_set_u32(), ctrl, scan_field::in_value, jtag_add_dr_scan(), keep_alive(), scan_field::num_bits, scan_field::out_value, mips_ejtag::tap, and TAP_IDLE.

Referenced by mips32_pracc_queue_exec().

◆ mips_ejtag_config_step()

int mips_ejtag_config_step	(	struct mips_ejtag *	ejtag_info,
		int	enable_step
	)

Definition at line 186 of file mips_ejtag.c.

References pracc_queue_info::code_count, pracc_queue_info::ejtag_info, pracc_queue_info::isa, LOWER16, MIPS32_B, MIPS32_LUI, MIPS32_MFC0, MIPS32_MTC0, MIPS32_ORI, mips32_pracc_queue_exec(), MIPS32_XORI, NEG16, NULL, pracc_add(), pracc_queue_free(), pracc_queue_init(), mips_ejtag::reg8, pracc_queue_info::retval, and UPPER16.

Referenced by mips_m4k_debug_entry(), mips_m4k_single_step_core(), and mips_m4k_step().

◆ mips_ejtag_drscan_32()

int mips_ejtag_drscan_32	(	struct mips_ejtag *	ejtag_info,
		uint32_t *	data
	)

◆ mips_ejtag_drscan_32_out()

void mips_ejtag_drscan_32_out	(	struct mips_ejtag *	ejtag_info,
		uint32_t	data
	)

Definition at line 145 of file mips_ejtag.c.

References mips_ejtag_drscan_32_queued(), and NULL.

Referenced by mips32_pracc_clean_text_jump(), mips32_pracc_exec(), mips32_pracc_fastdata_xfer(), mips32_pracc_finish(), and mips_m4k_assert_reset().

◆ mips_ejtag_drscan_64()

int mips_ejtag_drscan_64	(	struct mips_ejtag *	ejtag_info,
		uint64_t *	data
	)

Definition at line 81 of file mips_ejtag.c.

References buf_get_u64(), buf_set_u64(), ERROR_FAIL, ERROR_OK, scan_field::in_value, jtag_add_dr_scan(), jtag_execute_queue(), keep_alive(), LOG_ERROR, scan_field::num_bits, scan_field::out_value, mips_ejtag::tap, and TAP_IDLE.

Referenced by mips64_pracc_exec_read(), and mips64_pracc_exec_write().

◆ mips_ejtag_drscan_8()

int mips_ejtag_drscan_8	(	struct mips_ejtag *	ejtag_info,
		uint8_t *	data
	)

Definition at line 150 of file mips_ejtag.c.

References ERROR_OK, scan_field::in_value, jtag_add_dr_scan(), jtag_execute_queue(), LOG_ERROR, scan_field::num_bits, scan_field::out_value, mips_ejtag::tap, and TAP_IDLE.

Referenced by COMMAND_HANDLER().

◆ mips_ejtag_drscan_8_out()

void mips_ejtag_drscan_8_out	(	struct mips_ejtag *	ejtag_info,
		uint8_t	data
	)

Definition at line 171 of file mips_ejtag.c.

References scan_field::in_value, jtag_add_dr_scan(), NULL, scan_field::num_bits, scan_field::out_value, mips_ejtag::tap, and TAP_IDLE.

Referenced by COMMAND_HANDLER(), and mips_m4k_assert_reset().

◆ mips_ejtag_enter_debug()

int mips_ejtag_enter_debug ( struct mips_ejtag * ejtag_info )

Definition at line 231 of file mips_ejtag.c.

References disable_dcr_mp(), mips_ejtag::ejtag_ctrl, EJTAG_CTRL_BRKST, EJTAG_CTRL_JTAGBRK, pracc_queue_info::ejtag_info, EJTAG_INST_CONTROL, mips_ejtag::ejtag_version, EJTAG_VERSION_20, ERROR_FAIL, ERROR_OK, LOG_DEBUG, LOG_ERROR, mips_ejtag_drscan_32(), and mips_ejtag_set_instr().

Referenced by mips_m4k_halt(), and mips_mips64_halt().

◆ mips_ejtag_exit_debug()

int mips_ejtag_exit_debug ( struct mips_ejtag * ejtag_info )

Definition at line 258 of file mips_ejtag.c.

References container_of, mips32_common::cpu_quirks, mips32_common::ejtag_info, EJTAG_QUIRK_PAD_DRET, pa_list::instr, mips_ejtag::isa, jtag_add_sleep(), pracc_queue_info::max_code, MIPS32_DRET, mips32_pracc_queue_exec(), NULL, pracc_queue_info::pracc_list, and pracc_queue_info::retval.

Referenced by avr32_ap7k_resume(), mips_m4k_internal_restore(), mips_m4k_single_step_core(), and mips_m4k_step().

◆ mips_ejtag_fastdata_scan()

int mips_ejtag_fastdata_scan	(	struct mips_ejtag *	ejtag_info,
		int	write_t,
		uint32_t *	data
	)

Definition at line 414 of file mips_ejtag.c.

References buf_set_u32(), mips32_common::ejtag_info, ERROR_OK, scan_field::in_value, jtag_add_callback(), jtag_add_dr_scan(), keep_alive(), mips_le_to_h_u32(), NULL, scan_field::num_bits, scan_field::out_value, mips_ejtag::tap, and TAP_IDLE.

Referenced by mips32_pracc_fastdata_xfer().

◆ mips_ejtag_get_idcode()

int mips_ejtag_get_idcode ( struct mips_ejtag * ejtag_info )

Definition at line 42 of file mips_ejtag.c.

References EJTAG_INST_IDCODE, mips_ejtag::idcode, mips_ejtag_drscan_32(), and mips_ejtag_set_instr().

Referenced by COMMAND_HANDLER(), and mips_m4k_examine().

◆ mips_ejtag_get_impcode()

int mips_ejtag_get_impcode ( struct mips_ejtag * ejtag_info )

Definition at line 50 of file mips_ejtag.c.

References EJTAG_INST_IMPCODE, mips_ejtag::impcode, mips_ejtag_drscan_32(), and mips_ejtag_set_instr().