73 #define FCF_ADDRESS 0x00000400
77 #define FCF_FDPROT 0xf
80 #define FLEXRAM 0x14000000
82 #define MSCM_OCMDR0 0x40001400
83 #define MSCM_OCMDR1 0x40001404
84 #define FMC_PFB01CR 0x4001f004
85 #define FTFX_FSTAT 0x40020000
86 #define FTFX_FCNFG 0x40020001
87 #define FTFX_FCCOB3 0x40020004
88 #define FTFX_FPROT3 0x40020010
89 #define FTFX_FDPROT 0x40020017
90 #define SIM_BASE 0x40047000
91 #define SIM_BASE_KL28 0x40074000
92 #define SIM_COPC 0x40048100
94 #define WDOG_BASE 0x40052000
95 #define WDOG32_KE1X 0x40052000
96 #define WDOG32_KL28 0x40076000
97 #define SMC_PMCTRL 0x4007E001
98 #define SMC_PMSTAT 0x4007E003
99 #define SMC32_PMCTRL 0x4007E00C
100 #define SMC32_PMSTAT 0x4007E014
101 #define PMC_REGSC 0x4007D002
102 #define MC_PMCTRL 0x4007E003
103 #define MCM_PLACR 0xF000300C
106 #define SIM_SOPT1_OFFSET 0x0000
107 #define SIM_SDID_OFFSET 0x1024
108 #define SIM_FCFG1_OFFSET 0x104c
109 #define SIM_FCFG2_OFFSET 0x1050
111 #define WDOG_STCTRLH_OFFSET 0
112 #define WDOG32_CS_OFFSET 0
115 #define PM_STAT_RUN 0x01
116 #define PM_STAT_VLPR 0x04
117 #define PM_CTRL_RUNM_RUN 0x00
120 #define FTFX_CMD_BLOCKSTAT 0x00
121 #define FTFX_CMD_SECTSTAT 0x01
122 #define FTFX_CMD_LWORDPROG 0x06
123 #define FTFX_CMD_SECTERASE 0x09
124 #define FTFX_CMD_SECTWRITE 0x0b
125 #define FTFX_CMD_MASSERASE 0x44
126 #define FTFX_CMD_PGMPART 0x80
127 #define FTFX_CMD_SETFLEXRAM 0x81
149 #define KINETIS_SOPT1_RAMSIZE_MASK 0x0000F000
150 #define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
152 #define KINETIS_SDID_K_SERIES_MASK 0x0000FFFF
154 #define KINETIS_SDID_DIEID_MASK 0x00000F80
156 #define KINETIS_SDID_DIEID_K22FN128 0x00000680
157 #define KINETIS_SDID_DIEID_K22FN256 0x00000A80
158 #define KINETIS_SDID_DIEID_K22FN512 0x00000E80
159 #define KINETIS_SDID_DIEID_K24FN256 0x00000700
161 #define KINETIS_SDID_DIEID_K24FN1M 0x00000300
168 #define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
169 #define KINETIS_K_SDID_K10_M50 0x00000000
170 #define KINETIS_K_SDID_K10_M72 0x00000080
171 #define KINETIS_K_SDID_K10_M100 0x00000100
172 #define KINETIS_K_SDID_K10_M120 0x00000180
173 #define KINETIS_K_SDID_K11 0x00000220
174 #define KINETIS_K_SDID_K12 0x00000200
175 #define KINETIS_K_SDID_K20_M50 0x00000010
176 #define KINETIS_K_SDID_K20_M72 0x00000090
177 #define KINETIS_K_SDID_K20_M100 0x00000110
178 #define KINETIS_K_SDID_K20_M120 0x00000190
179 #define KINETIS_K_SDID_K21_M50 0x00000230
180 #define KINETIS_K_SDID_K21_M120 0x00000330
181 #define KINETIS_K_SDID_K22_M50 0x00000210
182 #define KINETIS_K_SDID_K22_M120 0x00000310
183 #define KINETIS_K_SDID_K30_M72 0x000000A0
184 #define KINETIS_K_SDID_K30_M100 0x00000120
185 #define KINETIS_K_SDID_K40_M72 0x000000B0
186 #define KINETIS_K_SDID_K40_M100 0x00000130
187 #define KINETIS_K_SDID_K50_M72 0x000000E0
188 #define KINETIS_K_SDID_K51_M72 0x000000F0
189 #define KINETIS_K_SDID_K53 0x00000170
190 #define KINETIS_K_SDID_K60_M100 0x00000140
191 #define KINETIS_K_SDID_K60_M150 0x000001C0
192 #define KINETIS_K_SDID_K70_M150 0x000001D0
194 #define KINETIS_K_REVID_MASK 0x0000F000
195 #define KINETIS_K_REVID_SHIFT 12
197 #define KINETIS_SDID_SERIESID_MASK 0x00F00000
198 #define KINETIS_SDID_SERIESID_K 0x00000000
199 #define KINETIS_SDID_SERIESID_KL 0x00100000
200 #define KINETIS_SDID_SERIESID_KE 0x00200000
201 #define KINETIS_SDID_SERIESID_KW 0x00500000
202 #define KINETIS_SDID_SERIESID_KV 0x00600000
204 #define KINETIS_SDID_SUBFAMID_SHIFT 24
205 #define KINETIS_SDID_SUBFAMID_MASK 0x0F000000
206 #define KINETIS_SDID_SUBFAMID_KX0 0x00000000
207 #define KINETIS_SDID_SUBFAMID_KX1 0x01000000
208 #define KINETIS_SDID_SUBFAMID_KX2 0x02000000
209 #define KINETIS_SDID_SUBFAMID_KX3 0x03000000
210 #define KINETIS_SDID_SUBFAMID_KX4 0x04000000
211 #define KINETIS_SDID_SUBFAMID_KX5 0x05000000
212 #define KINETIS_SDID_SUBFAMID_KX6 0x06000000
213 #define KINETIS_SDID_SUBFAMID_KX7 0x07000000
214 #define KINETIS_SDID_SUBFAMID_KX8 0x08000000
216 #define KINETIS_SDID_FAMILYID_SHIFT 28
217 #define KINETIS_SDID_FAMILYID_MASK 0xF0000000
218 #define KINETIS_SDID_FAMILYID_K0X 0x00000000
219 #define KINETIS_SDID_FAMILYID_K1X 0x10000000
220 #define KINETIS_SDID_FAMILYID_K2X 0x20000000
221 #define KINETIS_SDID_FAMILYID_K3X 0x30000000
222 #define KINETIS_SDID_FAMILYID_K4X 0x40000000
223 #define KINETIS_SDID_FAMILYID_K5X 0x50000000
224 #define KINETIS_SDID_FAMILYID_K6X 0x60000000
225 #define KINETIS_SDID_FAMILYID_K7X 0x70000000
226 #define KINETIS_SDID_FAMILYID_K8X 0x80000000
227 #define KINETIS_SDID_FAMILYID_KL8X 0x90000000
230 #define KINETIS_SDID_PROJECTID_MASK KINETIS_SDID_DIEID_MASK
231 #define KINETIS_SDID_PROJECTID_KE1XF 0x00000080
232 #define KINETIS_SDID_PROJECTID_KE1XZ 0x00000100
244 #define KINETIS_SDID_S32K_SERIES_MASK 0xFF000000
245 #define KINETIS_SDID_S32K_SERIES_K11X 0x11000000
246 #define KINETIS_SDID_S32K_SERIES_K14X 0x14000000
248 #define KINETIS_SDID_S32K_DERIVATE_MASK 0x00F00000
249 #define KINETIS_SDID_S32K_DERIVATE_KXX2 0x00200000
250 #define KINETIS_SDID_S32K_DERIVATE_KXX3 0x00300000
251 #define KINETIS_SDID_S32K_DERIVATE_KXX4 0x00400000
252 #define KINETIS_SDID_S32K_DERIVATE_KXX5 0x00500000
253 #define KINETIS_SDID_S32K_DERIVATE_KXX6 0x00600000
254 #define KINETIS_SDID_S32K_DERIVATE_KXX8 0x00800000
276 #define KINETIS_MAX_BANKS 4u
385 #define MDM_REG_STAT 0x00
386 #define MDM_REG_CTRL 0x04
387 #define MDM_REG_ID 0xfc
389 #define MDM_STAT_FMEACK (1<<0)
390 #define MDM_STAT_FREADY (1<<1)
391 #define MDM_STAT_SYSSEC (1<<2)
392 #define MDM_STAT_SYSRES (1<<3)
393 #define MDM_STAT_FMEEN (1<<5)
394 #define MDM_STAT_BACKDOOREN (1<<6)
395 #define MDM_STAT_LPEN (1<<7)
396 #define MDM_STAT_VLPEN (1<<8)
397 #define MDM_STAT_LLSMODEXIT (1<<9)
398 #define MDM_STAT_VLLSXMODEXIT (1<<10)
399 #define MDM_STAT_CORE_HALTED (1<<16)
400 #define MDM_STAT_CORE_SLEEPDEEP (1<<17)
401 #define MDM_STAT_CORESLEEPING (1<<18)
403 #define MDM_CTRL_FMEIP (1<<0)
404 #define MDM_CTRL_DBG_DIS (1<<1)
405 #define MDM_CTRL_DBG_REQ (1<<2)
406 #define MDM_CTRL_SYS_RES_REQ (1<<3)
407 #define MDM_CTRL_CORE_HOLD_RES (1<<4)
408 #define MDM_CTRL_VLLSX_DBG_REQ (1<<5)
409 #define MDM_CTRL_VLLSX_DBG_ACK (1<<6)
410 #define MDM_CTRL_VLLSX_STAT_ACK (1<<7)
412 #define MDM_ACCESS_TIMEOUT 500
440 LOG_DEBUG(
"MDM: failed to queue a write request");
466 LOG_DEBUG(
"MDM: failed to queue a read request");
483 uint32_t
mask, uint32_t value, uint32_t timeout_ms)
487 int64_t ms_timeout =
timeval_ms() + timeout_ms;
518 LOG_ERROR(
"Cannot perform halt with a high-level adapter");
531 LOG_DEBUG(
"MDM: failed to read MDM_REG_STAT");
548 LOG_DEBUG(
"MDM: halt succeeded after %d attempts.", tries);
561 LOG_ERROR(
"MDM: failed to clear MDM_REG_CTRL");
578 LOG_ERROR(
"Cannot perform reset with a high-level adapter");
584 LOG_ERROR(
"MDM: failed to write MDM_REG_CTRL");
590 LOG_ERROR(
"MDM: failed to assert reset");
596 LOG_ERROR(
"MDM: failed to clear MDM_REG_CTRL");
618 LOG_ERROR(
"Cannot perform mass erase with a high-level adapter");
638 if (retval !=
ERROR_OK && !has_srst) {
639 LOG_ERROR(
"MDM: failed to assert reset");
640 goto deassert_reset_and_exit;
657 int cnt_mass_erase_disabled = 0;
660 bool man_reset_requested =
false;
666 if (!man_reset_requested && ms_elapsed > 100) {
667 LOG_INFO(
"MDM: Press RESET button now if possible.");
668 man_reset_requested =
true;
671 if (ms_elapsed > 3000) {
672 LOG_ERROR(
"MDM: waiting for mass erase conditions timed out.");
673 LOG_INFO(
"Mass erase of a secured MCU is not possible without hardware reset.");
674 LOG_INFO(
"Connect SRST, use 'reset_config srst_only' and retry.");
675 goto deassert_reset_and_exit;
685 cnt_mass_erase_disabled++;
686 if (cnt_mass_erase_disabled > 10) {
687 LOG_ERROR(
"MDM: mass erase is disabled");
688 goto deassert_reset_and_exit;
698 }
while (cnt_ready < 32);
707 LOG_ERROR(
"MDM: failed to start mass erase");
708 goto deassert_reset_and_exit;
720 goto deassert_reset_and_exit;
738 LOG_ERROR(
"MDM: failed to clear MDM_REG_CTRL");
744 deassert_reset_and_exit:
770 LOG_WARNING(
"Cannot check flash security status with a high-level adapter");
786 LOG_ERROR(
"MDM: failed to read ID register");
813 LOG_ERROR(
"MDM: failed to read MDM_REG_STAT");
824 int secured_score = 0, flash_not_ready_score = 0;
834 for (
unsigned int i = 0; i < 32; i++) {
841 LOG_DEBUG(
"MDM: dap_run failed when validating secured state");
844 for (
unsigned int i = 0; i < 32; i++) {
848 flash_not_ready_score++;
852 if (flash_not_ready_score <= 8 && secured_score > 24) {
855 LOG_WARNING(
"*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
857 LOG_WARNING(
"**** Your Kinetis MCU is in secured state, which means that, ****");
858 LOG_WARNING(
"**** with exception for very basic communication, JTAG/SWD ****");
859 LOG_WARNING(
"**** interface will NOT work. In order to restore its ****");
860 LOG_WARNING(
"**** functionality please issue 'kinetis mdm mass_erase' ****");
861 LOG_WARNING(
"**** command, power cycle the MCU and restart OpenOCD. ****");
863 LOG_WARNING(
"*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
865 }
else if (flash_not_ready_score > 24) {
867 LOG_WARNING(
"**** Your Kinetis MCU is probably locked-up in RESET/WDOG loop. ****");
868 LOG_WARNING(
"**** Common reason is a blank flash (at least a reset vector). ****");
869 LOG_WARNING(
"**** Issue 'kinetis mdm halt' command or if SRST is connected ****");
870 LOG_WARNING(
"**** and configured, use 'reset halt' ****");
871 LOG_WARNING(
"**** If MCU cannot be halted, it is likely secured and running ****");
872 LOG_WARNING(
"**** in RESET/WDOG loop. Issue 'kinetis mdm mass_erase' ****");
875 LOG_INFO(
"MDM: Chip is unsecured. Continuing.");
906 for (
int i = 0; i < argc; i++) {
907 if (strcmp(argv[i],
"-sim-base") == 0) {
910 }
else if (strcmp(argv[i],
"-s32k") == 0) {
913 LOG_ERROR(
"Unsupported flash bank option %s", argv[i]);
980 unsigned int num_blocks;
983 char base_name[69],
name[87], num[11];
994 strncpy(base_name,
bank->name,
sizeof(base_name) - 1);
995 base_name[
sizeof(base_name) - 1] =
'\0';
996 p = strstr(base_name,
".pflash");
1001 snprintf(
name,
sizeof(
name),
"%s.pflash0", base_name);
1008 base_name[
sizeof(base_name) - 1] =
'\0';
1009 p = strstr(base_name,
".cpu");
1014 for (
unsigned int bank_idx = 1; bank_idx < num_blocks; bank_idx++) {
1015 k_bank = &(k_chip->
banks[bank_idx]);
1023 if (bank_idx < k_chip->num_pflash_blocks) {
1026 snprintf(num,
sizeof(num),
"%u", bank_idx);
1030 snprintf(num,
sizeof(num),
"%u",
1040 bank->default_padded_value =
bank->erased_value = 0xff;
1043 snprintf(
name,
sizeof(
name),
"%s.%s%s",
1044 base_name,
class, num);
1087 wdog_algorithm->
address + code_size - 2,
1093 LOG_ERROR(
"Error executing Kinetis WDOG unlock algorithm");
1110 static const uint8_t kinetis_unlock_wdog_code[] = {
1111 #include "../../../contrib/loaders/watchdog/armv7m_kinetis_wdog.inc"
1118 if ((wdog & 0x1) == 0) {
1122 LOG_INFO(
"Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%04" PRIx16
")", wdog);
1132 LOG_INFO(
"WDOG_STCTRLH = 0x%04" PRIx16, wdog);
1141 static const uint8_t kinetis_unlock_wdog_code[] = {
1142 #include "../../../contrib/loaders/watchdog/armv7m_kinetis_wdog32.inc"
1149 if ((wdog_cs & 0x80) == 0)
1152 LOG_INFO(
"Disabling Kinetis watchdog (initial WDOG_CS 0x%08" PRIx32
")", wdog_cs);
1162 if ((wdog_cs & 0x80) == 0)
1165 LOG_ERROR(
"Cannot disable Kinetis watchdog (WDOG_CS 0x%08" PRIx32
"), issue 'reset init'", wdog_cs);
1188 case KINETIS_WDOG_K:
1191 case KINETIS_WDOG_COP:
1196 if ((sim_copc & 0xc) == 0)
1199 LOG_INFO(
"Disabling Kinetis watchdog (initial SIM_COPC 0x%02" PRIx8
")", sim_copc);
1208 if ((sim_copc & 0xc) == 0)
1211 LOG_ERROR(
"Cannot disable Kinetis watchdog (SIM_COPC 0x%02" PRIx8
"), issue 'reset init'", sim_copc);
1214 case KINETIS_WDOG32_KE1X:
1217 case KINETIS_WDOG32_KL28:
1245 LOG_ERROR(
"Flash operation failed, illegal command");
1248 }
else if (fstat & 0x10)
1249 LOG_ERROR(
"Flash operation failed, protection violated");
1251 else if (fstat & 0x40)
1252 LOG_ERROR(
"Flash operation failed, read collision");
1254 else if (fstat & 0x80)
1276 for (
unsigned int i = 0; i < 50; i++) {
1285 if ((fstat & 0x80) == 0) {
1289 if (fstat != 0x80) {
1298 #include "../../../contrib/loaders/flash/kinetis/kinetis_flash.inc"
1303 uint32_t
offset, uint32_t wcount)
1306 uint32_t buffer_size;
1311 uint32_t end_address;
1320 LOG_WARNING(
"no working area available, can't do block memory writes");
1331 if (buffer_size < 256) {
1332 LOG_WARNING(
"large enough working area not available, can't do block memory writes");
1334 }
else if (buffer_size > 16384) {
1336 buffer_size = 16384;
1340 LOG_ERROR(
"allocating working area failed");
1367 end_address =
buf_get_u32(reg_params[0].value, 0, 32);
1369 LOG_ERROR(
"Error writing flash at %08" PRIx32, end_address);
1379 LOG_ERROR(
"Error executing kinetis Flash programming algorithm");
1397 LOG_ERROR(
"Protection setting is possible with 'kinetis fcf_source protection' only!");
1401 if (!
bank->prot_blocks ||
bank->num_prot_blocks == 0) {
1402 LOG_ERROR(
"No protection possible for current bank!");
1406 for (
unsigned int i = first; i <
bank->num_prot_blocks && i <= last; i++)
1407 bank->prot_blocks[i].is_protected = set;
1409 LOG_INFO(
"Protection bits will be written at the next FCF sector erase or write.");
1410 LOG_INFO(
"Do not issue 'flash info' command until protection is written,");
1411 LOG_INFO(
"doing so would re-read protection status from MCU.");
1443 LOG_ERROR(
"Protection checks for FlexRAM not supported");
1448 for (
unsigned int i = 0; i <
bank->num_prot_blocks; i++) {
1449 if ((fprot >> b) & 1)
1450 bank->prot_blocks[i].is_protected = 0;
1452 bank->prot_blocks[i].is_protected = 1;
1463 uint32_t fprot = 0xffffffff;
1464 uint8_t fsec = 0xfe;
1465 uint8_t fdprot = 0xff;
1466 unsigned int num_blocks;
1467 uint32_t pflash_bit;
1481 for (
unsigned int bank_idx = 0; bank_idx < num_blocks; bank_idx++) {
1482 k_bank = &(k_chip->
banks[bank_idx]);
1483 bank_iter = k_bank->
bank;
1486 LOG_WARNING(
"Missing bank %u configuration, FCF protection flags may be incomplete", bank_idx);
1497 fprot &= ~pflash_bit;
1505 fdprot &= ~dflash_bit;
1521 uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7,
1522 uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb,
1523 uint8_t *ftfx_fstat)
1525 uint8_t
command[12] = {faddr & 0xff, (faddr >> 8) & 0xff, (faddr >> 16) & 0xff, fcmd,
1526 fccob7, fccob6, fccob5, fccob4,
1527 fccobb, fccoba, fccob9, fccob8};
1554 *ftfx_fstat = fstat;
1556 if ((fstat & 0xf0) != 0x80) {
1557 LOG_DEBUG(
"ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
1583 *pmstat = stat32 & 0xff;
1626 LOG_INFO(
"Switching from VLPR to RUN mode.");
1644 for (
unsigned int i = 100; i > 0; i--) {
1654 LOG_ERROR(
"Flash operation not possible in current run mode: SMC_PMSTAT: 0x%x", pmstat);
1655 LOG_ERROR(
"Issue a 'reset init' command.");
1665 case KINETIS_CACHE_K:
1671 case KINETIS_CACHE_L:
1676 case KINETIS_CACHE_MSCM:
1681 case KINETIS_CACHE_MSCM2:
1709 if ((first >
bank->num_sectors) || (last >
bank->num_sectors))
1717 for (
unsigned int i = first; i <= last; i++) {
1720 0, 0, 0, 0, 0, 0, 0, 0,
NULL);
1731 LOG_WARNING(
"Flash Configuration Field erased, DO NOT reset or power off the device");
1732 LOG_WARNING(
"until correct FCF is programmed or MCU gets security lock.");
1739 LOG_WARNING(
"Flash Configuration Field write failed");
1761 if (ftfx_fcnfg & (1 << 1))
1766 0, 0, 0, 0, 0, 0, 0, 0,
NULL);
1775 if (ftfx_fcnfg & (1 << 1))
1788 uint8_t *buffer_aligned =
NULL;
1795 uint32_t prog_section_chunk_bytes = k_bank->
sector_size >> 8;
1799 uint32_t
size = prog_size_bytes -
offset % prog_size_bytes;
1800 uint32_t align_begin =
offset % prog_section_chunk_bytes;
1802 uint32_t size_aligned;
1803 uint16_t chunk_count;
1809 align_end = (align_begin +
size) % prog_section_chunk_bytes;
1811 align_end = prog_section_chunk_bytes - align_end;
1813 size_aligned = align_begin +
size + align_end;
1814 chunk_count = size_aligned / prog_section_chunk_bytes;
1816 if (
size != size_aligned) {
1818 if (!buffer_aligned)
1819 buffer_aligned = malloc(prog_size_bytes);
1821 memset(buffer_aligned, 0xff, size_aligned);
1822 memcpy(buffer_aligned + align_begin,
buffer,
size);
1825 4, size_aligned / 4, buffer_aligned);
1829 bank->base +
offset, align_begin, align_end);
1832 4, size_aligned / 4,
buffer);
1839 LOG_ERROR(
"target_write_memory failed");
1846 chunk_count>>8, chunk_count, 0, 0,
1847 0, 0, 0, 0, &ftfx_fstat);
1855 if (ftfx_fstat & 0x01) {
1860 LOG_ERROR(
"Flash write immediately after the end of Flash Config Field shows error");
1861 LOG_ERROR(
"because the flash memory is 256 bits wide (data were written correctly).");
1862 LOG_ERROR(
"Either change the linker script to add a gap of 16 bytes after FCF");
1863 LOG_ERROR(
"or set 'kinetis fcf_source write'");
1874 free(buffer_aligned);
1883 bool fallback =
false;
1890 LOG_INFO(
"This device supports Program Longword execution only.");
1895 LOG_WARNING(
"FlexRAM not ready, fallback to slow longword write.");
1906 uint8_t *new_buffer =
NULL;
1910 LOG_ERROR(
"offset 0x%" PRIx32
" breaks the required alignment",
offset);
1915 uint32_t old_count =
count;
1916 count = (old_count | 3) + 1;
1917 new_buffer = malloc(
count);
1919 LOG_ERROR(
"odd number of bytes to write and no memory "
1920 "for padding buffer");
1923 LOG_INFO(
"odd number of bytes to write (%" PRIu32
"), extending to %" PRIu32
" "
1924 "and padding with 0xff", old_count,
count);
1925 memset(new_buffer + old_count, 0xff,
count - old_count);
1929 uint32_t words_remaining =
count / 4;
1939 LOG_WARNING(
"couldn't use block writes, falling back to single "
1942 while (words_remaining) {
1949 0, 0, 0, 0, &ftfx_fstat);
1957 if (ftfx_fstat & 0x01)
1970 LOG_ERROR(
"Flash write strategy not implemented");
1983 bool set_fcf =
false;
1984 bool fcf_in_data_valid =
false;
1985 bool fcf_differs =
false;
2006 if (offset < bank->sectors[sect].
offset +
bank->sectors[sect].size
2016 if (fcf_in_data_valid) {
2018 if (memcmp(fcf_in_data, fcf_buffer, 8)) {
2020 LOG_INFO(
"Setting of backdoor key is not supported in mode 'kinetis fcf_source protection'.");
2024 LOG_INFO(
"Flash protection requested in the programmed file differs from current setting.");
2028 LOG_INFO(
"Data flash protection requested in the programmed file differs from current setting.");
2030 if ((fcf_in_data[
FCF_FSEC] & 3) != 2) {
2031 fcf_in_data_valid =
false;
2032 LOG_INFO(
"Device security requested in the programmed file! Write denied.");
2035 LOG_INFO(
"Strange unsecure mode 0x%02" PRIx8
2036 " requested in the programmed file, set FSEC = 0x%02" PRIx8
2037 " in the startup code!",
2042 LOG_INFO(
"FOPT requested in the programmed file differs from current setting, set 'kinetis fopt 0x%02"
2043 PRIx8
"'.", fcf_in_data[
FCF_FOPT]);
2049 fcf_in_data_valid =
false;
2050 LOG_INFO(
"Cannot re-program FCF. Expect verify errors at FCF (0x400-0x40f).");
2052 LOG_INFO(
"Trying to re-program FCF.");
2054 LOG_INFO(
"Flash re-programming may fail on this device!");
2060 if (set_fcf && !fcf_in_data_valid) {
2079 LOG_WARNING(
"Flash Configuration Field written.");
2080 LOG_WARNING(
"Reset or power off the device to make settings effective.");
2099 uint8_t fcfg1_eesize, fcfg1_depart;
2100 uint32_t ee_size = 0;
2101 uint32_t pflash_size_k, nvm_size_k, dflash_size_k;
2102 unsigned int generation = 0, subseries = 0, derivate = 0;
2110 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
2120 generation = (k_chip->
sim_sdid) >> 28 & 0x0f;
2121 subseries = (k_chip->
sim_sdid) >> 24 & 0x0f;
2122 derivate = (k_chip->
sim_sdid) >> 20 & 0x0f;
2207 LOG_ERROR(
"Unsupported S32K1xx-series");
2220 fcfg1_depart = (k_chip->
sim_fcfg1 >> 12) & 0x0f;
2221 fcfg1_eesize = (k_chip->
sim_fcfg1 >> 16) & 0x0f;
2222 if (fcfg1_eesize <= 9)
2223 ee_size = (16 << (10 - fcfg1_eesize));
2224 if ((fcfg1_depart & 0x8) == 0) {
2232 if (fcfg1_depart & 0x7)
2233 k_chip->
dflash_size = 4096 << (fcfg1_depart & 0x7);
2238 snprintf(k_chip->
name,
sizeof(k_chip->
name),
"S32K%u%u%u",
2239 generation, subseries, derivate);
2247 nvm_size_k = k_chip->
nvm_size / 1024;
2250 LOG_INFO(
"%u FlexNVM banks: %" PRIu32
" KiB total, %" PRIu32
" KiB available as data flash, %"
2251 PRIu32
" bytes FlexRAM",
2267 uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg1_depart;
2268 uint8_t fcfg2_pflsh;
2269 uint32_t ee_size = 0;
2270 uint32_t pflash_size_k, nvm_size_k, dflash_size_k;
2271 uint32_t pflash_size_m;
2272 unsigned int num_blocks = 0;
2273 unsigned int maxaddr_shift = 13;
2276 unsigned int familyid = 0, subfamid = 0;
2277 unsigned int cpu_mhz = 120;
2278 bool use_nvm_marking =
false;
2279 char flash_marking[12], nvm_marking[2];
2318 k_chip->
flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
2331 k_chip->
flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
2347 k_chip->
flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
2356 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
2366 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
2369 LOG_ERROR(
"Unsupported K-family FAMID");
2375 use_nvm_marking =
true;
2392 strcat(
name,
" Rev 1.x");
2405 use_nvm_marking =
true;
2430 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
2444 LOG_ERROR(
"Unsupported Kinetis K22 DIEID");
2457 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
2473 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
2484 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_ECC;
2495 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_ECC;
2505 k_chip->
flash_support = FS_PROGRAM_LONGWORD | FS_NO_CMD_BLOCKSTAT;
2514 k_chip->
flash_support = FS_PROGRAM_LONGWORD | FS_NO_CMD_BLOCKSTAT;
2517 use_nvm_marking =
false;
2518 snprintf(
name,
sizeof(
name),
"MKL8%uZ%%s7",
2523 LOG_ERROR(
"Unsupported Kinetis FAMILYID SUBFAMID");
2526 if (
name[0] ==
'\0')
2527 snprintf(
name,
sizeof(
name),
"MK%u%uF%%s%u",
2528 familyid, subfamid, cpu_mhz / 10);
2556 snprintf(
name,
sizeof(
name),
"MKL%u%uZ%%s%u",
2557 familyid, subfamid, cpu_mhz / 10);
2593 LOG_ERROR(
"Unsupported KW FAMILYID SUBFAMID");
2595 snprintf(
name,
sizeof(
name),
"MKW%u%uZ%%s%u",
2596 familyid, subfamid, cpu_mhz / 10);
2609 strcpy(
name,
"MKV10Z%s7");
2618 strcpy(
name,
"MKV11Z%s7");
2649 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_WIDTH_256BIT | FS_ECC;
2656 LOG_ERROR(
"Unsupported KV FAMILYID SUBFAMID");
2659 if (
name[0] ==
'\0')
2660 snprintf(
name,
sizeof(
name),
"MKV%u%uF%%s%u",
2661 familyid, subfamid, cpu_mhz / 10);
2676 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
2680 snprintf(
name,
sizeof(
name),
"MKE%u%uZ%%s%u",
2681 familyid, subfamid, cpu_mhz / 10);
2692 k_chip->
flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
2696 snprintf(
name,
sizeof(
name),
"MKE%u%uF%%s%u",
2697 familyid, subfamid, cpu_mhz / 10);
2701 LOG_ERROR(
"Unsupported KE FAMILYID SUBFAMID");
2723 LOG_DEBUG(
"SDID: 0x%08" PRIX32
" FCFG1: 0x%08" PRIX32
" FCFG2: 0x%08" PRIX32, k_chip->
sim_sdid,
2726 fcfg1_nvmsize = (uint8_t)((k_chip->
sim_fcfg1 >> 28) & 0x0f);
2727 fcfg1_pfsize = (uint8_t)((k_chip->
sim_fcfg1 >> 24) & 0x0f);
2728 fcfg1_eesize = (uint8_t)((k_chip->
sim_fcfg1 >> 16) & 0x0f);
2729 fcfg1_depart = (uint8_t)((k_chip->
sim_fcfg1 >> 8) & 0x0f);
2731 fcfg2_pflsh = (uint8_t)((k_chip->
sim_fcfg2 >> 23) & 0x01);
2735 if (num_blocks == 0)
2741 LOG_WARNING(
"MAXADDR1 is zero, number of flash banks adjusted to 1");
2744 LOG_WARNING(
"MAXADDR1 is non zero, number of flash banks adjusted to 2");
2749 switch (fcfg1_nvmsize) {
2755 k_chip->
nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
2769 switch (fcfg1_eesize) {
2780 ee_size = (16 << (10 - fcfg1_eesize));
2787 switch (fcfg1_depart) {
2805 k_chip->
dflash_size = 4096 << (fcfg1_depart & 0x7);
2813 switch (fcfg1_pfsize) {
2824 k_chip->
pflash_size = 1 << (14 + (fcfg1_pfsize >> 1));
2842 LOG_WARNING(
"SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %" PRIu32
" KB", k_chip->
pflash_size>>10);
2863 if (use_nvm_marking) {
2865 nvm_marking[1] =
'\0';
2867 nvm_marking[0] =
'\0';
2870 pflash_size_m = pflash_size_k / 1024;
2872 snprintf(flash_marking,
sizeof(flash_marking),
"%s%" PRIu32
"M0xxx", nvm_marking, pflash_size_m);
2874 snprintf(flash_marking,
sizeof(flash_marking),
"%s%" PRIu32
"xxx", nvm_marking, pflash_size_k);
2876 snprintf(k_chip->
name,
sizeof(k_chip->
name),
name, flash_marking);
2877 LOG_INFO(
"Kinetis %s detected: %u flash blocks", k_chip->
name, num_blocks);
2880 nvm_size_k = k_chip->
nvm_size / 1024;
2882 LOG_INFO(
"%u FlexNVM banks: %" PRIu32
" KiB total, %" PRIu32
" KiB available as data flash, %"
2883 PRIu32
" bytes FlexRAM", k_chip->
num_nvm_blocks, nvm_size_k, dflash_size_k, ee_size);
2897 uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1;
2898 unsigned int num_blocks, first_nvm_bank;
2937 size_k =
bank->size / 1024;
2938 LOG_DEBUG(
"Kinetis bank %u: %" PRIu32
"k PFlash, FTFx base 0x%08" PRIx32
", sect %" PRIu32,
2943 unsigned int nvm_ord = k_bank->
bank_number - first_nvm_bank;
2971 if (
bank->size > limit) {
2973 LOG_DEBUG(
"FlexNVM bank %u limited to 0x%08" PRIx32
" due to active EEPROM backup",
2977 size_k =
bank->size / 1024;
2978 LOG_DEBUG(
"Kinetis bank %u: %" PRIu32
"k FlexNVM, FTFx base 0x%08" PRIx32
", sect %" PRIu32,
2982 LOG_ERROR(
"Cannot determine parameters for bank %u, only %u banks on device",
2989 fcfg2_pflsh = (uint8_t)((k_chip->
sim_fcfg2 >> 23) & 0x01);
2990 fcfg2_maxaddr0 = (uint8_t)((k_chip->
sim_fcfg2 >> 24) & 0x7f);
2991 fcfg2_maxaddr1 = (uint8_t)((k_chip->
sim_fcfg2 >> 16) & 0x7f);
2994 LOG_WARNING(
"MAXADDR0 0x%02" PRIx8
" check failed,"
2995 " please report to OpenOCD mailing list", fcfg2_maxaddr0);
2999 LOG_WARNING(
"MAXADDR1 0x%02" PRIx8
" check failed,"
3000 " please report to OpenOCD mailing list", fcfg2_maxaddr1);
3004 LOG_WARNING(
"FlexNVM MAXADDR1 0x%02" PRIx8
" check failed,"
3005 " please report to OpenOCD mailing list", fcfg2_maxaddr1);
3009 free(
bank->sectors);
3012 free(
bank->prot_blocks);
3016 LOG_ERROR(
"Unknown sector size for bank %u",
bank->bank_number);
3022 if (
bank->num_sectors > 0) {
3029 if (!
bank->prot_blocks)
3033 bank->num_prot_blocks = 0;
3045 if (k_bank && k_bank->
probed)
3053 const char *bank_class_names[] = {
3054 "(ANY)",
"PFlash",
"FlexNVM",
"FlexRAM"
3059 uint32_t size_k =
bank->size / 1024;
3087 bool block_dirty =
true;
3091 if (use_block_cmd && k_bank->
flash_class == FC_FLEX_NVM) {
3092 uint8_t fcfg1_depart = (uint8_t)((k_chip->
sim_fcfg1 >> 8) & 0x0f);
3094 if (fcfg1_depart != 0xf && fcfg1_depart != 0)
3095 use_block_cmd =
false;
3098 if (use_block_cmd) {
3101 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
3105 else if ((ftfx_fstat & 0x01) == 0)
3106 block_dirty =
false;
3111 for (
unsigned int i = 0; i <
bank->num_sectors; i++) {
3115 1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
3118 bank->sectors[i].is_erased = !(ftfx_fstat & 0x01);
3120 LOG_DEBUG(
"Ignoring error on PFlash sector blank-check");
3122 bank->sectors[i].is_erased = -1;
3127 for (
unsigned int i = 0; i <
bank->num_sectors; i++)
3128 bank->sectors[i].is_erased = 1;
3131 LOG_WARNING(
"kinetis_blank_check not supported yet for FlexRAM");
3142 unsigned int bank_idx;
3143 unsigned int num_blocks, first_nvm_bank;
3144 unsigned long par, log2 = 0, ee1 = 0, ee2 = 0;
3145 enum { SHOW_INFO, DF_SIZE, EEBKP_SIZE } sz_type = SHOW_INFO;
3147 uint8_t load_flex_ram = 1;
3148 uint8_t ee_size_code = 0x3f;
3149 uint8_t flex_nvm_partition_code = 0;
3150 uint8_t ee_split = 3;
3158 LOG_ERROR(
"NVM partition not supported on S32K1xx (yet).");
3163 if (strcmp(
CMD_ARGV[0],
"dataflash") == 0)
3165 else if (strcmp(
CMD_ARGV[0],
"eebkp") == 0)
3166 sz_type = EEBKP_SIZE;
3169 while (par >> (log2 + 3))
3182 flex_nvm_partition_code = (uint8_t)((
sim_fcfg1 >> 8) & 0x0f);
3183 switch (flex_nvm_partition_code) {
3204 command_print(
CMD,
"data flash %d KB", 4 << (flex_nvm_partition_code & 7));
3210 command_print(
CMD,
"Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
3215 flex_nvm_partition_code = 0x8 | log2;
3219 flex_nvm_partition_code = log2;
3226 ee1 = ee2 = eex / 2;
3232 enable = ee1 + ee2 > 0;
3234 for (log2 = 2; ; log2++) {
3235 if (ee1 + ee2 == (16u << 10) >> log2)
3237 if (ee1 + ee2 > (16u << 10) >> log2 || log2 >= 9) {
3245 else if (ee1 * 7 == ee2)
3247 else if (ee1 != ee2) {
3248 LOG_ERROR(
"Unsupported EEPROM sizes ratio");
3252 ee_size_code = log2 | ee_split << 4;
3260 LOG_INFO(
"DEPART 0x%" PRIx8
", EEPROM size code 0x%" PRIx8,
3261 flex_nvm_partition_code, ee_size_code);
3273 ee_size_code, flex_nvm_partition_code, 0, 0,
3283 for (bank_idx = first_nvm_bank; bank_idx < num_blocks; bank_idx++)
3288 command_print(
CMD,
"FlexNVM banks will be re-probed to set new data flash size.");
3298 if (strcmp(
CMD_ARGV[0],
"write") == 0)
3300 else if (strcmp(
CMD_ARGV[0],
"protection") == 0)
3309 LOG_WARNING(
"BEWARE: incorrect flash configuration may permanently lock the device.");
3311 command_print(
CMD,
"Protection info writes to Flash Configuration Field enabled.");
3312 command_print(
CMD,
"Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
3345 .
name =
"check_security",
3347 .help =
"Check status of device security lock",
3349 .handler = kinetis_check_flash_security_status,
3354 .help =
"Issue a halt via the MDM-AP",
3356 .handler = kinetis_mdm_halt,
3359 .name =
"mass_erase",
3361 .help =
"Issue a complete flash erase via the MDM-AP",
3363 .handler = kinetis_mdm_mass_erase,
3368 .help =
"Issue a reset via the MDM-AP",
3370 .handler = kinetis_mdm_reset,
3379 .help =
"MDM-AP command group",
3384 .
name =
"disable_wdog",
3386 .help =
"Disable the watchdog timer",
3388 .handler = kinetis_disable_wdog_handler,
3391 .name =
"nvm_partition",
3393 .help =
"Show/set data flash or EEPROM backup size in kilobytes,"
3394 " set two EEPROM sizes in bytes and FlexRAM loading during reset",
3395 .usage =
"('info'|'dataflash' size|'eebkp' size) [eesize1 eesize2] ['on'|'off']",
3396 .handler = kinetis_nvm_partition,
3399 .name =
"fcf_source",
3401 .help =
"Use protection as a source for Flash Configuration Field or allow writing arbitrary values to the FCF"
3402 " Mode 'protection' is safe from unwanted locking of the device.",
3403 .usage =
"['protection'|'write']",
3404 .handler = kinetis_fcf_source_handler,
3409 .help =
"FCF_FOPT value source in 'kinetis fcf_source protection' mode",
3411 .handler = kinetis_fopt_handler,
3414 .name =
"create_banks",
3416 .help =
"Driver creates additional banks if device with two/four flash blocks is probed",
3417 .handler = kinetis_create_banks_handler,
3427 .help =
"Kinetis flash controller commands",
3439 .flash_bank_command = kinetis_flash_bank_command,
void init_reg_param(struct reg_param *param, char *reg_name, uint32_t size, enum param_direction direction)
void destroy_reg_param(struct reg_param *param)
struct adiv5_ap * dap_get_ap(struct adiv5_dap *dap, uint64_t ap_num)
int dap_put_ap(struct adiv5_ap *ap)
This defines formats and data structures used to talk to ADIv5 entities.
static int dap_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data)
Queue an AP register read.
static int dap_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, uint32_t data)
Queue an AP register write.
static int dap_run(struct adiv5_dap *dap)
Perform all queued DAP operations, and clear any errors posted in the CTRL_STAT register when they ar...
#define ARMV7M_COMMON_MAGIC
Support functions to access arbitrary bits in a byte array.
static uint32_t buf_get_u32(const uint8_t *_buffer, unsigned int first, unsigned int num)
Retrieves num bits from _buffer, starting at the first bit, returning the bits in a 32-bit word.
static void buf_set_u32(uint8_t *_buffer, unsigned int first, unsigned int num, uint32_t value)
Sets num bits in _buffer, starting at the first bit, using the bits in value.
void command_print_sameline(struct command_invocation *cmd, const char *format,...)
void command_print(struct command_invocation *cmd, const char *format,...)
#define CMD
Use this macro to access the command being handled, rather than accessing the variable directly.
#define CMD_ARGV
Use this macro to access the arguments for the command being handled, rather than accessing the varia...
#define COMMAND_PARSE_ON_OFF(in, out)
parses an on/off command argument
#define ERROR_COMMAND_SYNTAX_ERROR
#define CMD_ARGC
Use this macro to access the number of arguments for the command being handled, rather than accessing...
#define COMMAND_PARSE_NUMBER(type, in, out)
parses the string in into out as a type, or prints a command error and passes the error code to the c...
#define CMD_CTX
Use this macro to access the context of the command being handled, rather than accessing the variable...
#define COMMAND_REGISTRATION_DONE
Use this as the last entry in an array of command_registration records.
static struct cortex_m_common * target_to_cm(struct target *target)
#define ERROR_FLASH_OPER_UNSUPPORTED
#define ERROR_FLASH_BANK_INVALID
#define ERROR_FLASH_OPERATION_FAILED
#define ERROR_FLASH_DST_BREAKS_ALIGNMENT
struct flash_sector * alloc_block_array(uint32_t offset, uint32_t size, unsigned int num_blocks)
Allocate and fill an array of sectors or protection blocks.
void flash_bank_add(struct flash_bank *bank)
Adds a new NOR bank to the global list of banks.
int default_flash_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
Provides default read implementation for flash memory.
struct flash_bank * flash_bank_list(void)
void jtag_poll_set_enabled(bool value)
Assign flag reporting whether JTAG polling is disallowed.
int adapter_deassert_reset(void)
enum reset_types jtag_get_reset_config(void)
int adapter_assert_reset(void)
#define KINETIS_SOPT1_RAMSIZE_K24FN1M
#define KINETIS_K_SDID_K60_M100
#define KINETIS_SDID_DIEID_K22FN256
#define KINETIS_SDID_SERIESID_MASK
static int kinetis_probe_chip_s32k(struct kinetis_chip *k_chip)
static int kinetis_protect_check(struct flash_bank *bank)
#define KINETIS_K_SDID_K22_M50
#define KINETIS_SDID_PROJECTID_KE1XF
#define KINETIS_SDID_FAMILYID_SHIFT
#define FTFX_CMD_SECTERASE
static int kinetis_create_missing_banks(struct kinetis_chip *k_chip)
#define KINETIS_SDID_SUBFAMID_MASK
static int kinetis_info(struct flash_bank *bank, struct command_invocation *cmd)
#define KINETIS_SDID_SERIESID_KL
#define KINETIS_SDID_S32K_SERIES_MASK
static int kinetis_blank_check(struct flash_bank *bank)
#define KINETIS_K_SDID_K21_M120
#define KINETIS_K_SDID_K30_M100
#define KINETIS_K_SDID_K12
#define KINETIS_K_SDID_K40_M72
static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t wcount)
#define FTFX_CMD_SETFLEXRAM
static int kinetis_probe(struct flash_bank *bank)
#define KINETIS_SDID_FAMILYID_K1X
#define KINETIS_SDID_SUBFAMID_KX6
#define KINETIS_MAX_BANKS
#define MDM_CTRL_CORE_HOLD_RES
static int kinetis_chip_options(struct kinetis_chip *k_chip, int argc, const char *argv[])
#define KINETIS_SDID_S32K_SERIES_K14X
static int kinetis_disable_wdog32(struct target *target, uint32_t wdog_base)
#define KINETIS_SDID_FAMILYID_K3X
#define KINETIS_K_SDID_K60_M150
#define KINETIS_SDID_DIEID_K24FN1M
#define KINETIS_SDID_FAMILYID_MASK
#define KINETIS_K_REVID_MASK
#define KINETIS_K_SDID_K20_M100
static int kinetis_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last)
#define KINETIS_K_SDID_K22_M120
#define KINETIS_SDID_PROJECTID_MASK
static const uint8_t kinetis_flash_write_code[]
static const struct kinetis_type kinetis_types_old[]
#define KINETIS_SDID_FAMILYID_KL8X
#define KINETIS_SDID_FAMILYID_K5X
COMMAND_HANDLER(kinetis_mdm_halt)
static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf)
#define KINETIS_K_SDID_K40_M100
#define KINETIS_SDID_SERIESID_K
#define KINETIS_SDID_SERIESID_KV
#define KINETIS_SDID_S32K_DERIVATE_KXX8
static const struct command_registration kinetis_exec_command_handlers[]
#define KINETIS_SDID_SUBFAMID_KX2
#define FTFX_CMD_BLOCKSTAT
#define KINETIS_K_SDID_TYPE_MASK
#define KINETIS_K_SDID_K70_M150
static int kinetis_make_ram_ready(struct target *target)
#define KINETIS_SDID_FAMILYID_K4X
#define KINETIS_K_SDID_K53
static int kinetis_probe_chip(struct kinetis_chip *k_chip)
#define KINETIS_SDID_DIEID_MASK
#define KINETIS_K_REVID_SHIFT
#define KINETIS_SDID_PROJECTID_KE1XZ
static int kinetis_disable_wdog_kx(struct target *target)
static int kinetis_ftfx_clear_error(struct target *target)
#define KINETIS_SDID_S32K_DERIVATE_KXX5
#define KINETIS_SDID_SERIESID_KW
static int kinetis_check_run_mode(struct kinetis_chip *k_chip)
#define KINETIS_SDID_K_SERIES_MASK
#define KINETIS_SDID_SUBFAMID_KX8
#define KINETIS_SDID_S32K_DERIVATE_KXX4
#define KINETIS_SDID_S32K_DERIVATE_KXX3
#define KINETIS_K_SDID_K10_M100
#define KINETIS_SDID_SUBFAMID_KX7
static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
#define KINETIS_SDID_FAMILYID_K8X
static int kinetis_auto_probe(struct flash_bank *bank)
#define KINETIS_K_SDID_K20_M120
#define KINETIS_SDID_SUBFAMID_SHIFT
#define KINETIS_SDID_SUBFAMID_KX0
static int kinetis_ftfx_command(struct target *target, uint8_t fcmd, uint32_t faddr, uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7, uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb, uint8_t *ftfx_fstat)
#define KINETIS_SDID_SUBFAMID_KX3
#define KINETIS_K_SDID_K10_M120
#define KINETIS_SDID_FAMILYID_K0X
static void kinetis_invalidate_flash_cache(struct kinetis_chip *k_chip)
#define KINETIS_SDID_FAMILYID_K2X
static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
const struct flash_driver kinetis_flash
#define KINETIS_K_SDID_K30_M72
static const uint32_t kinetis_known_mdm_ids[]
#define KINETIS_SDID_SUBFAMID_KX5
FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result)
static void kinetis_free_driver_priv(struct flash_bank *bank)
#define KINETIS_SDID_SUBFAMID_KX1
#define KINETIS_K_SDID_K11
#define KINETIS_K_SDID_K20_M72
#define KINETIS_SDID_S32K_SERIES_K11X
static int kinetis_ftfx_prepare(struct target *target)
#define KINETIS_SDID_DIEID_K22FN128
#define KINETIS_K_SDID_K10_M50
#define FTFX_CMD_SECTSTAT
#define KINETIS_SDID_S32K_DERIVATE_MASK
static bool allow_fcf_writes
static struct kinetis_chip * kinetis_get_chip(struct target *target)
static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value)
#define FTFX_CMD_LWORDPROG
#define KINETIS_K_SDID_K10_M72
static int kinetis_disable_wdog(struct kinetis_chip *k_chip)
#define KINETIS_SDID_DIEID_K22FN512
#define KINETIS_SDID_S32K_DERIVATE_KXX2
#define KINETIS_SDID_DIEID_K24FN256
#define KINETIS_SDID_SERIESID_KE
#define MDM_ACCESS_TIMEOUT
static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned int reg, uint32_t mask, uint32_t value, uint32_t timeout_ms)
static int kinetis_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
#define KINETIS_K_SDID_K51_M72
static const struct command_registration kinetis_command_handler[]
static int kinetis_read_pmstat(struct kinetis_chip *k_chip, uint8_t *pmstat)
#define KINETIS_SOPT1_RAMSIZE_MASK
static int kinetis_disable_wdog_algo(struct target *target, size_t code_size, const uint8_t *code, uint32_t wdog_base)
#define KINETIS_SDID_FAMILYID_K6X
static int kinetis_ftfx_decode_error(uint8_t fstat)
#define KINETIS_K_SDID_K50_M72
#define KINETIS_SDID_S32K_DERIVATE_KXX6
#define FTFX_CMD_SECTWRITE
#define KINETIS_K_SDID_K21_M50
static const struct command_registration kinetis_security_command_handlers[]
#define KINETIS_K_SDID_K20_M50
#define MDM_CTRL_SYS_RES_REQ
#define WDOG_STCTRLH_OFFSET
#define KINETIS_SDID_SUBFAMID_KX4
void alive_sleep(uint64_t ms)
#define LOG_WARNING(expr ...)
#define LOG_ERROR(expr ...)
#define LOG_INFO(expr ...)
#define LOG_DEBUG(expr ...)
#define FLASH_WRITE_GAP_SECTOR
size_t size
Size of the control block search area.
This represents an ARM Debug Interface (v5) Access Port (AP).
struct adiv5_dap * dap
DAP this AP belongs to.
This represents an ARM Debug Interface (v5) Debug Access Port (DAP).
const struct dap_ops * ops
struct adiv5_dap * dap
For targets conforming to ARM Debug Interface v5, this handle references the Debug Access Port (DAP) ...
unsigned int common_magic
When run_command is called, a new instance will be created on the stack, filled with the proper value...
struct armv7m_common armv7m
Provides details of a flash bank, available either on-chip or through a major interface.
unsigned int num_prot_blocks
The number of protection blocks in this bank.
const struct flash_driver * driver
Driver for this bank.
void * driver_priv
Private driver storage pointer.
struct flash_sector * prot_blocks
Array of protection blocks, allocated and initialized by the flash driver.
struct flash_bank * next
The next flash bank on this chip.
struct target * target
Target to which this bank belongs.
Provides the implementation-independent structure that defines all of the callbacks required by OpenO...
const char * name
Gives a human-readable name of this flash driver, This field is used to select and initialize the dri...
int is_protected
Indication of protection status: 0 = unprotected/unlocked, 1 = protected/locked, other = unknown.
enum kinetis_chip::@10 watchdog_type
unsigned int nvm_sector_size
struct kinetis_flash_bank banks[KINETIS_MAX_BANKS]
unsigned int num_nvm_blocks
enum kinetis_chip::@7 chip_type
enum kinetis_chip::@8 flash_support
unsigned int pflash_sector_size
enum kinetis_chip::@9 cache_type
enum kinetis_chip::@11 sysmodectrlr_type
unsigned int max_flash_prog_size
unsigned int num_pflash_blocks
uint32_t fcfg2_maxaddr0_shifted
uint32_t fcfg2_maxaddr1_shifted
struct kinetis_chip * k_chip
enum kinetis_flash_bank::@6 flash_class
uint32_t protection_block
int(* deassert_reset)(struct target *target)
The implementation is responsible for polling the target such that target->state reflects the state c...
int(* assert_reset)(struct target *target)
struct target_type * type
void target_buffer_set_u32(struct target *target, uint8_t *buffer, uint32_t value)
int target_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
int target_write_u8(struct target *target, target_addr_t address, uint8_t value)
int target_read_u8(struct target *target, target_addr_t address, uint8_t *value)
int target_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, target_addr_t entry_point, target_addr_t exit_point, unsigned int timeout_ms, void *arch_info)
Downloads a target-specific native code algorithm to the target, and executes it.
int target_write_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
Write count items of size bytes to the memory of target at the address given.
uint32_t target_get_working_area_avail(struct target *target)
int target_alloc_working_area(struct target *target, uint32_t size, struct working_area **area)
int target_write_u32(struct target *target, target_addr_t address, uint32_t value)
int target_poll(struct target *target)
int target_free_working_area(struct target *target, struct working_area *area)
Free a working area.
int target_read_u16(struct target *target, target_addr_t address, uint16_t *value)
int target_run_flash_async_algorithm(struct target *target, const uint8_t *buffer, uint32_t count, int block_size, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t buffer_start, uint32_t buffer_size, uint32_t entry_point, uint32_t exit_point, void *arch_info)
Streams data to a circular buffer on target intended for consumption by code running asynchronously o...
int target_read_u32(struct target *target, target_addr_t address, uint32_t *value)
int target_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
Read count items of size bytes from the memory of target at the address given.
struct target * get_current_target(struct command_context *cmd_ctx)
#define ERROR_TARGET_NOT_HALTED
static const char * target_name(const struct target *target)
Returns the instance-specific name of the specified target.
#define ERROR_TARGET_RESOURCE_NOT_AVAILABLE
#define ARRAY_SIZE(x)
Compute the number of elements of a variable length array.