OpenOCD
adiv5_dap Struct Reference

This represents an ARM Debug Interface (v5) Debug Access Port (DAP). More...

Collaboration diagram for adiv5_dap:

Data Fields

uint8_t ack
 
unsigned int adi_version
 Indicates ADI version (5, 6 or 0 for unknown) being used. More...
 
struct adiv5_ap ap [DP_APSEL_MAX+1]
 
uint64_t apsel
 
unsigned int asize
 
struct list_head cmd_journal
 
struct list_head cmd_pool
 
size_t cmd_pool_size
 
bool do_reconnect
 Signals that an attempt to reestablish communication afresh should be performed before the next access. More...
 
uint32_t dp_ctrl_stat
 
bool ignore_syspwrupack
 Flag saying whether to ignore the syspwrupack flag in DAP. More...
 
uint32_t * last_read
 Holds the pointer to the destination word for the last queued read, for use with posted AP read sequence optimization. More...
 
bool multidrop_dp_id_valid
 TPARTNO and TDESIGNER fields of multidrop_targetsel have been configured. More...
 
bool multidrop_instance_id_valid
 TINSTANCE field of multidrop_targetsel has been configured. More...
 
uint32_t multidrop_targetsel
 Value to select DP in SWD multidrop mode or DP_TARGETSEL_INVALID. More...
 
bool nu_npcx_quirks
 
const struct dap_opsops
 
uint64_t select
 Cache for DP SELECT and SELECT1 (ADIv6) register. More...
 
bool select1_valid
 
bool select_dpbanksel_valid
 Partial DPBANKSEL validity for SWD only. More...
 
bool select_valid
 Validity of DP SELECT cache. More...
 
bool stlink_flush_ap_write
 STLINK adapter need to know if last AP operation was read or write, and in case of write has to flush it with a dummy read from DP_RDBUFF. More...
 
bool switch_through_dormant
 Record if enter in SWD required passing through DORMANT. More...
 
struct jtag_taptap
 
bool ti_be_32_quirks
 

Detailed Description

This represents an ARM Debug Interface (v5) Debug Access Port (DAP).

A DAP has two types of component: one Debug Port (DP), which is a transport agent; and at least one Access Port (AP), controlling resource access.

There are two basic DP transports: JTAG, and ARM's low pin-count SWD. Accordingly, this interface is responsible for hiding the transport differences so upper layer code can largely ignore them.

When the chip is implemented with JTAG-DP or SW-DP, the transport is fixed as JTAG or SWD, respectively. Chips incorporating SWJ-DP permit a choice made at board design time (by only using the SWD pins), or as part of setting up a debug session (if all the dual-role JTAG/SWD signals are available).

Definition at line 348 of file arm_adi_v5.h.

Field Documentation

◆ ack

uint8_t adiv5_dap::ack

Definition at line 386 of file arm_adi_v5.h.

◆ adi_version

unsigned int adiv5_dap::adi_version

Indicates ADI version (5, 6 or 0 for unknown) being used.

Definition at line 433 of file arm_adi_v5.h.

Referenced by dap_configure(), dap_init_all(), and is_adiv6().

◆ ap

◆ apsel

uint64_t adiv5_dap::apsel

Definition at line 367 of file arm_adi_v5.h.

Referenced by COMMAND_HANDLER(), and cortex_a_examine_first().

◆ asize

◆ cmd_journal

struct list_head adiv5_dap::cmd_journal

◆ cmd_pool

struct list_head adiv5_dap::cmd_pool

Definition at line 349 of file arm_adi_v5.h.

Referenced by dap_cmd_new(), dap_cmd_release(), dap_instance_init(), and jtag_quit().

◆ cmd_pool_size

size_t adiv5_dap::cmd_pool_size

Definition at line 358 of file arm_adi_v5.h.

Referenced by dap_cmd_new(), dap_cmd_release(), and jtag_limit_queue_size().

◆ do_reconnect

bool adiv5_dap::do_reconnect

◆ dp_ctrl_stat

uint32_t adiv5_dap::dp_ctrl_stat

◆ ignore_syspwrupack

bool adiv5_dap::ignore_syspwrupack

Flag saying whether to ignore the syspwrupack flag in DAP.

Some devices do not set this bit until later in the bringup sequence

Definition at line 418 of file arm_adi_v5.h.

Referenced by dap_configure(), dap_dp_init(), and jtagdp_transaction_endcheck().

◆ last_read

uint32_t* adiv5_dap::last_read

Holds the pointer to the destination word for the last queued read, for use with posted AP read sequence optimization.

Definition at line 392 of file arm_adi_v5.h.

Referenced by adi_jtag_finish_read(), dap_invalidate_cache(), jtag_ap_q_read(), jtag_ap_q_write(), jtag_dp_q_read(), jtag_dp_q_write(), swd_finish_read(), and swd_queue_ap_read().

◆ multidrop_dp_id_valid

bool adiv5_dap::multidrop_dp_id_valid

TPARTNO and TDESIGNER fields of multidrop_targetsel have been configured.

Definition at line 423 of file arm_adi_v5.h.

Referenced by dap_configure(), and dap_is_multidrop().

◆ multidrop_instance_id_valid

bool adiv5_dap::multidrop_instance_id_valid

TINSTANCE field of multidrop_targetsel has been configured.

Definition at line 425 of file arm_adi_v5.h.

Referenced by dap_configure(), and dap_is_multidrop().

◆ multidrop_targetsel

uint32_t adiv5_dap::multidrop_targetsel

Value to select DP in SWD multidrop mode or DP_TARGETSEL_INVALID.

Definition at line 421 of file arm_adi_v5.h.

Referenced by dap_check_config(), dap_configure(), and swd_multidrop_select_inner().

◆ nu_npcx_quirks

bool adiv5_dap::nu_npcx_quirks

Definition at line 402 of file arm_adi_v5.h.

Referenced by COMMAND_HANDLER(), and mem_ap_write().

◆ ops

◆ select

◆ select1_valid

◆ select_dpbanksel_valid

bool adiv5_dap::select_dpbanksel_valid

Partial DPBANKSEL validity for SWD only.

ADIv6 line reset sets DP SELECT DPBANKSEL to zero, ADIv5 does not. We can rely on it for the banked DP register 0 also on ADIv5 as ADIv5 has no mapping for DP reg 0 - it is always DPIDR. It is important to avoid setting DP SELECT in connection reset state before reading DPIDR.

Definition at line 383 of file arm_adi_v5.h.

Referenced by dap_invalidate_cache(), swd_connect_single(), swd_multidrop_select_inner(), swd_queue_dp_bankselect(), and swd_queue_dp_write_inner().

◆ select_valid

◆ stlink_flush_ap_write

bool adiv5_dap::stlink_flush_ap_write

STLINK adapter need to know if last AP operation was read or write, and in case of write has to flush it with a dummy read from DP_RDBUFF.

Definition at line 408 of file arm_adi_v5.h.

Referenced by stlink_dap_ap_read(), stlink_dap_ap_write(), and stlink_dap_run_finalize().

◆ switch_through_dormant

bool adiv5_dap::switch_through_dormant

Record if enter in SWD required passing through DORMANT.

Definition at line 430 of file arm_adi_v5.h.

Referenced by swd_connect_single().

◆ tap

struct jtag_tap* adiv5_dap::tap

◆ ti_be_32_quirks

bool adiv5_dap::ti_be_32_quirks

Definition at line 398 of file arm_adi_v5.h.

Referenced by COMMAND_HANDLER(), mem_ap_init(), mem_ap_read(), and mem_ap_write().


The documentation for this struct was generated from the following file: