Go to the source code of this file.
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static int | esp32s2_arch_state (struct target *target) |
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static int | esp32s2_assert_reset (struct target *target) |
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static int | esp32s2_deassert_reset (struct target *target) |
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static int | esp32s2_disable_wdts (struct target *target) |
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static int | esp32s2_on_halt (struct target *target) |
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static int | esp32s2_poll (struct target *target) |
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static int | esp32s2_set_peri_reg_mask (struct target *target, target_addr_t addr, uint32_t mask, uint32_t val) |
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static int | esp32s2_soc_reset (struct target *target) |
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static int | esp32s2_soft_reset_halt (struct target *target) |
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static int | esp32s2_stall (struct target *target) |
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static int | esp32s2_stall_set (struct target *target, bool stall) |
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static int | esp32s2_step (struct target *target, int current, target_addr_t address, int handle_breakpoints) |
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static int | esp32s2_target_create (struct target *target, Jim_Interp *interp) |
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static int | esp32s2_target_init (struct command_context *cmd_ctx, struct target *target) |
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static int | esp32s2_unstall (struct target *target) |
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static int | esp32s2_virt2phys (struct target *target, target_addr_t virtual, target_addr_t *physical) |
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◆ ESP32_S2_CLK_CONF
◆ ESP32_S2_CLK_CONF_DEF
#define ESP32_S2_CLK_CONF_DEF 0x1583218 |
◆ ESP32_S2_DPORT_PMS_OCCUPY_3
#define ESP32_S2_DPORT_PMS_OCCUPY_3 0x3F4C10E0 |
◆ ESP32_S2_DR_REG_HIGH
#define ESP32_S2_DR_REG_HIGH 0x3f4d3FFC |
◆ ESP32_S2_DR_REG_LOW
#define ESP32_S2_DR_REG_LOW 0x3f400000 |
◆ ESP32_S2_DR_REG_UART_BASE
#define ESP32_S2_DR_REG_UART_BASE 0x3f400000 |
◆ ESP32_S2_OPTIONS0
◆ ESP32_S2_REG_UART_BASE
◆ ESP32_S2_RTC_CNTL_DIG_PWC_REG
◆ ESP32_S2_RTC_CNTL_DIG_PWC_REG_OFF
#define ESP32_S2_RTC_CNTL_DIG_PWC_REG_OFF 0x8C |
◆ ESP32_S2_RTC_DATA_HIGH
#define ESP32_S2_RTC_DATA_HIGH 0x50002000 |
◆ ESP32_S2_RTC_DATA_LOW
#define ESP32_S2_RTC_DATA_LOW 0x50000000 |
◆ ESP32_S2_RTCCNTL_BASE
#define ESP32_S2_RTCCNTL_BASE 0x3f408000 |
◆ ESP32_S2_RTCWDT_CFG
◆ ESP32_S2_RTCWDT_CFG_OFF
#define ESP32_S2_RTCWDT_CFG_OFF 0x94 |
◆ ESP32_S2_RTCWDT_PROTECT
◆ ESP32_S2_RTCWDT_PROTECT_OFF
#define ESP32_S2_RTCWDT_PROTECT_OFF 0xAC |
◆ ESP32_S2_STORE4
◆ ESP32_S2_STORE5
◆ ESP32_S2_SW_CPU_STALL
◆ ESP32_S2_SW_STALL_PROCPU_C0_M
◆ ESP32_S2_SW_STALL_PROCPU_C0_S
#define ESP32_S2_SW_STALL_PROCPU_C0_S 2 |
◆ ESP32_S2_SW_STALL_PROCPU_C0_V
#define ESP32_S2_SW_STALL_PROCPU_C0_V 0x3 |
◆ ESP32_S2_SW_STALL_PROCPU_C1_M
◆ ESP32_S2_SW_STALL_PROCPU_C1_S
#define ESP32_S2_SW_STALL_PROCPU_C1_S 26 |
◆ ESP32_S2_SW_STALL_PROCPU_C1_V
#define ESP32_S2_SW_STALL_PROCPU_C1_V 0x3FU |
◆ ESP32_S2_SW_SYS_RST_M
#define ESP32_S2_SW_SYS_RST_M 0x80000000 |
◆ ESP32_S2_SW_SYS_RST_S
#define ESP32_S2_SW_SYS_RST_S 31 |
◆ ESP32_S2_SW_SYS_RST_V
#define ESP32_S2_SW_SYS_RST_V 0x1 |
◆ ESP32_S2_SWD_AUTO_FEED_EN_M
#define ESP32_S2_SWD_AUTO_FEED_EN_M BIT(31) |
◆ ESP32_S2_SWD_CONF_OFF
#define ESP32_S2_SWD_CONF_OFF 0xB0 |
◆ ESP32_S2_SWD_CONF_REG
◆ ESP32_S2_SWD_WKEY_VALUE
#define ESP32_S2_SWD_WKEY_VALUE 0x8F1D312AU |
◆ ESP32_S2_SWD_WPROTECT_OFF
#define ESP32_S2_SWD_WPROTECT_OFF 0xB4 |
◆ ESP32_S2_SWD_WPROTECT_REG
◆ ESP32_S2_SYS_RAM_HIGH
◆ ESP32_S2_SYS_RAM_LOW
#define ESP32_S2_SYS_RAM_LOW 0x60000000UL |
◆ ESP32_S2_TIMG0_BASE
#define ESP32_S2_TIMG0_BASE 0x3f41F000 |
◆ ESP32_S2_TIMG0WDT_CFG0
◆ ESP32_S2_TIMG0WDT_PROTECT
◆ ESP32_S2_TIMG1_BASE
#define ESP32_S2_TIMG1_BASE 0x3f420000 |
◆ ESP32_S2_TIMG1WDT_CFG0
◆ ESP32_S2_TIMG1WDT_PROTECT
◆ ESP32_S2_TIMGWDT_CFG0_OFF
#define ESP32_S2_TIMGWDT_CFG0_OFF 0x48 |
◆ ESP32_S2_TIMGWDT_PROTECT_OFF
#define ESP32_S2_TIMGWDT_PROTECT_OFF 0x64 |
◆ ESP32_S2_TRACEMEM_BLOCK_SZ
#define ESP32_S2_TRACEMEM_BLOCK_SZ 0x4000 |
◆ ESP32_S2_UART_DATE_REG
◆ ESP32_S2_WDT_WKEY_VALUE
#define ESP32_S2_WDT_WKEY_VALUE 0x50d83aa1 |
◆ esp32s2_arch_state()
static int esp32s2_arch_state |
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struct target * |
target | ) |
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◆ esp32s2_assert_reset()
static int esp32s2_assert_reset |
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struct target * |
target | ) |
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◆ esp32s2_deassert_reset()
static int esp32s2_deassert_reset |
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struct target * |
target | ) |
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◆ esp32s2_disable_wdts()
static int esp32s2_disable_wdts |
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struct target * |
target | ) |
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Definition at line 304 of file esp32s2.c.
References ERROR_OK, ESP32_S2_RTCWDT_CFG, ESP32_S2_RTCWDT_PROTECT, ESP32_S2_SWD_AUTO_FEED_EN_M, ESP32_S2_SWD_CONF_REG, ESP32_S2_SWD_WKEY_VALUE, ESP32_S2_SWD_WPROTECT_REG, ESP32_S2_TIMG0WDT_CFG0, ESP32_S2_TIMG0WDT_PROTECT, ESP32_S2_TIMG1WDT_CFG0, ESP32_S2_TIMG1WDT_PROTECT, ESP32_S2_WDT_WKEY_VALUE, LOG_ERROR, target_read_u32(), and target_write_u32().
Referenced by esp32s2_on_halt(), and esp32s2_soc_reset().
◆ esp32s2_on_halt()
static int esp32s2_on_halt |
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struct target * |
target | ) |
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◆ esp32s2_poll()
static int esp32s2_poll |
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struct target * |
target | ) |
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Definition at line 383 of file esp32s2.c.
References ERROR_OK, esp32s2_on_halt(), esp_xtensa_poll(), esp_xtensa_semihosting(), LOG_ERROR, esp_semihost_data::need_resume, esp_xtensa_common::semihost, SEMIHOSTING_HANDLED, target::state, target_call_event_callbacks(), TARGET_DEBUG_RUNNING, TARGET_EVENT_DEBUG_HALTED, TARGET_EVENT_HALTED, TARGET_HALTED, target_resume(), and target_to_esp_xtensa().
◆ esp32s2_set_peri_reg_mask()
static int esp32s2_set_peri_reg_mask |
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struct target * |
target, |
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target_addr_t |
addr, |
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uint32_t |
mask, |
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uint32_t |
val |
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◆ esp32s2_soc_reset()
static int esp32s2_soc_reset |
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struct target * |
target | ) |
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Definition at line 178 of file esp32s2.c.
References alive_sleep(), BIT, ERROR_OK, ERROR_TARGET_TIMEOUT, ESP32_S2_CLK_CONF, ESP32_S2_CLK_CONF_DEF, ESP32_S2_DPORT_PMS_OCCUPY_3, ESP32_S2_OPTIONS0, ESP32_S2_RTC_CNTL_DIG_PWC_REG, ESP32_S2_STORE4, ESP32_S2_STORE5, ESP32_S2_SW_SYS_RST_M, ESP32_S2_SW_SYS_RST_S, esp32s2_disable_wdts(), esp32s2_set_peri_reg_mask(), esp32s2_stall(), esp32s2_unstall(), LOG_DEBUG, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, OCDDCR_RUNSTALLINEN, target::reset_halt, target::state, xtensa::suppress_dsr_errors, TARGET_HALTED, TARGET_RESET, TARGET_RUNNING, target_to_xtensa(), target_wait_state(), target_write_u32(), timeval_ms(), xtensa_assert_reset(), xtensa_deassert_reset(), xtensa_halt(), xtensa_poll(), and xtensa_smpbreak_write().
Referenced by esp32s2_soft_reset_halt().
◆ esp32s2_soft_reset_halt()
static int esp32s2_soft_reset_halt |
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struct target * |
target | ) |
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◆ esp32s2_stall()
static int esp32s2_stall |
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struct target * |
target | ) |
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inlinestatic |
◆ esp32s2_stall_set()
static int esp32s2_stall_set |
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struct target * |
target, |
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bool |
stall |
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Definition at line 132 of file esp32s2.c.
References ERROR_OK, ESP32_S2_OPTIONS0, ESP32_S2_SW_CPU_STALL, ESP32_S2_SW_STALL_PROCPU_C0_M, ESP32_S2_SW_STALL_PROCPU_C0_S, ESP32_S2_SW_STALL_PROCPU_C1_M, ESP32_S2_SW_STALL_PROCPU_C1_S, esp32s2_set_peri_reg_mask(), LOG_ERROR, and LOG_TARGET_DEBUG.
Referenced by esp32s2_stall(), and esp32s2_unstall().
◆ esp32s2_step()
static int esp32s2_step |
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struct target * |
target, |
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int |
current, |
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target_addr_t |
address, |
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int |
handle_breakpoints |
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◆ esp32s2_target_create()
static int esp32s2_target_create |
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struct target * |
target, |
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Jim_Interp * |
interp |
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◆ esp32s2_target_init()
◆ esp32s2_unstall()
static int esp32s2_unstall |
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struct target * |
target | ) |
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inlinestatic |
◆ esp32s2_virt2phys()
◆ esp32s2_command_handlers
Initial value:= {
{
},
{
.usage = "",
},
{
.help = "ARM Command Group",
.usage = "",
},
}
#define COMMAND_REGISTRATION_DONE
Use this as the last entry in an array of command_registration records.
const struct command_registration esp32_apptrace_command_handlers[]
const struct command_registration semihosting_common_handlers[]
const struct command_registration xtensa_command_handlers[]
Definition at line 447 of file esp32s2.c.
◆ esp32s2_dbg_ops
Initial value:= {
}
int xtensa_dm_queue_reg_read(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint8_t *value)
int xtensa_dm_queue_reg_write(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint32_t value)
int xtensa_dm_queue_enable(struct xtensa_debug_module *dm)
Definition at line 423 of file esp32s2.c.
◆ esp32s2_pwr_ops
Initial value:= {
}
int xtensa_dm_queue_pwr_reg_write(struct xtensa_debug_module *dm, enum xtensa_dm_pwr_reg reg, uint32_t data)
int xtensa_dm_queue_pwr_reg_read(struct xtensa_debug_module *dm, enum xtensa_dm_pwr_reg reg, uint8_t *data, uint32_t clear)
Definition at line 423 of file esp32s2.c.
◆ esp32s2_semihost_ops
Initial value:= {
}
static int esp32s2_disable_wdts(struct target *target)
Definition at line 423 of file esp32s2.c.
◆ esp32s2_target