17 #define FLASH_ERASE_TIMEOUT 10000
18 #define FLASH_WRITE_TIMEOUT 5
23 #define FLASH_ACR 0x00
24 #define FLASH_KEYR 0x04
25 #define FLASH_OPTKEYR 0x08
28 #define FLASH_CCR 0x14
29 #define FLASH_OPTCR 0x18
30 #define FLASH_OPTSR_CUR 0x1C
31 #define FLASH_OPTSR_PRG 0x20
32 #define FLASH_OPTCCR 0x24
33 #define FLASH_WPSN_CUR 0x38
34 #define FLASH_WPSN_PRG 0x3C
38 #define FLASH_LOCK (1 << 0)
39 #define FLASH_PG (1 << 1)
40 #define FLASH_SER (1 << 2)
41 #define FLASH_BER (1 << 3)
42 #define FLASH_PSIZE_8 (0 << 4)
43 #define FLASH_PSIZE_16 (1 << 4)
44 #define FLASH_PSIZE_32 (2 << 4)
45 #define FLASH_PSIZE_64 (3 << 4)
46 #define FLASH_FW (1 << 6)
47 #define FLASH_START (1 << 7)
50 #define FLASH_BSY (1 << 0)
51 #define FLASH_QW (1 << 2)
52 #define FLASH_WRPERR (1 << 17)
53 #define FLASH_PGSERR (1 << 18)
54 #define FLASH_STRBERR (1 << 19)
55 #define FLASH_INCERR (1 << 21)
56 #define FLASH_OPERR (1 << 22)
57 #define FLASH_RDPERR (1 << 23)
58 #define FLASH_RDSERR (1 << 24)
59 #define FLASH_SNECCERR (1 << 25)
60 #define FLASH_DBECCERR (1 << 26)
62 #define FLASH_ERROR (FLASH_WRPERR | FLASH_PGSERR | FLASH_STRBERR | FLASH_INCERR | FLASH_OPERR | \
63 FLASH_RDPERR | FLASH_RDSERR | FLASH_SNECCERR | FLASH_DBECCERR)
66 #define OPT_LOCK (1 << 0)
67 #define OPT_START (1 << 1)
70 #define OPT_BSY (1 << 0)
72 #define OPT_RDP_MASK (0xff << OPT_RDP_POS)
73 #define OPT_OPTCHANGEERR (1 << 30)
76 #define OPT_CLR_OPTCHANGEERR (1 << 30)
79 #define KEY1 0x45670123
80 #define KEY2 0xCDEF89AB
83 #define OPTKEY1 0x08192A3B
84 #define OPTKEY2 0x4C5D6E7F
86 #define DBGMCU_IDCODE_REGISTER 0x5C001000
87 #define FLASH_BANK0_ADDRESS 0x08000000
88 #define FLASH_BANK1_ADDRESS 0x08100000
89 #define FLASH_REG_BASE_B0 0x52002000
90 #define FLASH_REG_BASE_B1 0x52002100
93 #define DEVID_STM32H74_H75XX 0x450
94 #define DEVID_STM32H7A_H7BXX 0x480
95 #define DEVID_STM32H72_H73XX 0x483
137 { 0x1000,
"A" }, { 0x1001,
"Z" }, { 0x1003,
"Y" }, { 0x2001,
"X" }, { 0x2003,
"V" },
145 { 0x1000,
"A" }, { 0x1001,
"Z" },
150 return cmd | (snb << 8);
161 return cmd | (tmp >> 2) | (snb << 6);
169 .device_str =
"STM32H74x/75x",
172 .max_flash_size_kb = 2048,
173 .max_bank_size_kb = 1024,
174 .has_dual_bank =
true,
175 .fsize_addr = 0x1FF1E880,
184 .device_str =
"STM32H7Ax/7Bx",
187 .max_flash_size_kb = 2048,
188 .max_bank_size_kb = 1024,
189 .has_dual_bank =
true,
190 .fsize_addr = 0x08FFF80C,
192 .wps_mask = 0xFFFFFFFF,
199 .device_str =
"STM32H72x/73x",
202 .max_flash_size_kb = 1024,
203 .max_bank_size_kb = 1024,
204 .has_dual_bank =
false,
205 .fsize_addr = 0x1FF1E880,
222 bank->driver_priv = stm32x_info;
224 stm32x_info->
probed =
false;
242 LOG_ERROR(
"error while reading from address 0x%" PRIx32, reg_addr);
253 LOG_ERROR(
"error while writing to address 0x%" PRIx32, reg_addr);
278 LOG_ERROR(
"wait_flash_op_queue, time out expired, status: 0x%" PRIx32,
status);
285 LOG_ERROR(
"wait_flash_op_queue, WRPERR detected");
327 LOG_ERROR(
"flash not unlocked STM32_FLASH_CRx: 0x%" PRIx32,
ctrl);
358 LOG_ERROR(
"options not unlocked STM32_FLASH_OPTCR: 0x%" PRIx32,
ctrl);
382 goto flash_options_lock;
387 goto flash_options_lock;
392 goto flash_options_lock;
397 goto flash_options_lock;
405 LOG_ERROR(
"stm32x_options_program: failed to read FLASH_OPTSR_CUR");
406 goto flash_options_lock;
412 LOG_ERROR(
"waiting for OBL launch, time out expired, OPTSR: 0x%" PRIx32,
status);
414 goto flash_options_lock;
421 LOG_ERROR(
"error changing option bytes (OPTCHANGEERR=1)");
428 LOG_ERROR(
"error during the lock of flash options");
430 return (retval ==
ERROR_OK) ? retval2 : retval;
441 data = (data & ~
mask) | (value &
mask);
453 LOG_DEBUG(
"unable to read WPSN_CUR register");
457 for (
unsigned int i = 0; i <
bank->num_prot_blocks; i++)
458 bank->prot_blocks[i].is_protected = protection & (1 << i) ? 0 : 1;
469 assert(first < bank->num_sectors);
470 assert(last < bank->num_sectors);
489 for (
unsigned int i = first; i <= last; i++) {
506 LOG_ERROR(
"erase time-out or operation error sector %u", i);
514 LOG_ERROR(
"error during the lock of flash");
516 return (retval ==
ERROR_OK) ? retval2 : retval;
534 LOG_DEBUG(
"unable to read WPSN_CUR register");
538 for (
unsigned int i = first; i <= last; i++) {
540 protection &= ~(1 << i);
542 protection |= (1 << i);
548 LOG_DEBUG(
"stm32x_protect, option_bytes written WPSN 0x%" PRIx32, protection);
564 uint32_t buffer_size = 8 + data_size;
572 static const uint8_t stm32x_flash_write_code[] = {
573 #include "../../../contrib/loaders/flash/stm32/stm32h7x.inc"
578 LOG_WARNING(
"no working area available, can't do block memory writes");
583 sizeof(stm32x_flash_write_code),
584 stm32x_flash_write_code);
593 buffer_size = 8 + data_size;
594 if (data_size <= 256) {
599 LOG_WARNING(
"no large enough working area available, can't do block memory writes");
604 LOG_DEBUG(
"target_alloc_working_area_try : buffer_size -> 0x%" PRIx32, buffer_size);
634 LOG_ERROR(
"error executing stm32h7x flash write algorithm");
636 uint32_t flash_sr =
buf_get_u32(reg_params[0].value, 0, 32);
639 LOG_ERROR(
"flash memory write protected");
642 LOG_ERROR(
"flash write failed, FLASH_SR = 0x%08" PRIx32, flash_sr);
687 if (blocks_remaining) {
693 LOG_WARNING(
"couldn't use block writes, falling back to single memory accesses");
698 blocks_remaining = 0;
713 while (blocks_remaining > 0) {
735 LOG_ERROR(
"error during the lock of flash");
737 return (retval ==
ERROR_OK) ? retval2 : retval;
753 uint16_t flash_size_in_kb;
756 stm32x_info->
probed =
false;
770 device_id = stm32x_info->
idcode & 0xfff;
777 LOG_WARNING(
"Cannot identify target as a STM32H7xx family.");
789 LOG_WARNING(
"Flash register base not defined for bank %u",
bank->bank_number);
806 LOG_INFO(
"assuming %" PRIu16
"k flash", flash_size_in_kb);
808 LOG_INFO(
"flash size probed value %" PRIu16
"k", flash_size_in_kb);
824 if (flash_size_in_kb == 128)
825 has_dual_bank =
false;
828 flash_size_in_kb /= 2;
838 LOG_INFO(
"STM32H7 flash has dual banks");
839 if (
bank->base != bank1_base &&
bank->base != bank2_base) {
840 LOG_ERROR(
"STM32H7 flash bank base address config is incorrect. "
842 bank->base, bank1_base, bank2_base);
846 LOG_INFO(
"STM32H7 flash has a single bank");
847 if (
bank->base == bank2_base) {
848 LOG_ERROR(
"this device has a single bank only");
850 }
else if (
bank->base != bank1_base) {
851 LOG_ERROR(
"STM32H7 flash bank base address config is incorrect. "
853 bank->base, bank1_base);
859 bank->bank_number, flash_size_in_kb,
bank->base);
864 LOG_INFO(
"ignoring flash probed value, using configured bank size");
866 }
else if (flash_size_in_kb == 0xffff) {
872 assert(flash_size_in_kb != 0xffff);
873 bank->size = flash_size_in_kb * 1024;
879 assert(
bank->num_sectors > 0);
886 if (!
bank->sectors) {
887 LOG_ERROR(
"failed to allocate bank sectors");
893 assert(
bank->num_sectors % wpsn == 0);
895 bank->num_prot_blocks =
bank->num_sectors / wpsn;
896 assert(
bank->num_prot_blocks > 0);
898 free(
bank->prot_blocks);
901 bank->num_prot_blocks);
903 if (!
bank->prot_blocks) {
904 LOG_ERROR(
"failed to allocate bank prot_block");
908 stm32x_info->
probed =
true;
928 if (!stm32x_info->
probed) {
937 const char *rev_str =
NULL;
938 uint16_t rev_id = stm32x_info->
idcode >> 16;
940 for (
unsigned int i = 0; i <
info->num_revs; i++)
941 if (rev_id ==
info->revs[i].rev)
942 rev_str =
info->revs[i].str;
949 "%s - Rev: unknown (0x%04" PRIx16
")",
962 uint32_t optsr, cur_rdp;
973 LOG_DEBUG(
"unable to read FLASH_OPTSR_PRG register");
979 if (new_rdp == cur_rdp) {
980 LOG_INFO(
"the requested RDP value is already programmed");
992 LOG_WARNING(
"locking the entire flash device, irreversible");
1045 int retval, retval2;
1076 LOG_ERROR(
"error during the lock of flash");
1078 return (retval ==
ERROR_OK) ? retval2 : retval;
1114 uint32_t reg_offset, value;
1130 command_print(
CMD,
"stm32h7x option_write <bank> <option_reg offset> <value> [mask]");
1139 uint32_t reg_offset, value,
mask = 0xffffffff;
1152 .handler = stm32x_handle_lock_command,
1155 .help =
"Lock entire flash device.",
1159 .handler = stm32x_handle_unlock_command,
1162 .help =
"Unlock entire protected flash device.",
1165 .name =
"mass_erase",
1166 .handler = stm32x_handle_mass_erase_command,
1169 .help =
"Erase entire flash device.",
1172 .name =
"option_read",
1173 .handler = stm32x_handle_option_read_command,
1175 .usage =
"bank_id reg_offset",
1176 .help =
"Read and display device option bytes.",
1179 .name =
"option_write",
1180 .handler = stm32x_handle_option_write_command,
1182 .usage =
"bank_id reg_offset value [mask]",
1183 .help =
"Write device option bit fields with provided value.",
1192 .help =
"stm32h7x flash command group",
1202 .flash_bank_command = stm32x_flash_bank_command,
void init_reg_param(struct reg_param *param, char *reg_name, uint32_t size, enum param_direction direction)
void destroy_reg_param(struct reg_param *param)
#define ARMV7M_COMMON_MAGIC
Support functions to access arbitrary bits in a byte array.
static uint32_t buf_get_u32(const uint8_t *_buffer, unsigned first, unsigned num)
Retrieves num bits from _buffer, starting at the first bit, returning the bits in a 32-bit word.
static void buf_set_u32(uint8_t *_buffer, unsigned first, unsigned num, uint32_t value)
Sets num bits in _buffer, starting at the first bit, using the bits in value.
void command_print_sameline(struct command_invocation *cmd, const char *format,...)
void command_print(struct command_invocation *cmd, const char *format,...)
#define CMD
Use this macro to access the command being handled, rather than accessing the variable directly.
#define CALL_COMMAND_HANDLER(name, extra ...)
Use this to macro to call a command helper (or a nested handler).
#define CMD_ARGV
Use this macro to access the arguments for the command being handled, rather than accessing the varia...
#define ERROR_COMMAND_SYNTAX_ERROR
#define CMD_ARGC
Use this macro to access the number of arguments for the command being handled, rather than accessing...
#define COMMAND_PARSE_NUMBER(type, in, out)
parses the string in into out as a type, or prints a command error and passes the error code to the c...
#define COMMAND_REGISTRATION_DONE
Use this as the last entry in an array of command_registration records.
static enum cortex_m_partno cortex_m_get_partno_safe(struct target *target)
#define ERROR_FLASH_OPERATION_FAILED
struct flash_sector * alloc_block_array(uint32_t offset, uint32_t size, unsigned int num_blocks)
Allocate and fill an array of sectors or protection blocks.
int default_flash_blank_check(struct flash_bank *bank)
Provides default erased-bank check handling.
int default_flash_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
Provides default read implementation for flash memory.
void default_flash_free_driver_priv(struct flash_bank *bank)
Deallocates bank->driver_priv.
void alive_sleep(uint64_t ms)
#define LOG_WARNING(expr ...)
#define LOG_ERROR(expr ...)
#define LOG_INFO(expr ...)
#define LOG_DEBUG(expr ...)
struct rtt_control ctrl
Control block.
static int stm32x_auto_probe(struct flash_bank *bank)
static int stm32x_unlock_option_reg(struct flash_bank *bank)
static int stm32x_probe(struct flash_bank *bank)
#define FLASH_ERASE_TIMEOUT
#define DEVID_STM32H74_H75XX
#define OPT_CLR_OPTCHANGEERR
#define DEVID_STM32H72_H73XX
static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
static int stm32x_unlock_reg(struct flash_bank *bank)
static int stm32x_get_flash_status(struct flash_bank *bank, uint32_t *status)
#define DBGMCU_IDCODE_REGISTER
static int stm32x_modify_option(struct flash_bank *bank, uint32_t reg_offset, uint32_t value, uint32_t mask)
static const struct stm32h7x_part_info stm32h7x_parts[]
FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command)
static const struct command_registration stm32h7x_command_handlers[]
#define FLASH_BANK0_ADDRESS
static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
static int stm32x_write_option(struct flash_bank *bank, uint32_t reg_offset, uint32_t value)
static const struct stm32h7x_rev stm32h72_h73xx_revs[]
static int stm32x_write_flash_reg(struct flash_bank *bank, uint32_t reg_offset, uint32_t value)
static const struct stm32h7x_rev stm32h7a_h7bxx_revs[]
static int stm32x_wait_flash_op_queue(struct flash_bank *bank, int timeout)
static uint32_t stm32h7a_h7bxx_compute_flash_cr(uint32_t cmd, int snb)
#define FLASH_REG_BASE_B0
static int stm32x_get_info(struct flash_bank *bank, struct command_invocation *cmd)
COMMAND_HANDLER(stm32x_handle_lock_command)
static int stm32x_set_rdp(struct flash_bank *bank, enum stm32h7x_opt_rdp new_rdp)
static int stm32x_mass_erase(struct flash_bank *bank)
static const struct command_registration stm32h7x_exec_command_handlers[]
static int stm32x_read_flash_reg(struct flash_bank *bank, uint32_t reg_offset, uint32_t *value)
static uint32_t stm32h74_h75xx_compute_flash_cr(uint32_t cmd, int snb)
static int stm32x_read_id_code(struct flash_bank *bank, uint32_t *id)
static int stm32x_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
#define DEVID_STM32H7A_H7BXX
static uint32_t stm32x_get_flash_reg(struct flash_bank *bank, uint32_t reg_offset)
static int stm32x_lock_reg(struct flash_bank *bank)
const struct flash_driver stm32h7x_flash
static int stm32x_protect_check(struct flash_bank *bank)
static const struct stm32h7x_rev stm32h74_h75xx_revs[]
#define FLASH_BANK1_ADDRESS
static int stm32x_lock_option_reg(struct flash_bank *bank)
#define FLASH_WRITE_TIMEOUT
#define FLASH_REG_BASE_B1
static int stm32x_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last)
unsigned int common_magic
When run_command is called, a new instance will be created on the stack, filled with the proper value...
Provides details of a flash bank, available either on-chip or through a major interface.
Provides the implementation-independent structure that defines all of the callbacks required by OpenO...
const char * name
Gives a human-readable name of this flash driver, This field is used to select and initialize the dri...
const struct stm32h7x_part_info * part_info
uint16_t max_bank_size_kb
uint32_t(* compute_flash_cr)(uint32_t cmd, int snb)
uint16_t max_flash_size_kb
const struct stm32h7x_rev * revs
unsigned int page_size_kb
int target_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
int target_alloc_working_area(struct target *target, uint32_t size, struct working_area **area)
int target_write_u32(struct target *target, target_addr_t address, uint32_t value)
int target_free_working_area(struct target *target, struct working_area *area)
Free a working area.
int target_alloc_working_area_try(struct target *target, uint32_t size, struct working_area **area)
int target_read_u16(struct target *target, target_addr_t address, uint16_t *value)
int target_run_flash_async_algorithm(struct target *target, const uint8_t *buffer, uint32_t count, int block_size, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t buffer_start, uint32_t buffer_size, uint32_t entry_point, uint32_t exit_point, void *arch_info)
Streams data to a circular buffer on target intended for consumption by code running asynchronously o...
int target_read_u32(struct target *target, target_addr_t address, uint32_t *value)
#define ERROR_TARGET_NOT_HALTED
#define ERROR_TARGET_NOT_EXAMINED
static const char * target_name(struct target *target)
Returns the instance-specific name of the specified target.
#define ERROR_TARGET_RESOURCE_NOT_AVAILABLE
static bool target_was_examined(struct target *target)
#define ERROR_TARGET_FAILURE
#define ARRAY_SIZE(x)
Compute the number of elements of a variable length array.
static struct ublast_lowlevel_priv info