29 #define SPCR_MSTR 0x08
31 #define SPSR_SPRFF 0x80
32 #define SPSR_SPTEF 0x20
33 #define SPPCR_IO3FV 0x04
34 #define SPPCR_IO2FV 0x02
35 #define SPPCR_IO1FV 0x01
36 #define SPBDCR_RXBC0 BIT(0)
37 #define SPCMD_SCKDEN BIT(15)
38 #define SPCMD_SLNDEN BIT(14)
39 #define SPCMD_SPNDEN BIT(13)
40 #define SPCMD_SSLKP BIT(7)
41 #define SPCMD_BRDV0 BIT(2)
42 #define SPCMD_INIT1 (SPCMD_SCKDEN | SPCMD_SLNDEN | \
43 SPCMD_SPNDEN | SPCMD_SSLKP | \
45 #define SPCMD_INIT2 (SPCMD_SPNDEN | SPCMD_SSLKP | \
47 #define SPBFCR_TXRST BIT(7)
48 #define SPBFCR_RXRST BIT(6)
49 #define SPBFCR_TXTRG 0x30
50 #define SPBFCR_RXTRG 0x07
53 #define SH_QSPI_SPCR 0x00
54 #define SH_QSPI_SSLP 0x01
55 #define SH_QSPI_SPPCR 0x02
56 #define SH_QSPI_SPSR 0x03
57 #define SH_QSPI_SPDR 0x04
58 #define SH_QSPI_SPSCR 0x08
59 #define SH_QSPI_SPSSR 0x09
60 #define SH_QSPI_SPBR 0x0a
61 #define SH_QSPI_SPDCR 0x0b
62 #define SH_QSPI_SPCKD 0x0c
63 #define SH_QSPI_SSLND 0x0d
64 #define SH_QSPI_SPND 0x0e
65 #define SH_QSPI_DUMMY0 0x0f
66 #define SH_QSPI_SPCMD0 0x10
67 #define SH_QSPI_SPCMD1 0x12
68 #define SH_QSPI_SPCMD2 0x14
69 #define SH_QSPI_SPCMD3 0x16
70 #define SH_QSPI_SPBFCR 0x18
71 #define SH_QSPI_DUMMY1 0x19
72 #define SH_QSPI_SPBDCR 0x1a
73 #define SH_QSPI_SPBMUL0 0x1c
74 #define SH_QSPI_SPBMUL1 0x20
75 #define SH_QSPI_SPBMUL2 0x24
76 #define SH_QSPI_SPBMUL3 0x28
95 {
"SH QSPI", 0x4ba00477, 0xe6b10000 },
264 uint32_t
mask,
bool set,
293 const uint8_t *dout,
unsigned int outlen,
294 uint8_t *din,
unsigned int inlen,
295 bool xfer_start,
bool xfer_end)
299 uint8_t tdata, rdata;
301 unsigned int nbyte = outlen + inlen;
333 tdata = outlen ? *dout++ : 0;
348 if (!outlen && inlen) {
416 bool addr4b =
info->dev->size_in_bytes > (1UL << 24);
417 uint32_t address = (sector *
info->dev->sectorsize) <<
420 info->dev->erase_cmd,
421 (address >> 24) & 0xff, (address >> 16) & 0xff,
422 (address >> 8) & 0xff, (address >> 0) & 0xff
424 unsigned int doutlen = addr4b ? 5 : 4;
448 LOG_DEBUG(
"%s: from sector %u to sector %u", __func__, first, last);
455 if ((last < first) || (last >=
bank->num_sectors)) {
465 if (
info->dev->erase_cmd == 0x00)
468 for (
unsigned int sector = first; sector <= last; sector++) {
469 if (
bank->sectors[sector].is_protected) {
470 LOG_ERROR(
"Flash sector %u protected", sector);
475 for (
unsigned int sector = first; sector <= last; sector++) {
492 uint32_t io_base = (uint32_t)(
info->io_base);
493 uint32_t src_base = (uint32_t)(
info->source->address);
495 bool addr4b = !!(
info->dev->size_in_bytes > (1UL << 24));
498 LOG_DEBUG(
"%s: offset=0x%08" PRIx32
" count=0x%08" PRIx32,
507 LOG_WARNING(
"Write pasts end of flash. Extra data discarded.");
512 LOG_ERROR(
"sh_qspi_write_page: unaligned write address: %08" PRIx32,
518 for (
unsigned int sector = 0; sector <
bank->num_sectors; sector++) {
526 LOG_ERROR(
"Flash sector %u protected", sector);
531 LOG_DEBUG(
"%s: offset=0x%08" PRIx32
" count=0x%08" PRIx32,
540 LOG_WARNING(
"Reads past end of flash. Extra data discarded.");
563 (1 << 31) | (addr4b << 30) |
564 (
info->dev->pprog_cmd << 20) | chunk);
568 info->io_algorithm->address,
569 0, 10000, &arm_algo);
571 LOG_ERROR(
"error executing SH QSPI flash IO algorithm");
596 uint32_t io_base = (uint32_t)(
info->io_base);
597 uint32_t src_base = (uint32_t)(
info->source->address);
599 bool addr4b = !!(
info->dev->size_in_bytes > (1UL << 24));
602 LOG_DEBUG(
"%s: offset=0x%08" PRIx32
" count=0x%08" PRIx32,
611 LOG_WARNING(
"Reads past end of flash. Extra data discarded.");
631 (addr4b << 30) | (
info->dev->read_cmd << 20) |
636 info->io_algorithm->address,
637 0, 10000, &arm_algo);
639 LOG_ERROR(
"error executing SH QSPI flash IO algorithm");
665 uint8_t din[3] = { 0, 0, 0 };
677 *
id = (din[0] << 0) | (din[1] << 8) | (din[2] << 16);
679 if (*
id == 0xffffff) {
688 unsigned int first,
unsigned int last)
690 for (
unsigned int sector = first; sector <= last; sector++)
691 bank->sectors[sector].is_protected = set;
702 static const uint8_t sh_qspi_io_code[] = {
703 #include "../../../contrib/loaders/flash/sh_qspi/sh_qspi.inc"
718 LOG_WARNING(
"no working area available, can't do block memory writes");
723 sizeof(sh_qspi_io_code), sh_qspi_io_code);
730 info->buffer_size = 32768;
737 info->buffer_size /= 2;
738 if (
info->buffer_size <= 256) {
741 LOG_WARNING(
"no large enough working area available, can't do block memory writes");
762 info->probed =
false;
768 if (!target_device->
name) {
769 LOG_ERROR(
"Device ID 0x%" PRIx32
" is not known",
793 if (p->device_id ==
id) {
799 LOG_ERROR(
"Unknown flash device (ID 0x%08" PRIx32
")",
id);
803 LOG_INFO(
"Found flash device \'%s\' (ID 0x%08" PRIx32
")",
804 info->dev->name,
info->dev->device_id);
807 bank->size =
info->dev->size_in_bytes;
808 if (
bank->size <= (1UL << 16))
809 LOG_WARNING(
"device needs 2-byte addresses - not implemented");
812 sectorsize =
info->dev->sectorsize ?
813 info->dev->sectorsize :
814 info->dev->size_in_bytes;
817 bank->num_sectors =
info->dev->size_in_bytes / sectorsize;
818 sectors = calloc(1,
sizeof(*sectors) *
bank->num_sectors);
824 for (
unsigned int sector = 0; sector <
bank->num_sectors; sector++) {
825 sectors[sector].
offset = sector * sectorsize;
826 sectors[sector].
size = sectorsize;
831 bank->sectors = sectors;
868 " Device \'%s\' (ID 0x%08" PRIx32
")\n",
869 info->dev->name,
info->dev->device_id);
880 if (CMD_ARGC < 6 || CMD_ARGC > 7)
901 .flash_bank_command = sh_qspi_flash_bank_command,
void init_reg_param(struct reg_param *param, char *reg_name, uint32_t size, enum param_direction direction)
void destroy_reg_param(struct reg_param *param)
Holds the interface to ARM cores.
Macros used to generate various ARM or Thumb opcodes.
Support functions to access arbitrary bits in a byte array.
static void buf_set_u32(uint8_t *_buffer, unsigned first, unsigned num, uint32_t value)
Sets num bits in _buffer, starting at the first bit, using the bits in value.
void command_print_sameline(struct command_invocation *cmd, const char *format,...)
#define CMD_ARGV
Use this macro to access the arguments for the command being handled, rather than accessing the varia...
#define ERROR_COMMAND_SYNTAX_ERROR
#define CMD_ARGC
Use this macro to access the number of arguments for the command being handled, rather than accessing...
#define ERROR_FLASH_OPER_UNSUPPORTED
#define ERROR_FLASH_SECTOR_INVALID
#define ERROR_FLASH_BANK_NOT_PROBED
#define ERROR_FLASH_OPERATION_FAILED
void default_flash_free_driver_priv(struct flash_bank *bank)
Deallocates bank->driver_priv.
The JTAG interface can be implemented with a software or hardware fifo.
void alive_sleep(uint64_t ms)
#define LOG_WARNING(expr ...)
#define LOG_ERROR(expr ...)
#define ERROR_TIMEOUT_REACHED
#define LOG_INFO(expr ...)
#define LOG_DEBUG(expr ...)
static int sh_qspi_wait_for_bit(struct flash_bank *bank, uint8_t reg, uint32_t mask, bool set, unsigned long timeout)
static int sh_qspi_write_enable(struct flash_bank *bank)
static int read_flash_id(struct flash_bank *bank, uint32_t *id)
static int sh_qspi_protect_check(struct flash_bank *bank)
static int sh_qspi_get_info(struct flash_bank *bank, struct command_invocation *cmd)
static int sh_qspi_probe(struct flash_bank *bank)
static int sh_qspi_erase_sector(struct flash_bank *bank, int sector)
static int sh_qspi_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last)
static const struct sh_qspi_target target_devices[]
static int sh_qspi_upload_helper(struct flash_bank *bank)
static int read_status_reg(struct flash_bank *bank, uint32_t *status)
static int sh_qspi_init(struct flash_bank *bank)
static int sh_qspi_auto_probe(struct flash_bank *bank)
const struct flash_driver sh_qspi_flash
FLASH_BANK_COMMAND_HANDLER(sh_qspi_flash_bank_command)
static int sh_qspi_cs_activate(struct flash_bank *bank)
static int sh_qspi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
static int wait_till_ready(struct flash_bank *bank, int timeout)
static int sh_qspi_xfer_common(struct flash_bank *bank, const uint8_t *dout, unsigned int outlen, uint8_t *din, unsigned int inlen, bool xfer_start, bool xfer_end)
static int sh_qspi_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
static int sh_qspi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
static int sh_qspi_flash_blank_check(struct flash_bank *bank)
static int sh_qspi_cs_deactivate(struct flash_bank *bank)
const struct flash_device flash_devices[]
#define SPIFLASH_READ_STATUS
#define SPIFLASH_WRITE_ENABLE
unsigned int common_magic
enum arm_state core_state
When run_command is called, a new instance will be created on the stack, filled with the proper value...
Provides details of a flash bank, available either on-chip or through a major interface.
Provides the implementation-independent structure that defines all of the callbacks required by OpenO...
const char * name
Gives a human-readable name of this flash driver, This field is used to select and initialize the dri...
Describes the geometry and status of a single flash sector within a flash bank.
int is_erased
Indication of erasure status: 0 = not erased, 1 = erased, other = unknown.
uint32_t offset
Bus offset from start of the flash chip (in bytes).
int is_protected
Indication of protection status: 0 = unprotected/unlocked, 1 = protected/locked, other = unknown.
uint32_t size
Number of bytes in this flash sector.
uint32_t idcode
device identification code
struct working_area * source
const struct flash_device * dev
struct working_area * io_algorithm
int target_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
int target_write_u8(struct target *target, target_addr_t address, uint8_t value)
int target_write_u16(struct target *target, target_addr_t address, uint16_t value)
int target_read_buffer(struct target *target, target_addr_t address, uint32_t size, uint8_t *buffer)
int target_read_u8(struct target *target, target_addr_t address, uint8_t *value)
int target_alloc_working_area(struct target *target, uint32_t size, struct working_area **area)
int target_write_u32(struct target *target, target_addr_t address, uint32_t value)
int target_free_working_area(struct target *target, struct working_area *area)
Free a working area.
int target_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, target_addr_t entry_point, target_addr_t exit_point, int timeout_ms, void *arch_info)
Downloads a target-specific native code algorithm to the target, and executes it.
int target_alloc_working_area_try(struct target *target, uint32_t size, struct working_area **area)
#define ERROR_TARGET_NOT_HALTED
#define ERROR_TARGET_RESOURCE_NOT_AVAILABLE
static struct ublast_lowlevel_priv info