OpenOCD
mem_ap.c
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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 /*
4  * Copyright (C) 2016 by Matthias Welwarsky <matthias.welwarsky@sysgo.com>
5  */
6 
7 #ifdef HAVE_CONFIG_H
8 #include "config.h"
9 #endif
10 
11 #include "target.h"
12 #include "target_type.h"
13 #include "arm_adi_v5.h"
14 #include "register.h"
15 
16 #include <jtag/jtag.h>
17 
18 #define MEM_AP_COMMON_MAGIC 0x4DE4DA50
19 
20 struct mem_ap {
22  struct adiv5_dap *dap;
23  struct adiv5_ap *ap;
24  uint64_t ap_num;
25 };
26 
27 static int mem_ap_target_create(struct target *target, Jim_Interp *interp)
28 {
29  struct mem_ap *mem_ap;
30  struct adiv5_private_config *pc;
31 
33  if (!pc)
34  return ERROR_FAIL;
35 
36  if (pc->ap_num == DP_APSEL_INVALID) {
37  LOG_ERROR("AP number not specified");
38  return ERROR_FAIL;
39  }
40 
41  mem_ap = calloc(1, sizeof(struct mem_ap));
42  if (!mem_ap) {
43  LOG_ERROR("Out of memory");
44  return ERROR_FAIL;
45  }
46 
47  mem_ap->ap_num = pc->ap_num;
49  mem_ap->dap = pc->dap;
50 
52 
54  target->gdb_port_override = strdup("disabled");
55 
56  return ERROR_OK;
57 }
58 
59 static int mem_ap_init_target(struct command_context *cmd_ctx, struct target *target)
60 {
61  LOG_DEBUG("%s", __func__);
64  return ERROR_OK;
65 }
66 
67 static void mem_ap_deinit_target(struct target *target)
68 {
69  struct mem_ap *mem_ap = target->arch_info;
70 
71  LOG_DEBUG("%s", __func__);
72 
73  if (mem_ap->ap)
75 
76  free(target->private_config);
77  free(target->arch_info);
78 }
79 
80 static int mem_ap_arch_state(struct target *target)
81 {
82  LOG_DEBUG("%s", __func__);
83  return ERROR_OK;
84 }
85 
86 static int mem_ap_poll(struct target *target)
87 {
88  if (target->state == TARGET_UNKNOWN) {
91  }
92 
93  return ERROR_OK;
94 }
95 
96 static int mem_ap_halt(struct target *target)
97 {
98  LOG_DEBUG("%s", __func__);
102  return ERROR_OK;
103 }
104 
105 static int mem_ap_resume(struct target *target, int current, target_addr_t address,
106  int handle_breakpoints, int debug_execution)
107 {
108  LOG_DEBUG("%s", __func__);
111  return ERROR_OK;
112 }
113 
114 static int mem_ap_step(struct target *target, int current, target_addr_t address,
115  int handle_breakpoints)
116 {
117  LOG_DEBUG("%s", __func__);
121  return ERROR_OK;
122 }
123 
124 static int mem_ap_assert_reset(struct target *target)
125 {
128 
129  LOG_DEBUG("%s", __func__);
130  return ERROR_OK;
131 }
132 
133 static int mem_ap_examine(struct target *target)
134 {
135  struct mem_ap *mem_ap = target->arch_info;
136 
137  if (!target_was_examined(target)) {
138  if (!mem_ap->ap) {
140  if (!mem_ap->ap) {
141  LOG_ERROR("Cannot get AP");
142  return ERROR_FAIL;
143  }
144  }
148  return mem_ap_init(mem_ap->ap);
149  }
150 
151  return ERROR_OK;
152 }
153 
155 {
156  if (target->reset_halt) {
160  } else {
163  }
164 
165  LOG_DEBUG("%s", __func__);
166  return ERROR_OK;
167 }
168 
169 static int mem_ap_reg_get(struct reg *reg)
170 {
171  return ERROR_OK;
172 }
173 
174 static int mem_ap_reg_set(struct reg *reg, uint8_t *buf)
175 {
176  return ERROR_OK;
177 }
178 
179 static struct reg_arch_type mem_ap_reg_arch_type = {
180  .get = mem_ap_reg_get,
181  .set = mem_ap_reg_set,
182 };
183 
184 static const char *mem_ap_get_gdb_arch(const struct target *target)
185 {
186  return "arm";
187 }
188 
189 /*
190  * Dummy ARM register emulation:
191  * reg[0..15]: 32 bits, r0~r12, sp, lr, pc
192  * reg[16..23]: 96 bits, f0~f7
193  * reg[24]: 32 bits, fps
194  * reg[25]: 32 bits, cpsr
195  *
196  * GDB requires only reg[0..15]
197  */
198 #define NUM_REGS 26
199 #define NUM_GDB_REGS 16
200 #define MAX_REG_SIZE 96
201 #define REG_SIZE(n) ((((n) >= 16) && ((n) < 24)) ? 96 : 32)
202 
204  /* reg_list must be the first field */
206  struct reg regs[NUM_REGS];
207  uint8_t regs_value[MAX_REG_SIZE / 8];
208 };
209 
210 static int mem_ap_get_gdb_reg_list(struct target *target, struct reg **reg_list[],
211  int *reg_list_size, enum target_register_class reg_class)
212 {
213  struct mem_ap_alloc_reg_list *mem_ap_alloc = calloc(1, sizeof(struct mem_ap_alloc_reg_list));
214  if (!mem_ap_alloc) {
215  LOG_ERROR("Out of memory");
216  return ERROR_FAIL;
217  }
218 
219  *reg_list = mem_ap_alloc->reg_list;
220  *reg_list_size = (reg_class == REG_CLASS_ALL) ? NUM_REGS : NUM_GDB_REGS;
221  struct reg *regs = mem_ap_alloc->regs;
222 
223  for (int i = 0; i < NUM_REGS; i++) {
224  regs[i].number = i;
225  regs[i].value = mem_ap_alloc->regs_value;
226  regs[i].size = REG_SIZE(i);
227  regs[i].exist = true;
228  regs[i].type = &mem_ap_reg_arch_type;
229  (*reg_list)[i] = &regs[i];
230  }
231 
232  return ERROR_OK;
233 }
234 
235 static int mem_ap_read_memory(struct target *target, target_addr_t address,
236  uint32_t size, uint32_t count, uint8_t *buffer)
237 {
238  struct mem_ap *mem_ap = target->arch_info;
239 
240  LOG_DEBUG("Reading memory at physical address " TARGET_ADDR_FMT
241  "; size %" PRIu32 "; count %" PRIu32, address, size, count);
242 
243  if (count == 0 || !buffer)
245 
246  return mem_ap_read_buf(mem_ap->ap, buffer, size, count, address);
247 }
248 
249 static int mem_ap_write_memory(struct target *target, target_addr_t address,
250  uint32_t size, uint32_t count,
251  const uint8_t *buffer)
252 {
253  struct mem_ap *mem_ap = target->arch_info;
254 
255  LOG_DEBUG("Writing memory at physical address " TARGET_ADDR_FMT
256  "; size %" PRIu32 "; count %" PRIu32, address, size, count);
257 
258  if (count == 0 || !buffer)
260 
261  return mem_ap_write_buf(mem_ap->ap, buffer, size, count, address);
262 }
263 
264 struct target_type mem_ap_target = {
265  .name = "mem_ap",
266 
267  .target_create = mem_ap_target_create,
268  .init_target = mem_ap_init_target,
269  .deinit_target = mem_ap_deinit_target,
270  .examine = mem_ap_examine,
271  .target_jim_configure = adiv5_jim_configure,
272 
273  .poll = mem_ap_poll,
274  .arch_state = mem_ap_arch_state,
275 
276  .halt = mem_ap_halt,
277  .resume = mem_ap_resume,
278  .step = mem_ap_step,
279 
280  .assert_reset = mem_ap_assert_reset,
281  .deassert_reset = mem_ap_deassert_reset,
282 
283  .get_gdb_arch = mem_ap_get_gdb_arch,
284  .get_gdb_reg_list = mem_ap_get_gdb_reg_list,
285 
286  .read_memory = mem_ap_read_memory,
287  .write_memory = mem_ap_write_memory,
288 };
int mem_ap_read_buf(struct adiv5_ap *ap, uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address)
Definition: arm_adi_v5.c:722
int adiv5_jim_configure(struct target *target, struct jim_getopt_info *goi)
Definition: arm_adi_v5.c:2479
struct adiv5_ap * dap_get_ap(struct adiv5_dap *dap, uint64_t ap_num)
Definition: arm_adi_v5.c:1189
int dap_put_ap(struct adiv5_ap *ap)
Definition: arm_adi_v5.c:1209
int mem_ap_init(struct adiv5_ap *ap)
Initialize a DAP.
Definition: arm_adi_v5.c:888
int mem_ap_write_buf(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address)
Definition: arm_adi_v5.c:728
This defines formats and data structures used to talk to ADIv5 entities.
#define DP_APSEL_INVALID
Definition: arm_adi_v5.h:110
#define ERROR_COMMAND_SYNTAX_ERROR
Definition: command.h:402
The JTAG interface can be implemented with a software or hardware fifo.
static const struct @109 regs[]
#define ERROR_FAIL
Definition: log.h:170
#define LOG_ERROR(expr ...)
Definition: log.h:132
#define LOG_DEBUG(expr ...)
Definition: log.h:109
#define ERROR_OK
Definition: log.h:164
static int mem_ap_assert_reset(struct target *target)
Definition: mem_ap.c:124
static int mem_ap_poll(struct target *target)
Definition: mem_ap.c:86
static const char * mem_ap_get_gdb_arch(const struct target *target)
Definition: mem_ap.c:184
static int mem_ap_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class)
Definition: mem_ap.c:210
static int mem_ap_target_create(struct target *target, Jim_Interp *interp)
Definition: mem_ap.c:27
#define NUM_REGS
Definition: mem_ap.c:198
struct target_type mem_ap_target
Definition: mem_ap.c:264
static int mem_ap_reg_get(struct reg *reg)
Definition: mem_ap.c:169
static int mem_ap_examine(struct target *target)
Definition: mem_ap.c:133
static int mem_ap_halt(struct target *target)
Definition: mem_ap.c:96
#define MEM_AP_COMMON_MAGIC
Definition: mem_ap.c:18
static int mem_ap_write_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
Definition: mem_ap.c:249
static int mem_ap_deassert_reset(struct target *target)
Definition: mem_ap.c:154
#define MAX_REG_SIZE
Definition: mem_ap.c:200
static int mem_ap_resume(struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution)
Definition: mem_ap.c:105
static int mem_ap_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
Definition: mem_ap.c:235
#define REG_SIZE(n)
Definition: mem_ap.c:201
static int mem_ap_arch_state(struct target *target)
Definition: mem_ap.c:80
static struct reg_arch_type mem_ap_reg_arch_type
Definition: mem_ap.c:179
static int mem_ap_reg_set(struct reg *reg, uint8_t *buf)
Definition: mem_ap.c:174
static void mem_ap_deinit_target(struct target *target)
Definition: mem_ap.c:67
static int mem_ap_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
Definition: mem_ap.c:114
#define NUM_GDB_REGS
Definition: mem_ap.c:199
static int mem_ap_init_target(struct command_context *cmd_ctx, struct target *target)
Definition: mem_ap.c:59
size_t size
Size of the control block search area.
Definition: rtt/rtt.c:30
This represents an ARM Debug Interface (v5) Access Port (AP).
Definition: arm_adi_v5.h:250
This represents an ARM Debug Interface (v5) Debug Access Port (DAP).
Definition: arm_adi_v5.h:348
struct adiv5_dap * dap
Definition: arm_adi_v5.h:787
struct reg regs[NUM_REGS]
Definition: mem_ap.c:206
uint8_t regs_value[MAX_REG_SIZE/8]
Definition: mem_ap.c:207
struct reg * reg_list[NUM_REGS]
Definition: mem_ap.c:205
Definition: mem_ap.c:20
int common_magic
Definition: mem_ap.c:21
struct adiv5_dap * dap
Definition: mem_ap.c:22
struct adiv5_ap * ap
Definition: mem_ap.c:23
uint64_t ap_num
Definition: mem_ap.c:24
int(* get)(struct reg *reg)
Definition: register.h:152
Definition: register.h:111
This holds methods shared between all instances of a given target type.
Definition: target_type.h:26
const char * name
Name of this type of target.
Definition: target_type.h:31
Definition: target.h:116
enum target_debug_reason debug_reason
Definition: target.h:154
enum target_state state
Definition: target.h:157
void * private_config
Definition: target.h:165
char * gdb_port_override
Definition: target.h:204
void * arch_info
Definition: target.h:164
bool reset_halt
Definition: target.h:144
int target_call_event_callbacks(struct target *target, enum target_event event)
Definition: target.c:1764
@ DBG_REASON_UNDEFINED
Definition: target.h:77
@ DBG_REASON_NOTHALTED
Definition: target.h:74
@ DBG_REASON_DBGRQ
Definition: target.h:69
target_register_class
Definition: target.h:110
@ REG_CLASS_ALL
Definition: target.h:111
static bool target_was_examined(const struct target *target)
Definition: target.h:436
@ TARGET_EVENT_HALTED
Definition: target.h:252
@ TARGET_RESET
Definition: target.h:57
@ TARGET_UNKNOWN
Definition: target.h:54
@ TARGET_HALTED
Definition: target.h:56
@ TARGET_RUNNING
Definition: target.h:55
static void target_set_examined(struct target *target)
Sets the examined flag for the given target.
Definition: target.h:443
#define TARGET_ADDR_FMT
Definition: types.h:342
uint64_t target_addr_t
Definition: types.h:335
uint8_t count[4]
Definition: vdebug.c:22