armv8_opcodes.c File Reference

Include dependency graph for armv8_opcodes.c:

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Functions
uint32_t	armv8_opcode (struct armv8_common *armv8, enum armv8_opcode code)
void	armv8_select_opcodes (struct armv8_common *armv8, bool state_is_aarch64)

Variables
static const uint32_t	a64_opcodes [ARMV8_OPC_NUM]
static const uint32_t	t32_opcodes [ARMV8_OPC_NUM]

Function Documentation

armv8_opcode()

uint32_t armv8_opcode	(	struct armv8_common *	armv8,
		enum armv8_opcode	code
	)

Definition at line 81 of file armv8_opcodes.c.

References ARMV8_OPC_NUM, and armv8_common::opcodes.

armv8_select_opcodes()

void armv8_select_opcodes	(	struct armv8_common *	armv8,
		bool	state_is_aarch64
	)

Definition at line 73 of file armv8_opcodes.c.

References a64_opcodes, armv8_common::opcodes, and t32_opcodes.

Referenced by aarch64_debug_entry(), armv8_dpm_handle_exception(), and armv8_dpm_modeswitch().

Variable Documentation

a64_opcodes

const uint32_t a64_opcodes[ARMV8_OPC_NUM]

static

Initial value:

= {
        [READ_REG_CTR]      = ARMV8_MRS(SYSTEM_CTR, 0),
        [READ_REG_CLIDR]    = ARMV8_MRS(SYSTEM_CLIDR, 0),
        [READ_REG_CSSELR]   = ARMV8_MRS(SYSTEM_CSSELR, 0),
        [READ_REG_CCSIDR]   = ARMV8_MRS(SYSTEM_CCSIDR, 0),
        [WRITE_REG_CSSELR]  = ARMV8_MSR_GP(SYSTEM_CSSELR, 0),
        [READ_REG_MPIDR]    = ARMV8_MRS(SYSTEM_MPIDR, 0),
        [READ_REG_DTRRX]    = ARMV8_MRS(SYSTEM_DBG_DTRRX_EL0, 0),
        [WRITE_REG_DTRTX]   = ARMV8_MSR_GP(SYSTEM_DBG_DTRTX_EL0, 0),
        [WRITE_REG_DSPSR]   = ARMV8_MSR_DSPSR(0),
        [READ_REG_DSPSR]    = ARMV8_MRS_DSPSR(0),
        [ARMV8_OPC_DSB_SY]  = ARMV8_DSB_SY,
        [ARMV8_OPC_DCPS]    = ARMV8_DCPS(0, 11),
        [ARMV8_OPC_DRPS]    = ARMV8_DRPS,
        [ARMV8_OPC_ISB_SY]  = ARMV8_ISB,
        [ARMV8_OPC_DCCISW]  = ARMV8_SYS(SYSTEM_DCCISW, 0),
        [ARMV8_OPC_DCCIVAC] = ARMV8_SYS(SYSTEM_DCCIVAC, 0),
        [ARMV8_OPC_ICIVAU]  = ARMV8_SYS(SYSTEM_ICIVAU, 0),
        [ARMV8_OPC_HLT]     = ARMV8_HLT(11),
        [ARMV8_OPC_LDRB_IP] = ARMV8_LDRB_IP(1, 0),
        [ARMV8_OPC_LDRH_IP] = ARMV8_LDRH_IP(1, 0),
        [ARMV8_OPC_LDRW_IP] = ARMV8_LDRW_IP(1, 0),
        [ARMV8_OPC_LDRD_IP] = ARMV8_LDRD_IP(1, 0),
        [ARMV8_OPC_STRB_IP] = ARMV8_STRB_IP(1, 0),
        [ARMV8_OPC_STRH_IP] = ARMV8_STRH_IP(1, 0),
        [ARMV8_OPC_STRW_IP] = ARMV8_STRW_IP(1, 0),
        [ARMV8_OPC_STRD_IP] = ARMV8_STRD_IP(1, 0),
}

Definition at line 17 of file armv8_opcodes.c.

Referenced by armv8_select_opcodes().

t32_opcodes

const uint32_t t32_opcodes[ARMV8_OPC_NUM]

static

Initial value:

= {
        [READ_REG_CTR]      = ARMV4_5_MRC(15, 0, 0, 0, 0, 1),
        [READ_REG_CLIDR]    = ARMV4_5_MRC(15, 1, 0, 0, 0, 1),
        [READ_REG_CSSELR]   = ARMV4_5_MRC(15, 2, 0, 0, 0, 0),
        [READ_REG_CCSIDR]   = ARMV4_5_MRC(15, 1, 0, 0, 0, 0),
        [WRITE_REG_CSSELR]  = ARMV4_5_MCR(15, 2, 0, 0, 0, 0),
        [READ_REG_MPIDR]    = ARMV4_5_MRC(15, 0, 0, 0, 0, 5),
        [READ_REG_DTRRX]    = ARMV4_5_MRC(14, 0, 0, 0, 5, 0),
        [WRITE_REG_DTRTX]   = ARMV4_5_MCR(14, 0, 0, 0, 5, 0),
        [WRITE_REG_DSPSR]   = ARMV8_MCR_DSPSR(0),
        [READ_REG_DSPSR]    = ARMV8_MRC_DSPSR(0),
        [ARMV8_OPC_DSB_SY]  = ARMV8_DSB_SY_T1,
        [ARMV8_OPC_DCPS]    = ARMV8_DCPS_T1(0),
        [ARMV8_OPC_DRPS]    = ARMV8_ERET_T1,
        [ARMV8_OPC_ISB_SY]  = ARMV8_ISB_SY_T1,
        [ARMV8_OPC_DCCISW]  = ARMV4_5_MCR(15, 0, 0, 7, 14, 2),
        [ARMV8_OPC_DCCIVAC] = ARMV4_5_MCR(15, 0, 0, 7, 14, 1),
        [ARMV8_OPC_ICIVAU]  = ARMV4_5_MCR(15, 0, 0, 7, 5, 1),
        [ARMV8_OPC_HLT]     = ARMV8_HLT_T1(11),
        [ARMV8_OPC_LDRB_IP] = ARMV8_LDRB_IP_T3(1, 0),
        [ARMV8_OPC_LDRH_IP] = ARMV8_LDRH_IP_T3(1, 0),
        [ARMV8_OPC_LDRW_IP] = ARMV8_LDRW_IP_T3(1, 0),
        [ARMV8_OPC_STRB_IP] = ARMV8_STRB_IP_T3(1, 0),
        [ARMV8_OPC_STRH_IP] = ARMV8_STRH_IP_T3(1, 0),
        [ARMV8_OPC_STRW_IP] = ARMV8_STRW_IP_T3(1, 0),
}

Definition at line 46 of file armv8_opcodes.c.

Referenced by armv8_select_opcodes().