armv7a_cache.h File Reference

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Macros
#define	CACHE_LEVEL_HAS_D_CACHE   0x2
#define	CACHE_LEVEL_HAS_I_CACHE   0x1
#define	CACHE_LEVEL_HAS_UNIFIED_CACHE   0x4

Functions
int	armv7a_cache_flush_all_data (struct target *target)
int	armv7a_cache_flush_virt (struct target *target, uint32_t virt, uint32_t size)
int	armv7a_l1_d_cache_clean_virt (struct target *target, uint32_t virt, unsigned int size)
int	armv7a_l1_d_cache_flush_virt (struct target *target, uint32_t virt, unsigned int size)
int	armv7a_l1_d_cache_inval_virt (struct target *target, uint32_t virt, uint32_t size)
int	armv7a_l1_i_cache_inval_all (struct target *target)
int	armv7a_l1_i_cache_inval_virt (struct target *target, uint32_t virt, uint32_t size)

Variables
const struct command_registration	arm7a_cache_command_handlers []

Macro Definition Documentation

CACHE_LEVEL_HAS_D_CACHE

#define CACHE_LEVEL_HAS_D_CACHE   0x2

Definition at line 30 of file armv7a_cache.h.

CACHE_LEVEL_HAS_I_CACHE

#define CACHE_LEVEL_HAS_I_CACHE   0x1

Definition at line 31 of file armv7a_cache.h.

CACHE_LEVEL_HAS_UNIFIED_CACHE

#define CACHE_LEVEL_HAS_UNIFIED_CACHE   0x4

Definition at line 29 of file armv7a_cache.h.

Function Documentation

armv7a_cache_flush_all_data()

int armv7a_cache_flush_all_data

(

struct target *

target

)

Definition at line 121 of file armv7a_cache.c.

References arm7a_l2x_flush_all_data(), armv7a_l1_d_cache_clean_inval_all(), ERROR_FAIL, ERROR_OK, foreach_smp_target, target::smp, target::smp_targets, target::state, target_list::target, and TARGET_HALTED.

Referenced by armv7a_identify_cache().

armv7a_cache_flush_virt()

int armv7a_cache_flush_virt	(	struct target *	target,
		uint32_t	virt,
		uint32_t	size
	)

Definition at line 384 of file armv7a_cache.c.

References armv7a_l1_d_cache_flush_virt(), armv7a_l2x_cache_flush_virt(), ERROR_OK, and size.

Referenced by cortex_a_set_breakpoint(), and cortex_a_unset_breakpoint().

armv7a_l1_d_cache_clean_virt()

int armv7a_l1_d_cache_clean_virt	(	struct target *	target,
		uint32_t	virt,
		unsigned int	size
	)

Definition at line 210 of file armv7a_cache.c.

References armv7a_common::arm, ARMV4_5_MCR, armv7a_mmu_common::armv7a_cache, armv7a_l1_d_cache_sanity_check(), armv7a_common::armv7a_mmu, armv7a_cache_common::dminline, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, keep_alive(), LOG_ERROR, arm_dpm::prepare, size, and target_to_armv7a().

Referenced by COMMAND_HANDLER().

armv7a_l1_d_cache_flush_virt()

int armv7a_l1_d_cache_flush_virt	(	struct target *	target,
		uint32_t	virt,
		unsigned int	size
	)

Definition at line 254 of file armv7a_cache.c.

References armv7a_common::arm, ARMV4_5_MCR, armv7a_mmu_common::armv7a_cache, armv7a_l1_d_cache_sanity_check(), armv7a_common::armv7a_mmu, armv7a_cache_common::dminline, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, keep_alive(), LOG_ERROR, arm_dpm::prepare, size, and target_to_armv7a().

Referenced by armv7a_cache_flush_virt().

armv7a_l1_d_cache_inval_virt()

int armv7a_l1_d_cache_inval_virt	(	struct target *	target,
		uint32_t	virt,
		uint32_t	size
	)

Definition at line 146 of file armv7a_cache.c.

References armv7a_common::arm, ARMV4_5_MCR, armv7a_mmu_common::armv7a_cache, armv7a_l1_d_cache_sanity_check(), armv7a_common::armv7a_mmu, armv7a_cache_common::dminline, arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, keep_alive(), LOG_ERROR, arm_dpm::prepare, size, and target_to_armv7a().

Referenced by COMMAND_HANDLER(), cortex_a_set_breakpoint(), and cortex_a_unset_breakpoint().

armv7a_l1_i_cache_inval_all()

int armv7a_l1_i_cache_inval_all

(

struct target *

target

)

Definition at line 298 of file armv7a_cache.c.

References armv7a_common::arm, ARMV4_5_MCR, armv7a_l1_i_cache_sanity_check(), arm::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_write_data_r0, LOG_ERROR, arm_dpm::prepare, target::smp, and target_to_armv7a().

Referenced by COMMAND_HANDLER().

armv7a_l1_i_cache_inval_virt()

int armv7a_l1_i_cache_inval_virt	(	struct target *	target,
		uint32_t	virt,
		uint32_t	size
	)

Definition at line 335 of file armv7a_cache.c.

References armv7a_common::arm, ARMV4_5_MCR, armv7a_mmu_common::armv7a_cache, armv7a_l1_i_cache_sanity_check(), armv7a_common::armv7a_mmu, arm::dpm, ERROR_OK, arm_dpm::finish, armv7a_cache_common::iminline, arm_dpm::instr_write_data_r0, keep_alive(), LOG_ERROR, arm_dpm::prepare, size, and target_to_armv7a().

Referenced by cortex_a_set_breakpoint(), and cortex_a_unset_breakpoint().

Variable Documentation

arm7a_cache_command_handlers

const struct command_registration arm7a_cache_command_handlers[]

extern

Definition at line 456 of file armv7a_cache.c.