or1k.h File Reference
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Data Structures | |
| struct | or1k_common |
| struct | or1k_core_reg |
| struct | or1k_core_reg_init |
| struct | or1k_jtag |
Macros | |
| #define | GROUP0 (0 << 11) |
| #define | GROUP1 (1 << 11) |
| #define | GROUP10 (10 << 11) |
| #define | GROUP2 (2 << 11) |
| #define | GROUP3 (3 << 11) |
| #define | GROUP4 (4 << 11) |
| #define | GROUP5 (5 << 11) |
| #define | GROUP6 (6 << 11) |
| #define | GROUP7 (7 << 11) |
| #define | GROUP8 (8 << 11) |
| #define | GROUP9 (9 << 11) |
| #define | NO_SINGLE_STEP 0 |
| #define | OR1K_DEBUG_REG_BASE GROUP6 /* Debug registers Base address */ |
| #define | OR1K_DMR1_BT 0x00800000 /* Branch trace */ |
| #define | OR1K_DMR1_CPU_REG_ADD (OR1K_DEBUG_REG_BASE + 16) /* Debug Mode Register 1 0x3010 */ |
| #define | OR1K_DMR1_ST 0x00400000 /* Single-step trace */ |
| #define | OR1K_DMR2_WGB 0x003ff000 /* Watchpoints generating breakpoint */ |
| #define | OR1K_DSR_TE 0x00002000 /* Trap exception */ |
| #define | OR1K_ICBIR_CPU_REG_ADD ((4 << 11) + 2) /* IC Block Invalidate Register 0x2002 */ |
| #define | OR1K_TRAP_INSTR 0x21000001 |
| #define | SINGLE_STEP 1 |
Enumerations | |
| enum | or1k_debug_reg_nums { OR1K_DEBUG_REG_DMR1 = 0 , OR1K_DEBUG_REG_DMR2 , OR1K_DEBUG_REG_DCWR0 , OR1K_DEBUG_REG_DCWR1 , OR1K_DEBUG_REG_DSR , OR1K_DEBUG_REG_DRR , OR1K_DEBUG_REG_NUM } |
| enum | or1k_reg_nums { OR1K_REG_R0 = 0 , OR1K_REG_R1 , OR1K_REG_R2 , OR1K_REG_R3 , OR1K_REG_R4 , OR1K_REG_R5 , OR1K_REG_R6 , OR1K_REG_R7 , OR1K_REG_R8 , OR1K_REG_R9 , OR1K_REG_R10 , OR1K_REG_R11 , OR1K_REG_R12 , OR1K_REG_R13 , OR1K_REG_R14 , OR1K_REG_R15 , OR1K_REG_R16 , OR1K_REG_R17 , OR1K_REG_R18 , OR1K_REG_R19 , OR1K_REG_R20 , OR1K_REG_R21 , OR1K_REG_R22 , OR1K_REG_R23 , OR1K_REG_R24 , OR1K_REG_R25 , OR1K_REG_R26 , OR1K_REG_R27 , OR1K_REG_R28 , OR1K_REG_R29 , OR1K_REG_R30 , OR1K_REG_R31 , OR1K_REG_PPC , OR1K_REG_NPC , OR1K_REG_SR , OR1KNUMCOREREGS } |
Functions | |
| static struct or1k_common * | target_to_or1k (struct target *target) |
Macro Definition Documentation
◆ GROUP0
◆ GROUP1
◆ GROUP10
◆ GROUP2
◆ GROUP3
◆ GROUP4
◆ GROUP5
◆ GROUP6
◆ GROUP7
◆ GROUP8
◆ GROUP9
◆ NO_SINGLE_STEP
◆ OR1K_DEBUG_REG_BASE
| #define OR1K_DEBUG_REG_BASE GROUP6 /* Debug registers Base address */ |
◆ OR1K_DMR1_BT
◆ OR1K_DMR1_CPU_REG_ADD
| #define OR1K_DMR1_CPU_REG_ADD (OR1K_DEBUG_REG_BASE + 16) /* Debug Mode Register 1 0x3010 */ |
◆ OR1K_DMR1_ST
◆ OR1K_DMR2_WGB
| #define OR1K_DMR2_WGB 0x003ff000 /* Watchpoints generating breakpoint */ |
◆ OR1K_DSR_TE
◆ OR1K_ICBIR_CPU_REG_ADD
| #define OR1K_ICBIR_CPU_REG_ADD ((4 << 11) + 2) /* IC Block Invalidate Register 0x2002 */ |
◆ OR1K_TRAP_INSTR
◆ SINGLE_STEP
Enumeration Type Documentation
◆ or1k_debug_reg_nums
| enum or1k_debug_reg_nums |
◆ or1k_reg_nums
| enum or1k_reg_nums |
Function Documentation
◆ target_to_or1k()
|
inlinestatic |
Definition at line 96 of file or1k.h.
References target::arch_info.
Referenced by COMMAND_HANDLER(), or1k_add_breakpoint(), or1k_add_reg(), or1k_assert_reset(), or1k_build_reg_cache(), or1k_create_reg_list(), or1k_deassert_reset(), or1k_debug_entry(), or1k_examine(), or1k_get_gdb_reg_list(), or1k_halt(), or1k_init_target(), or1k_is_cpu_running(), or1k_profiling(), or1k_read_core_reg(), or1k_read_memory(), or1k_remove_breakpoint(), or1k_restore_context(), or1k_resume_or_step(), or1k_save_context(), or1k_soft_reset_halt(), or1k_write_core_reg(), and or1k_write_memory().
