15 #ifndef OPENOCD_TARGET_OPENRISC_OR1K_H
16 #define OPENOCD_TARGET_OPENRISC_OR1K_H
25 #define GROUP0 (0 << 11)
26 #define GROUP1 (1 << 11)
27 #define GROUP2 (2 << 11)
28 #define GROUP3 (3 << 11)
29 #define GROUP4 (4 << 11)
30 #define GROUP5 (5 << 11)
31 #define GROUP6 (6 << 11)
32 #define GROUP7 (7 << 11)
33 #define GROUP8 (8 << 11)
34 #define GROUP9 (9 << 11)
35 #define GROUP10 (10 << 11)
119 #define OR1K_TRAP_INSTR 0x21000001
131 #define NO_SINGLE_STEP 0
132 #define SINGLE_STEP 1
135 #define OR1K_DEBUG_REG_BASE GROUP6
136 #define OR1K_DMR1_CPU_REG_ADD (OR1K_DEBUG_REG_BASE + 16)
137 #define OR1K_DMR1_ST 0x00400000
138 #define OR1K_DMR1_BT 0x00800000
139 #define OR1K_DMR2_WGB 0x003ff000
140 #define OR1K_DSR_TE 0x00002000
145 #define OR1K_ICBIR_CPU_REG_ADD ((4 << 11) + 2)
static struct or1k_common * target_to_or1k(struct target *target)
uint32_t core_regs[OR1KNUMCOREREGS]
struct or1k_core_reg * arch_info
struct reg_cache * core_cache
struct or1k_common * or1k_common
uint8_t * current_reg_idx
int or1k_jtag_module_selected
struct or1k_tap_ip * tap_ip