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Data Structures | Macros | Functions
mips64.h File Reference
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Data Structures

struct  mips64_common
 
struct  mips64_comparator
 
struct  mips64_core_reg
 

Macros

#define MIPS16_SDBBP_SIZE   2
 
#define MIPS64_ADDI(tar, src, val)   MIPS64_I_INST(MIPS64_OP_ADDI, src, tar, val)
 
#define MIPS64_AND(reg, off, val)   MIPS64_R_INST(0, off, val, reg, 0, MIPS64_OP_AND)
 
#define MIPS64_ANDI(d, s, im)   MIPS64_I_INST(MIPS64_OP_ANDI, s, d, im)
 
#define MIPS64_B(off)   MIPS64_BEQ(0, 0, off)
 
#define MIPS64_BEQ(src, tar, off)   MIPS64_I_INST(MIPS64_OP_BEQ, src, tar, off)
 
#define MIPS64_BNE(src, tar, off)   MIPS64_I_INST(MIPS64_OP_BNE, src, tar, off)
 
#define MIPS64_C0_BADVADDR   8
 
#define MIPS64_C0_CACHERR   27
 
#define MIPS64_C0_CAUSE   13
 
#define MIPS64_C0_COMPARE   11
 
#define MIPS64_C0_CONFIG   16
 
#define MIPS64_C0_CONTEXT   4
 
#define MIPS64_C0_COUNT   9
 
#define MIPS64_C0_DATAHI   29
 
#define MIPS64_C0_DEBUG   23
 
#define MIPS64_C0_DEPC   24
 
#define MIPS64_C0_ECC   26
 
#define MIPS64_C0_EEPC   30
 
#define MIPS64_C0_ENTRYHI   10
 
#define MIPS64_C0_ENTRYLO0   2
 
#define MIPS64_C0_ENTRYLO1   3
 
#define MIPS64_C0_EPC   14
 
#define MIPS64_C0_INDEX   0
 
#define MIPS64_C0_LLA   17
 
#define MIPS64_C0_MEMCTRL   22
 
#define MIPS64_C0_PAGEMASK   5
 
#define MIPS64_C0_PERFCOUNT   25
 
#define MIPS64_C0_PRID   15
 
#define MIPS64_C0_RANDOM   1
 
#define MIPS64_C0_STATUS   12
 
#define MIPS64_C0_TAGHI   29
 
#define MIPS64_C0_TAGLO   28
 
#define MIPS64_C0_WATCHHI   19
 
#define MIPS64_C0_WATCHLO   18
 
#define MIPS64_C0_WIRED   6
 
#define MIPS64_C0_XCONTEXT   20
 
#define MIPS64_C1_FCCR   25
 
#define MIPS64_C1_FCONFIG   24
 
#define MIPS64_C1_FCSR   31
 
#define MIPS64_C1_FENR   28
 
#define MIPS64_C1_FEXR   26
 
#define MIPS64_C1_FIR   0
 
#define MIPS64_CACHE(op, reg, off)   (47 << 26 | (reg) << 21 | (op) << 16 | (off))
 
#define MIPS64_CFC1(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_CF, gpr, cpr, 0, 0)
 
#define MIPS64_CFC2(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP2, MIPS64_COP_CF, gpr, cpr, 0, sel)
 
#define MIPS64_COMMON_MAGIC   0xB640B640U
 
#define MIPS64_COP_CF   0x02
 
#define MIPS64_COP_CT   0x06
 
#define MIPS64_COP_DMF   0x01
 
#define MIPS64_COP_DMT   0x05
 
#define MIPS64_COP_MF   0x00
 
#define MIPS64_COP_MT   0x04
 
#define MIPS64_CTC1(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_CT, gpr, cpr, 0, 0)
 
#define MIPS64_CTC2(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP2, MIPS64_COP_CT, gpr, cpr, 0, sel)
 
#define MIPS64_DADDI(tar, src, val)   MIPS64_I_INST(MIPS64_OP_DADDI, src, tar, val)
 
#define MIPS64_DADDIU(tar, src, val)   MIPS64_I_INST(MIPS64_OP_DADDIU, src, tar, val)
 
#define MIPS64_DMFC0(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP0, MIPS64_COP_DMF, gpr, cpr, 0, sel)
 
#define MIPS64_DMFC1(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_DMF, gpr, cpr, 0, 0)
 
#define MIPS64_DMTC0(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP0, MIPS64_COP_DMT, gpr, cpr, 0, sel)
 
#define MIPS64_DMTC1(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_DMT, gpr, cpr, 0, 0)
 
#define MIPS64_DRET   0x4200001F
 
#define MIPS64_I_INST(opcode, rs, rt, immd)   (((opcode) << 26) | ((rs) << 21) | ((rt) << 16) | (immd))
 
#define MIPS64_J_INST(opcode, addr)   (((opcode) << 26) | (addr))
 
#define MIPS64_JR(reg)   MIPS64_R_INST(0, reg, 0, 0, 0, MIPS64_OP_JR)
 
#define MIPS64_LBU(reg, off, base)   MIPS64_I_INST(MIPS64_OP_LBU, base, reg, off)
 
#define MIPS64_LD(reg, off, base)   MIPS64_I_INST(MIPS64_OP_LD, base, reg, off)
 
#define MIPS64_LHU(reg, off, base)   MIPS64_I_INST(MIPS64_OP_LHU, base, reg, off)
 
#define MIPS64_LUI(reg, val)   MIPS64_I_INST(MIPS64_OP_LUI, 0, reg, val)
 
#define MIPS64_LW(reg, off, base)   MIPS64_I_INST(MIPS64_OP_LW, base, reg, off)
 
#define MIPS64_MFC0(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP0, MIPS64_COP_MF, gpr, cpr, 0, sel)
 
#define MIPS64_MFC1(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_MF, gpr, cpr, 0, 0)
 
#define MIPS64_MFC2(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP2, MIPS64_COP_MF, gpr, cpr, 0, sel)
 
#define MIPS64_MFHI(reg)   MIPS64_R_INST(0, 0, 0, reg, 0, MIPS64_OP_MFHI)
 
#define MIPS64_MFLO(reg)   MIPS64_R_INST(0, 0, 0, reg, 0, MIPS64_OP_MFLO)
 
#define MIPS64_MTC0(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP0, MIPS64_COP_MT, gpr, cpr, 0, sel)
 
#define MIPS64_MTC1(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_MT, gpr, cpr, 0, 0)
 
#define MIPS64_MTC2(gpr, cpr, sel)   MIPS64_R_INST(MIPS64_OP_COP2, MIPS64_COP_MT, gpr, cpr, 0, sel)
 
#define MIPS64_MTHI(reg)   MIPS64_R_INST(0, reg, 0, 0, 0, MIPS64_OP_MTHI)
 
#define MIPS64_MTLO(reg)   MIPS64_R_INST(0, reg, 0, 0, 0, MIPS64_OP_MTLO)
 
#define MIPS64_NOP   0
 
#define MIPS64_NUM_C0_REGS   34
 
#define MIPS64_NUM_CORE_C0_REGS   (MIPS64_NUM_CORE_REGS + MIPS64_NUM_C0_REGS)
 
#define MIPS64_NUM_CORE_REGS   34
 
#define MIPS64_NUM_FP_REGS   38
 
#define MIPS64_NUM_REGS
 
#define MIPS64_OP_ADDI   0x08
 
#define MIPS64_OP_AND   0x24
 
#define MIPS64_OP_ANDI   0x0c
 
#define MIPS64_OP_BEQ   0x04
 
#define MIPS64_OP_BNE   0x05
 
#define MIPS64_OP_COP0   0x10
 
#define MIPS64_OP_COP1   0x11
 
#define MIPS64_OP_COP2   0x12
 
#define MIPS64_OP_DADDI   0x18
 
#define MIPS64_OP_DADDIU   0x19
 
#define MIPS64_OP_JR   0x08
 
#define MIPS64_OP_LBU   0x24
 
#define MIPS64_OP_LD   0x37
 
#define MIPS64_OP_LHU   0x25
 
#define MIPS64_OP_LUI   0x0F
 
#define MIPS64_OP_LW   0x23
 
#define MIPS64_OP_MFHI   0x10
 
#define MIPS64_OP_MFLO   0x12
 
#define MIPS64_OP_MTHI   0x11
 
#define MIPS64_OP_MTLO   0x13
 
#define MIPS64_OP_ORI   0x0D
 
#define MIPS64_OP_SB   0x28
 
#define MIPS64_OP_SD   0x3F
 
#define MIPS64_OP_SH   0x29
 
#define MIPS64_OP_SRL   0x02
 
#define MIPS64_OP_SW   0x2B
 
#define MIPS64_ORI(src, tar, val)   MIPS64_I_INST(MIPS64_OP_ORI, src, tar, val)
 
#define MIPS64_PC   MIPS64_NUM_CORE_REGS
 
#define MIPS64_R_INST(opcode, rs, rt, rd, shamt, funct)   (((opcode) << 26) | ((rs) << 21) | ((rt) << 16) | ((rd) << 11) | ((shamt) << 6) | (funct))
 
#define MIPS64_SB(reg, off, base)   MIPS64_I_INST(MIPS64_OP_SB, base, reg, off)
 
#define MIPS64_SD(reg, off, base)   MIPS64_I_INST(MIPS64_OP_SD, base, reg, off)
 
#define MIPS64_SDBBP   0x7000003F
 
#define MIPS64_SDBBP_LE   0x3f000007
 
#define MIPS64_SDBBP_SIZE   4
 
#define MIPS64_SH(reg, off, base)   MIPS64_I_INST(MIPS64_OP_SH, base, reg, off)
 
#define MIPS64_SRL(d, w, sh)   MIPS64_R_INST(0, 0, w, d, sh, MIPS64_OP_SRL)
 
#define MIPS64_SW(reg, off, base)   MIPS64_I_INST(MIPS64_OP_SW, base, reg, off)
 
#define MIPS64_SYNC   0x0000000F
 
#define MIPS64_SYNCI(reg, off)   (1 << 26 | (reg) << 21 | 0x1f << 16 | (off))
 

Functions

int mips64_arch_state (struct target *target)
 
int mips64_build_reg_cache (struct target *target)
 
int mips64_configure_break_unit (struct target *target)
 
int mips64_enable_interrupts (struct target *target, bool enable)
 
int mips64_examine (struct target *target)
 
int mips64_get_gdb_reg_list (struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class)
 
int mips64_init_arch_info (struct target *target, struct mips64_common *mips64, struct jtag_tap *tap)
 
int mips64_invalidate_core_regs (struct target *target)
 
int mips64_register_commands (struct command_context *cmd_ctx)
 
int mips64_restore_context (struct target *target)
 
int mips64_run_algorithm (struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t entry_point, target_addr_t exit_point, int timeout_ms, void *arch_info)
 
int mips64_save_context (struct target *target)
 

Macro Definition Documentation

◆ MIPS16_SDBBP_SIZE

#define MIPS16_SDBBP_SIZE   2

Definition at line 204 of file mips64.h.

◆ MIPS64_ADDI

#define MIPS64_ADDI (   tar,
  src,
  val 
)    MIPS64_I_INST(MIPS64_OP_ADDI, src, tar, val)

Definition at line 158 of file mips64.h.

◆ MIPS64_AND

#define MIPS64_AND (   reg,
  off,
  val 
)    MIPS64_R_INST(0, off, val, reg, 0, MIPS64_OP_AND)

Definition at line 161 of file mips64.h.

◆ MIPS64_ANDI

#define MIPS64_ANDI (   d,
  s,
  im 
)    MIPS64_I_INST(MIPS64_OP_ANDI, s, d, im)

Definition at line 162 of file mips64.h.

◆ MIPS64_B

#define MIPS64_B (   off)    MIPS64_BEQ(0, 0, off)

Definition at line 164 of file mips64.h.

◆ MIPS64_BEQ

#define MIPS64_BEQ (   src,
  tar,
  off 
)    MIPS64_I_INST(MIPS64_OP_BEQ, src, tar, off)

Definition at line 165 of file mips64.h.

◆ MIPS64_BNE

#define MIPS64_BNE (   src,
  tar,
  off 
)    MIPS64_I_INST(MIPS64_OP_BNE, src, tar, off)

Definition at line 166 of file mips64.h.

◆ MIPS64_C0_BADVADDR

#define MIPS64_C0_BADVADDR   8

Definition at line 32 of file mips64.h.

◆ MIPS64_C0_CACHERR

#define MIPS64_C0_CACHERR   27

Definition at line 50 of file mips64.h.

◆ MIPS64_C0_CAUSE

#define MIPS64_C0_CAUSE   13

Definition at line 37 of file mips64.h.

◆ MIPS64_C0_COMPARE

#define MIPS64_C0_COMPARE   11

Definition at line 35 of file mips64.h.

◆ MIPS64_C0_CONFIG

#define MIPS64_C0_CONFIG   16

Definition at line 40 of file mips64.h.

◆ MIPS64_C0_CONTEXT

#define MIPS64_C0_CONTEXT   4

Definition at line 29 of file mips64.h.

◆ MIPS64_C0_COUNT

#define MIPS64_C0_COUNT   9

Definition at line 33 of file mips64.h.

◆ MIPS64_C0_DATAHI

#define MIPS64_C0_DATAHI   29

Definition at line 53 of file mips64.h.

◆ MIPS64_C0_DEBUG

#define MIPS64_C0_DEBUG   23

Definition at line 46 of file mips64.h.

◆ MIPS64_C0_DEPC

#define MIPS64_C0_DEPC   24

Definition at line 47 of file mips64.h.

◆ MIPS64_C0_ECC

#define MIPS64_C0_ECC   26

Definition at line 49 of file mips64.h.

◆ MIPS64_C0_EEPC

#define MIPS64_C0_EEPC   30

Definition at line 54 of file mips64.h.

◆ MIPS64_C0_ENTRYHI

#define MIPS64_C0_ENTRYHI   10

Definition at line 34 of file mips64.h.

◆ MIPS64_C0_ENTRYLO0

#define MIPS64_C0_ENTRYLO0   2

Definition at line 27 of file mips64.h.

◆ MIPS64_C0_ENTRYLO1

#define MIPS64_C0_ENTRYLO1   3

Definition at line 28 of file mips64.h.

◆ MIPS64_C0_EPC

#define MIPS64_C0_EPC   14

Definition at line 38 of file mips64.h.

◆ MIPS64_C0_INDEX

#define MIPS64_C0_INDEX   0

Definition at line 25 of file mips64.h.

◆ MIPS64_C0_LLA

#define MIPS64_C0_LLA   17

Definition at line 41 of file mips64.h.

◆ MIPS64_C0_MEMCTRL

#define MIPS64_C0_MEMCTRL   22

Definition at line 45 of file mips64.h.

◆ MIPS64_C0_PAGEMASK

#define MIPS64_C0_PAGEMASK   5

Definition at line 30 of file mips64.h.

◆ MIPS64_C0_PERFCOUNT

#define MIPS64_C0_PERFCOUNT   25

Definition at line 48 of file mips64.h.

◆ MIPS64_C0_PRID

#define MIPS64_C0_PRID   15

Definition at line 39 of file mips64.h.

◆ MIPS64_C0_RANDOM

#define MIPS64_C0_RANDOM   1

Definition at line 26 of file mips64.h.

◆ MIPS64_C0_STATUS

#define MIPS64_C0_STATUS   12

Definition at line 36 of file mips64.h.

◆ MIPS64_C0_TAGHI

#define MIPS64_C0_TAGHI   29

Definition at line 52 of file mips64.h.

◆ MIPS64_C0_TAGLO

#define MIPS64_C0_TAGLO   28

Definition at line 51 of file mips64.h.

◆ MIPS64_C0_WATCHHI

#define MIPS64_C0_WATCHHI   19

Definition at line 43 of file mips64.h.

◆ MIPS64_C0_WATCHLO

#define MIPS64_C0_WATCHLO   18

Definition at line 42 of file mips64.h.

◆ MIPS64_C0_WIRED

#define MIPS64_C0_WIRED   6

Definition at line 31 of file mips64.h.

◆ MIPS64_C0_XCONTEXT

#define MIPS64_C0_XCONTEXT   20

Definition at line 44 of file mips64.h.

◆ MIPS64_C1_FCCR

#define MIPS64_C1_FCCR   25

Definition at line 60 of file mips64.h.

◆ MIPS64_C1_FCONFIG

#define MIPS64_C1_FCONFIG   24

Definition at line 58 of file mips64.h.

◆ MIPS64_C1_FCSR

#define MIPS64_C1_FCSR   31

Definition at line 59 of file mips64.h.

◆ MIPS64_C1_FENR

#define MIPS64_C1_FENR   28

Definition at line 62 of file mips64.h.

◆ MIPS64_C1_FEXR

#define MIPS64_C1_FEXR   26

Definition at line 61 of file mips64.h.

◆ MIPS64_C1_FIR

#define MIPS64_C1_FIR   0

Definition at line 57 of file mips64.h.

◆ MIPS64_CACHE

#define MIPS64_CACHE (   op,
  reg,
  off 
)    (47 << 26 | (reg) << 21 | (op) << 16 | (off))

Definition at line 195 of file mips64.h.

◆ MIPS64_CFC1

#define MIPS64_CFC1 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_CF, gpr, cpr, 0, 0)

Definition at line 177 of file mips64.h.

◆ MIPS64_CFC2

#define MIPS64_CFC2 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP2, MIPS64_COP_CF, gpr, cpr, 0, sel)

Definition at line 179 of file mips64.h.

◆ MIPS64_COMMON_MAGIC

#define MIPS64_COMMON_MAGIC   0xB640B640U

Definition at line 22 of file mips64.h.

◆ MIPS64_COP_CF

#define MIPS64_COP_CF   0x02

Definition at line 149 of file mips64.h.

◆ MIPS64_COP_CT

#define MIPS64_COP_CT   0x06

Definition at line 150 of file mips64.h.

◆ MIPS64_COP_DMF

#define MIPS64_COP_DMF   0x01

Definition at line 146 of file mips64.h.

◆ MIPS64_COP_DMT

#define MIPS64_COP_DMT   0x05

Definition at line 148 of file mips64.h.

◆ MIPS64_COP_MF

#define MIPS64_COP_MF   0x00

Definition at line 145 of file mips64.h.

◆ MIPS64_COP_MT

#define MIPS64_COP_MT   0x04

Definition at line 147 of file mips64.h.

◆ MIPS64_CTC1

#define MIPS64_CTC1 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_CT, gpr, cpr, 0, 0)

Definition at line 178 of file mips64.h.

◆ MIPS64_CTC2

#define MIPS64_CTC2 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP2, MIPS64_COP_CT, gpr, cpr, 0, sel)

Definition at line 180 of file mips64.h.

◆ MIPS64_DADDI

#define MIPS64_DADDI (   tar,
  src,
  val 
)    MIPS64_I_INST(MIPS64_OP_DADDI, src, tar, val)

Definition at line 159 of file mips64.h.

◆ MIPS64_DADDIU

#define MIPS64_DADDIU (   tar,
  src,
  val 
)    MIPS64_I_INST(MIPS64_OP_DADDIU, src, tar, val)

Definition at line 160 of file mips64.h.

◆ MIPS64_DMFC0

#define MIPS64_DMFC0 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP0, MIPS64_COP_DMF, gpr, cpr, 0, sel)

Definition at line 168 of file mips64.h.

◆ MIPS64_DMFC1

#define MIPS64_DMFC1 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_DMF, gpr, cpr, 0, 0)

Definition at line 172 of file mips64.h.

◆ MIPS64_DMTC0

#define MIPS64_DMTC0 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP0, MIPS64_COP_DMT, gpr, cpr, 0, sel)

Definition at line 170 of file mips64.h.

◆ MIPS64_DMTC1

#define MIPS64_DMTC1 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_DMT, gpr, cpr, 0, 0)

Definition at line 174 of file mips64.h.

◆ MIPS64_DRET

#define MIPS64_DRET   0x4200001F

Definition at line 200 of file mips64.h.

◆ MIPS64_I_INST

#define MIPS64_I_INST (   opcode,
  rs,
  rt,
  immd 
)    (((opcode) << 26) | ((rs) << 21) | ((rt) << 16) | (immd))

Definition at line 154 of file mips64.h.

◆ MIPS64_J_INST

#define MIPS64_J_INST (   opcode,
  addr 
)    (((opcode) << 26) | (addr))

Definition at line 155 of file mips64.h.

◆ MIPS64_JR

#define MIPS64_JR (   reg)    MIPS64_R_INST(0, reg, 0, 0, 0, MIPS64_OP_JR)

Definition at line 197 of file mips64.h.

◆ MIPS64_LBU

#define MIPS64_LBU (   reg,
  off,
  base 
)    MIPS64_I_INST(MIPS64_OP_LBU, base, reg, off)

Definition at line 181 of file mips64.h.

◆ MIPS64_LD

#define MIPS64_LD (   reg,
  off,
  base 
)    MIPS64_I_INST(MIPS64_OP_LD, base, reg, off)

Definition at line 185 of file mips64.h.

◆ MIPS64_LHU

#define MIPS64_LHU (   reg,
  off,
  base 
)    MIPS64_I_INST(MIPS64_OP_LHU, base, reg, off)

Definition at line 182 of file mips64.h.

◆ MIPS64_LUI

#define MIPS64_LUI (   reg,
  val 
)    MIPS64_I_INST(MIPS64_OP_LUI, 0, reg, val)

Definition at line 183 of file mips64.h.

◆ MIPS64_LW

#define MIPS64_LW (   reg,
  off,
  base 
)    MIPS64_I_INST(MIPS64_OP_LW, base, reg, off)

Definition at line 184 of file mips64.h.

◆ MIPS64_MFC0

#define MIPS64_MFC0 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP0, MIPS64_COP_MF, gpr, cpr, 0, sel)

Definition at line 167 of file mips64.h.

◆ MIPS64_MFC1

#define MIPS64_MFC1 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_MF, gpr, cpr, 0, 0)

Definition at line 171 of file mips64.h.

◆ MIPS64_MFC2

#define MIPS64_MFC2 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP2, MIPS64_COP_MF, gpr, cpr, 0, sel)

Definition at line 175 of file mips64.h.

◆ MIPS64_MFHI

#define MIPS64_MFHI (   reg)    MIPS64_R_INST(0, 0, 0, reg, 0, MIPS64_OP_MFHI)

Definition at line 187 of file mips64.h.

◆ MIPS64_MFLO

#define MIPS64_MFLO (   reg)    MIPS64_R_INST(0, 0, 0, reg, 0, MIPS64_OP_MFLO)

Definition at line 186 of file mips64.h.

◆ MIPS64_MTC0

#define MIPS64_MTC0 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP0, MIPS64_COP_MT, gpr, cpr, 0, sel)

Definition at line 169 of file mips64.h.

◆ MIPS64_MTC1

#define MIPS64_MTC1 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP1, MIPS64_COP_MT, gpr, cpr, 0, 0)

Definition at line 173 of file mips64.h.

◆ MIPS64_MTC2

#define MIPS64_MTC2 (   gpr,
  cpr,
  sel 
)    MIPS64_R_INST(MIPS64_OP_COP2, MIPS64_COP_MT, gpr, cpr, 0, sel)

Definition at line 176 of file mips64.h.

◆ MIPS64_MTHI

#define MIPS64_MTHI (   reg)    MIPS64_R_INST(0, reg, 0, 0, 0, MIPS64_OP_MTHI)

Definition at line 189 of file mips64.h.

◆ MIPS64_MTLO

#define MIPS64_MTLO (   reg)    MIPS64_R_INST(0, reg, 0, 0, 0, MIPS64_OP_MTLO)

Definition at line 188 of file mips64.h.

◆ MIPS64_NOP

#define MIPS64_NOP   0

Definition at line 157 of file mips64.h.

◆ MIPS64_NUM_C0_REGS

#define MIPS64_NUM_C0_REGS   34

Definition at line 66 of file mips64.h.

◆ MIPS64_NUM_CORE_C0_REGS

#define MIPS64_NUM_CORE_C0_REGS   (MIPS64_NUM_CORE_REGS + MIPS64_NUM_C0_REGS)

Definition at line 73 of file mips64.h.

◆ MIPS64_NUM_CORE_REGS

#define MIPS64_NUM_CORE_REGS   34

Definition at line 65 of file mips64.h.

◆ MIPS64_NUM_FP_REGS

#define MIPS64_NUM_FP_REGS   38

Definition at line 67 of file mips64.h.

◆ MIPS64_NUM_REGS

#define MIPS64_NUM_REGS
Value:
(MIPS64_NUM_CORE_REGS + \
MIPS64_NUM_C0_REGS + \
MIPS64_NUM_FP_REGS)
MIPS64_NUM_CORE_REGS
#define MIPS64_NUM_CORE_REGS
Definition: mips64.h:65

Definition at line 69 of file mips64.h.

◆ MIPS64_OP_ADDI

#define MIPS64_OP_ADDI   0x08

Definition at line 120 of file mips64.h.

◆ MIPS64_OP_AND

#define MIPS64_OP_AND   0x24

Definition at line 124 of file mips64.h.

◆ MIPS64_OP_ANDI

#define MIPS64_OP_ANDI   0x0c

Definition at line 121 of file mips64.h.

◆ MIPS64_OP_BEQ

#define MIPS64_OP_BEQ   0x04

Definition at line 118 of file mips64.h.

◆ MIPS64_OP_BNE

#define MIPS64_OP_BNE   0x05

Definition at line 119 of file mips64.h.

◆ MIPS64_OP_COP0

#define MIPS64_OP_COP0   0x10

Definition at line 141 of file mips64.h.

◆ MIPS64_OP_COP1

#define MIPS64_OP_COP1   0x11

Definition at line 142 of file mips64.h.

◆ MIPS64_OP_COP2

#define MIPS64_OP_COP2   0x12

Definition at line 143 of file mips64.h.

◆ MIPS64_OP_DADDI

#define MIPS64_OP_DADDI   0x18

Definition at line 122 of file mips64.h.

◆ MIPS64_OP_DADDIU

#define MIPS64_OP_DADDIU   0x19

Definition at line 123 of file mips64.h.

◆ MIPS64_OP_JR

#define MIPS64_OP_JR   0x08

Definition at line 139 of file mips64.h.

◆ MIPS64_OP_LBU

#define MIPS64_OP_LBU   0x24

Definition at line 128 of file mips64.h.

◆ MIPS64_OP_LD

#define MIPS64_OP_LD   0x37

Definition at line 127 of file mips64.h.

◆ MIPS64_OP_LHU

#define MIPS64_OP_LHU   0x25

Definition at line 129 of file mips64.h.

◆ MIPS64_OP_LUI

#define MIPS64_OP_LUI   0x0F

Definition at line 125 of file mips64.h.

◆ MIPS64_OP_LW

#define MIPS64_OP_LW   0x23

Definition at line 126 of file mips64.h.

◆ MIPS64_OP_MFHI

#define MIPS64_OP_MFHI   0x10

Definition at line 130 of file mips64.h.

◆ MIPS64_OP_MFLO

#define MIPS64_OP_MFLO   0x12

Definition at line 132 of file mips64.h.

◆ MIPS64_OP_MTHI

#define MIPS64_OP_MTHI   0x11

Definition at line 131 of file mips64.h.

◆ MIPS64_OP_MTLO

#define MIPS64_OP_MTLO   0x13

Definition at line 133 of file mips64.h.

◆ MIPS64_OP_ORI

#define MIPS64_OP_ORI   0x0D

Definition at line 138 of file mips64.h.

◆ MIPS64_OP_SB

#define MIPS64_OP_SB   0x28

Definition at line 134 of file mips64.h.

◆ MIPS64_OP_SD

#define MIPS64_OP_SD   0x3F

Definition at line 137 of file mips64.h.

◆ MIPS64_OP_SH

#define MIPS64_OP_SH   0x29

Definition at line 135 of file mips64.h.

◆ MIPS64_OP_SRL

#define MIPS64_OP_SRL   0x02

Definition at line 117 of file mips64.h.

◆ MIPS64_OP_SW

#define MIPS64_OP_SW   0x2B

Definition at line 136 of file mips64.h.

◆ MIPS64_ORI

#define MIPS64_ORI (   src,
  tar,
  val 
)    MIPS64_I_INST(MIPS64_OP_ORI, src, tar, val)

Definition at line 190 of file mips64.h.

◆ MIPS64_PC

#define MIPS64_PC   MIPS64_NUM_CORE_REGS

Definition at line 75 of file mips64.h.

◆ MIPS64_R_INST

#define MIPS64_R_INST (   opcode,
  rs,
  rt,
  rd,
  shamt,
  funct 
)    (((opcode) << 26) | ((rs) << 21) | ((rt) << 16) | ((rd) << 11) | ((shamt) << 6) | (funct))

Definition at line 152 of file mips64.h.

◆ MIPS64_SB

#define MIPS64_SB (   reg,
  off,
  base 
)    MIPS64_I_INST(MIPS64_OP_SB, base, reg, off)

Definition at line 191 of file mips64.h.

◆ MIPS64_SD

#define MIPS64_SD (   reg,
  off,
  base 
)    MIPS64_I_INST(MIPS64_OP_SD, base, reg, off)

Definition at line 194 of file mips64.h.

◆ MIPS64_SDBBP

#define MIPS64_SDBBP   0x7000003F

Definition at line 201 of file mips64.h.

◆ MIPS64_SDBBP_LE

#define MIPS64_SDBBP_LE   0x3f000007

Definition at line 202 of file mips64.h.

◆ MIPS64_SDBBP_SIZE

#define MIPS64_SDBBP_SIZE   4

Definition at line 203 of file mips64.h.

◆ MIPS64_SH

#define MIPS64_SH (   reg,
  off,
  base 
)    MIPS64_I_INST(MIPS64_OP_SH, base, reg, off)

Definition at line 192 of file mips64.h.

◆ MIPS64_SRL

#define MIPS64_SRL (   d,
  w,
  sh 
)    MIPS64_R_INST(0, 0, w, d, sh, MIPS64_OP_SRL)

Definition at line 163 of file mips64.h.

◆ MIPS64_SW

#define MIPS64_SW (   reg,
  off,
  base 
)    MIPS64_I_INST(MIPS64_OP_SW, base, reg, off)

Definition at line 193 of file mips64.h.

◆ MIPS64_SYNC

#define MIPS64_SYNC   0x0000000F

Definition at line 206 of file mips64.h.

◆ MIPS64_SYNCI

#define MIPS64_SYNCI (   reg,
  off 
)    (1 << 26 | (reg) << 21 | 0x1f << 16 | (off))

Definition at line 196 of file mips64.h.

Function Documentation

◆ mips64_arch_state()

int mips64_arch_state ( struct target *  target)

Definition at line 354 of file mips64.c.

References target::arch_info, buf_get_u64(), mips64_common::common_magic, mips64_common::core_cache, debug_reason_name(), ERROR_OK, LOG_ERROR, LOG_USER, MIPS64_COMMON_MAGIC, MIPS64_PC, reg_cache::reg_list, and reg::value.

◆ mips64_build_reg_cache()

int mips64_build_reg_cache ( struct target *  target)

Definition at line 375 of file mips64.c.

References reg::arch_info, target::arch_info, reg::caller_save, mips64_common::core_cache, ERROR_FAIL, ERROR_OK, reg::exist, mips64_core_reg::feature, reg::feature, reg::group, LOG_ERROR, mips64_core_reg::mips64_common, MIPS64_NUM_REGS, mips64_reg_type, mips64_regs, reg_feature::name, reg::name, reg_cache::name, NULL, mips64_core_reg::num, reg_cache::num_regs, reg::number, target::reg_cache, mips64_core_reg::reg_data_type, reg::reg_data_type, reg_cache::reg_list, reg_type2size(), register_get_last_cache_p(), reg::size, target, mips64_core_reg::target, type, reg_data_type::type, reg::type, mips64_core_reg::value, and reg::value.

Referenced by mips_mips64_init_target().

◆ mips64_configure_break_unit()

int mips64_configure_break_unit ( struct target *  target)

Definition at line 557 of file mips64.c.

References target::arch_info, mips64_common::bp_scanned, EJTAG64_DCR, EJTAG64_DCR_DB, EJTAG64_DCR_IB, ERROR_OK, LOG_DEBUG, mips64_configure_d_break_unit(), mips64_configure_i_break_unit(), mips64_common::num_data_bpoints, mips64_common::num_inst_bpoints, and target_read_u64().

Referenced by mips_mips64_debug_entry().

◆ mips64_enable_interrupts()

int mips64_enable_interrupts ( struct target *  target,
bool  enable 
)

Definition at line 591 of file mips64.c.

References EJTAG64_DCR, EJTAG64_DCR_INTE, ERROR_OK, target_read_u64(), and target_write_u64().

Referenced by mips_mips64_resume(), mips_mips64_single_step_core(), and mips_mips64_step().

◆ mips64_examine()

int mips64_examine ( struct target *  target)

Definition at line 468 of file mips64.c.

References target::arch_info, mips64_common::bp_scanned, ERROR_OK, mips64_common::num_data_bpoints, mips64_common::num_data_bpoints_avail, mips64_common::num_inst_bpoints, mips64_common::num_inst_bpoints_avail, target_set_examined(), and target_was_examined().

Referenced by mips_mips64_examine().

◆ mips64_get_gdb_reg_list()

int mips64_get_gdb_reg_list ( struct target *  target,
struct reg **  reg_list[],
int *  reg_list_size,
enum target_register_class  reg_class 
)

Definition at line 308 of file mips64.c.

References target::arch_info, mips64_common::core_cache, ERROR_OK, MIPS64_NUM_REGS, and reg_cache::reg_list.

◆ mips64_init_arch_info()

int mips64_init_arch_info ( struct target *  target,
struct mips64_common *  mips64,
struct jtag_tap *  tap 
)

Definition at line 444 of file mips64.c.

References mips64_common::bp_scanned, mips64_common::common_magic, mips64_common::data_break_list, mips64_common::ejtag_info, ERROR_OK, mips64_common::fast_data_area, MIPS64_COMMON_MAGIC, mips64_read_core_reg(), mips64_write_core_reg(), mips64_common::mips64mode32, NULL, mips64_common::read_core_reg, mips_ejtag::tap, and mips64_common::write_core_reg.

Referenced by mips_mips64_target_create().

◆ mips64_invalidate_core_regs()

int mips64_invalidate_core_regs ( struct target *  target)

Definition at line 293 of file mips64.c.

References target::arch_info, mips64_common::core_cache, reg::dirty, ERROR_OK, reg_cache::num_regs, reg_cache::reg_list, and reg::valid.

Referenced by mips_mips64_assert_reset(), mips_mips64_resume(), and mips_mips64_step().

◆ mips64_register_commands()

int mips64_register_commands ( struct command_context *  cmd_ctx)

◆ mips64_restore_context()

int mips64_restore_context ( struct target *  target)

Definition at line 341 of file mips64.c.

References target::arch_info, mips64_common::core_cache, mips64_common::core_regs, reg::dirty, mips64_common::ejtag_info, MIPS64_NUM_REGS, mips64_pracc_write_regs(), reg_cache::reg_list, and mips64_common::write_core_reg.

Referenced by mips_mips64_resume(), and mips_mips64_step().

◆ mips64_run_algorithm()

int mips64_run_algorithm ( struct target *  target,
int  num_mem_params,
struct mem_param *  mem_params,
int  num_reg_params,
struct reg_param *  reg_params,
target_addr_t  entry_point,
target_addr_t  exit_point,
int  timeout_ms,
void *  arch_info 
)

Definition at line 459 of file mips64.c.

References ERROR_OK.

◆ mips64_save_context()

int mips64_save_context ( struct target *  target)

Definition at line 325 of file mips64.c.

References target::arch_info, mips64_common::core_regs, mips64_common::ejtag_info, ERROR_OK, MIPS64_NUM_REGS, mips64_pracc_read_regs(), and mips64_common::read_core_reg.

Referenced by mips_mips64_debug_entry().