Go to the source code of this file.
◆ BRP_CONTEXT
◆ BRP_NORMAL
◆ CORTEX_A15_PARTNUM
#define CORTEX_A15_PARTNUM 0xc0f |
◆ CORTEX_A5_PARTNUM
#define CORTEX_A5_PARTNUM 0xc05 |
◆ CORTEX_A7_PARTNUM
#define CORTEX_A7_PARTNUM 0xc07 |
◆ CORTEX_A8_PARTNUM
#define CORTEX_A8_PARTNUM 0xc08 |
◆ CORTEX_A9_PARTNUM
#define CORTEX_A9_PARTNUM 0xc09 |
◆ CORTEX_A_COMMON_MAGIC
#define CORTEX_A_COMMON_MAGIC 0x411fc082U |
◆ CORTEX_A_MIDR_PARTNUM_MASK
#define CORTEX_A_MIDR_PARTNUM_MASK 0x0000fff0 |
◆ CORTEX_A_MIDR_PARTNUM_SHIFT
#define CORTEX_A_MIDR_PARTNUM_SHIFT 4 |
◆ CORTEX_A_PADDRDBG_CPU_SHIFT
#define CORTEX_A_PADDRDBG_CPU_SHIFT 13 |
◆ CPUDBG_CPUID
#define CPUDBG_CPUID 0xD00 |
◆ CPUDBG_CTYPR
#define CPUDBG_CTYPR 0xD04 |
◆ CPUDBG_LOCKACCESS
#define CPUDBG_LOCKACCESS 0xFB0 |
◆ CPUDBG_LOCKSTATUS
#define CPUDBG_LOCKSTATUS 0xFB4 |
◆ CPUDBG_OSLAR_LK_MASK
#define CPUDBG_OSLAR_LK_MASK (1 << 1) |
◆ CPUDBG_TTYPR
#define CPUDBG_TTYPR 0xD0C |
◆ cortex_a_dacrfixup_mode
Enumerator |
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CORTEX_A_DACRFIXUP_OFF | |
CORTEX_A_DACRFIXUP_ON | |
Definition at line 49 of file cortex_a.h.
◆ cortex_a_isrmasking_mode
Enumerator |
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CORTEX_A_ISRMASK_OFF | |
CORTEX_A_ISRMASK_ON | |
Definition at line 44 of file cortex_a.h.
◆ target_to_cortex_a()
Definition at line 104 of file cortex_a.h.
References target::arch_info, armv7a_common::arm, and container_of.
Referenced by COMMAND_HANDLER(), cortex_a_add_breakpoint(), cortex_a_add_context_breakpoint(), cortex_a_add_hybrid_breakpoint(), cortex_a_add_watchpoint(), cortex_a_debug_entry(), cortex_a_deinit_target(), cortex_a_examine_first(), cortex_a_mmu(), cortex_a_mmu_modify(), cortex_a_poll(), cortex_a_post_debug_entry(), cortex_a_post_memaccess(), cortex_a_prep_memaccess(), cortex_a_remove_breakpoint(), cortex_a_remove_watchpoint(), cortex_a_restore_cp15_control_reg(), cortex_a_set_breakpoint(), cortex_a_set_context_breakpoint(), cortex_a_set_hybrid_breakpoint(), cortex_a_set_watchpoint(), cortex_a_step(), cortex_a_unset_breakpoint(), and cortex_a_unset_watchpoint().