8 #ifndef OPENOCD_TARGET_ARM_CTI_H
9 #define OPENOCD_TARGET_ARM_CTI_H
13 #define CTI_INACK 0x10
14 #define CTI_APPSET 0x14
15 #define CTI_APPCLEAR 0x18
16 #define CTI_APPPULSE 0x1C
17 #define CTI_INEN0 0x20
18 #define CTI_INEN1 0x24
19 #define CTI_INEN2 0x28
20 #define CTI_INEN3 0x2C
21 #define CTI_INEN4 0x30
22 #define CTI_INEN5 0x34
23 #define CTI_INEN6 0x38
24 #define CTI_INEN7 0x3C
25 #define CTI_INEN8 0x40
26 #define CTI_INEN(n) (0x20 + 4 * n)
27 #define CTI_OUTEN0 0xA0
28 #define CTI_OUTEN1 0xA4
29 #define CTI_OUTEN2 0xA8
30 #define CTI_OUTEN3 0xAC
31 #define CTI_OUTEN4 0xB0
32 #define CTI_OUTEN5 0xB4
33 #define CTI_OUTEN6 0xB8
34 #define CTI_OUTEN7 0xBC
35 #define CTI_OUTEN8 0xC0
36 #define CTI_OUTEN(n) (0xA0 + 4 * n)
37 #define CTI_TRIN_STATUS 0x130
38 #define CTI_TROUT_STATUS 0x134
39 #define CTI_CHIN_STATUS 0x138
40 #define CTI_CHOU_STATUS 0x13C
41 #define CTI_GATE 0x140
42 #define CTI_UNLOCK 0xFB0
44 #define CTI_CHNL(x) (1 << x)
45 #define CTI_TRIG_HALT 0
46 #define CTI_TRIG_RESUME 1
47 #define CTI_TRIG(n) (1 << CTI_TRIG_##n)
int arm_cti_clear_channel(struct arm_cti *self, uint32_t channel)
int arm_cti_read_reg(struct arm_cti *self, unsigned int reg, uint32_t *value)
int arm_cti_ack_events(struct arm_cti *self, uint32_t event)
int arm_cti_write_reg(struct arm_cti *self, unsigned int reg, uint32_t value)
int cti_register_commands(struct command_context *cmd_ctx)
int arm_cti_gate_channel(struct arm_cti *self, uint32_t channel)
int arm_cti_set_channel(struct arm_cti *self, uint32_t channel)
int arm_cti_pulse_channel(struct arm_cti *self, uint32_t channel)
int arm_cti_enable(struct arm_cti *self, bool enable)
int arm_cti_cleanup_all(void)
const char * arm_cti_name(struct arm_cti *self)
struct arm_cti * cti_instance_by_jim_obj(Jim_Interp *interp, Jim_Obj *o)
int arm_cti_ungate_channel(struct arm_cti *self, uint32_t channel)
This represents an ARM Debug Interface (v5) Access Port (AP).