OpenOCD
Data Structures
Here are the data structures with brief descriptions:
[detail level
1
2
]
C
aarch64_brp
C
aarch64_common
C
aarch64_private_config
C
adapter_driver
Represents a driver for a debugging interface
C
adapter_gpio_config
Configuration options for a single GPIO
C
adiv5_ap
This represents an ARM Debug Interface (v5) Access Port (AP)
C
adiv5_dap
This represents an ARM Debug Interface (v5) Debug Access Port (DAP)
C
adiv5_mem_ap_spot
C
adiv5_private_config
C
aice_nds32_info
C
aice_port
C
aice_port_api_s
C
aice_port_param_s
C
aice_port_s
C
aice_usb_handler_s
C
ambiqmicro_flash_bank
C
arc_actionpoint
C
arc_common
C
arc_jtag
C
arc_reg_bitfield
C
arc_reg_data_type
C
arc_reg_desc
C
archnames
C
arm
Represents a generic ARM core, with standard application registers
C
arm11_common
C
arm11_sc7_action
Used with arm11_sc7_run to make a list of read/write commands for scan chain 7
C
arm720t_common
C
arm7_9_common
Structure for items that are common between both ARM7 and ARM9 targets
C
arm920t_cache_line
C
arm920t_common
C
arm920t_tlb_entry
C
arm926ejs_common
C
arm946e_common
C
arm966e_common
C
arm9tdmi_vector
C
arm_algorithm
C
arm_b_bl_bx_blx_instr
C
arm_cti
C
arm_dap_object
C
arm_data_proc_instr
C
arm_dpm
This wraps an implementation of DPM primitives
C
arm_instruction
C
arm_jtag
C
arm_load_store_instr
C
arm_load_store_multiple_instr
C
arm_nand_data
The
arm_nand_data
struct is used for defining NAND I/O operations on an ARM core
C
arm_reg
C
arm_shifter_operand
C
arm_sim_interface
C
arm_tpiu_swo_connection
C
arm_tpiu_swo_event_action
C
arm_tpiu_swo_object
C
arm_tpiu_swo_priv_connection
C
armjtagew
C
armv4_5_cache_common
C
armv4_5_cachesize
C
armv4_5_mmu_common
C
armv7a_arch_cache
C
armv7a_cache_common
C
armv7a_cachesize
C
armv7a_common
C
armv7a_l2x_cache
C
armv7a_mmu_common
C
armv7m_algorithm
C
armv7m_common
C
armv7m_trace_config
C
armv8_arch_cache
C
armv8_cache_common
C
armv8_cachesize
C
armv8_common
C
armv8_l2x_cache
C
armv8_mmu_common
C
at91sam7_flash_bank
C
at91sam9_nand
Private data for the controller that is stored in the NAND device structure
C
at91sam9_pin
Representation of a pin on an AT91SAM9 chip
C
ath79_flash_bank
C
ath79_spi_ctx
C
ath79_target
C
avr32_ap7k_common
C
avr32_core_reg
C
avr32_jtag
C
avr_common
C
avrf_flash_bank
C
avrf_type
C
backoff_timer
C
bit_copy_queue
C
bit_copy_queue_entry
C
bitbang_interface
Low level callbacks (for bitbang)
C
bitq_interface
C
bitq_state
C
bits_t
C
bluenrgx_flash_bank
C
breakpoint
C
cable
C
cache_info
C
cc26xx_algo_params
C
cc26xx_bank
C
cc3220sf_bank
C
cfi_atmel_pri_ext
C
cfi_fixup
C
cfi_flash_bank
C
cfi_intel_pri_ext
C
cfi_spansion_pri_ext
C
cfi_unlock_addresses
C
chibios_chdebug
ChibiOS/RT memory signature record
C
chibios_params
C
chromium_ec_params
C
cmd_queue_page
C
cmsis_dap
C
cmsis_dap_backend
C
cmsis_dap_backend_data
C
command
C
command_context
C
command_invocation
When run_command is called, a new instance will be created on the stack, filled with the proper values, and passed by reference to the required COMMAND_HANDLER routine
C
command_registration
C
connection
C
cortex_a_brp
C
cortex_a_common
C
cortex_a_wrp
C
cortex_m_common
C
cortex_m_dwt_comparator
C
cortex_m_fp_comparator
C
cortex_m_part_info
C
cpu_context
C
cs_component_vals
Holds registers and coordinates of a CoreSight component
C
csr_info
C
current_thread
C
dap_cmd
C
dap_cmd_pool
C
dap_lookup_data
C
dap_ops
Transport-neutral representation of queued DAP transactions, supporting both JTAG and SWD transports
C
dap_part_nums
C
dap_queue
C
davinci_nand
C
debug_msg_receiver
C
device_config
C
device_t
C
dm013_info_t
C
dmac_ll
C
dpm_bp
C
dpm_bpwp
C
dpm_wp
C
drvs_map
C
dsp563xx_common
C
dsp563xx_core_reg
C
dsp5680xx_common
C
dtc_reply_queue_entry
C
duration
C
dwt_reg
C
dwt_reg_state
C
ecos_params
C
ecos_thread_state
C
efm32_family_data
C
efm32_info
C
efm32x_flash_chip
C
Elf32_Ehdr
C
Elf32_Phdr
C
Elf64_Ehdr
C
Elf64_Phdr
C
em357_flash_bank
C
em357_options
C
embeddedice_reg
C
embkernel_params
C
end_state_command
C
esirisc_common
C
esirisc_flash_bank
C
esirisc_jtag
C
esirisc_memory
C
esirisc_reg
C
esirisc_trace
C
esp32_common
C
esp32s2_common
C
esp32s3_common
C
esp_semihost_data
C
esp_semihost_ops
Semihost calls handling operations
C
esp_usb_jtag
C
esp_xtensa_common
C
esp_xtensa_smp_chip_ops
C
esp_xtensa_smp_common
C
etb
C
etb_reg
C
etm_capture_driver
C
etm_context
C
etm_reg
C
etm_reg_info
C
etmv1_trace_data
C
fast_load
C
faux_flash_bank
C
fespi_flash_bank
C
fespi_target
C
fileio
C
flash_bank
Provides details of a flash bank, available either on-chip or through a major interface
C
flash_ctrl_priv_data
C
flash_device
C
flash_driver
Provides the implementation-independent structure that defines all of the callbacks required by OpenOCD flash drivers
C
flash_sector
Describes the geometry and status of a single flash sector within a flash bank
C
fm3_flash_bank
C
fm4_flash_bank
C
freertos_params
C
gdb_connection
C
gdb_fileio_info
C
gdb_service
C
gpio_map
C
hardware_breakpoint
C
help_entry
C
hl_interface_param_s
C
hl_interface_s
C
hl_layout
C
hl_layout_api_s
C
hlist_head
C
hlist_node
C
hwthread_params
C
icdi_usb_handle_s
C
image
C
image_binary
C
image_elf
C
image_ihex
C
image_memory
C
image_mot
C
imagesection
C
imx_gpio_regs
C
initial_gpio_state
C
interface_delay_t
C
interface_gpio_t
C
interface_jtag_raw_t
C
interface_swd_t
C
interface_target_voltage_t
C
ipdbg_connection
C
ipdbg_fifo
C
ipdbg_hub
C
ipdbg_service
C
ipdbg_virtual_ir_info
C
jim_getopt_info
A TCL -ish GetOpt like code
C
jim_nvp
Name Value Pairs, aka: NVP
C
jim_scriptobj
C
jsp_service
C
jtag_callback_entry
C
jtag_command
C
jtag_command_container
Defines a container type that hold a pointer to a JTAG command structure of any defined type
C
jtag_event_callback
Contains a single callback along with a pointer that will be passed when an event occurs
C
jtag_gen_hdr
C
jtag_interface
Represents a driver for a debugging interface
C
jtag_proto_caps_hdr
C
jtag_proto_caps_speed_apb
C
jtag_tap
C
jtag_tap_event_action
C
jtagspi_flash_bank
C
kinetis_chip
C
kinetis_flash_bank
C
kinetis_ke_flash_bank
C
kinetis_type
C
kitprog
C
l2c_init_data
C
l2x0_regs
C
lakemont_core_reg
C
linux_os
C
list_head
C
log_callback
C
log_capture_state
C
lpc2000_flash_bank
C
lpc288x_flash_bank
C
lpc2900_flash_bank
Private data for
lpc2900
flash driver
C
lpc3180_nand_controller
C
lpc32xx_nand_controller
C
lpcspifi_flash_bank
C
ls1_sap
C
max32xxx_flash_bank
C
mcu_jtag
C
mdr_flash_bank
C
mem_ap
C
mem_ap_alloc_reg_list
C
mem_param
C
memory_cache_line
C
mips32_algorithm
C
mips32_common
C
mips32_comparator
C
mips32_core_reg
C
mips64_common
C
mips64_comparator
C
mips64_core_reg
C
mips64_pracc_context
C
mips_ejtag
C
mips_m4k_common
C
mips_mips64_common
C
mpsse_ctx
C
mqx_params
C
mqx_state
C
mrvlqspi_flash_bank
C
msp432_algo_params
C
msp432_bank
C
mx3_nf_controller
C
mx3_nf_flags
C
mxc_nf_controller
C
mxc_nf_flags
C
name_mapping
C
nand_block
Representation of a single NAND block in a NAND device
C
nand_device
C
nand_ecclayout
C
nand_fileio_state
C
nand_flash_controller
Interface for NAND flash controllers
C
nand_info
C
nand_manufacturer
C
nand_oobfree
C
nds32
Represents a generic Andes core
C
nds32_cache
C
nds32_cpu_version
C
nds32_edm
C
nds32_edm_operation
C
nds32_instruction
C
nds32_memory
C
nds32_misc_config
C
nds32_mmu_config
C
nds32_reg
C
nds32_reg_exception_s
C
nds32_reg_s
C
nds32_v2_common
C
nds32_v3_common
C
nds32_v3_common_callback
C
nds32_v3m_common
C
niietcm4_flash_bank
Private data for flash driver
C
non_cfi
C
npcx_flash_bank
C
npcx_flash_info
C
nrf52_ficr_info
C
nrf5_device_package
C
nrf5_device_spec
►
C
nrf5_info
C
nrf5_bank
C
nuc910_nand_controller
C
nulink_usb_handle_s
C
numicro_cpu_type
C
numicro_flash_bank
C
numicro_flash_bank_type
C
ocl_priv
C
once_reg
C
opendous_jtag
C
opendous_probe
C
openjtag_scan_result
C
or1k_common
C
or1k_core_reg
C
or1k_core_reg_init
C
or1k_du
C
or1k_jtag
C
or1k_tap_ip
C
orion_nand_controller
C
osbdm
C
outer_cache_fns
C
pa_list
C
page_table_walker_info_s
C
pathmove_command
C
pending_request_block
C
pending_scan_result
C
pending_transfer_result
C
pic32mx_devs_s
C
pic32mx_flash_bank
C
pld_device
C
pld_driver
C
pracc_queue_info
C
presto
C
psoc4_chip_family
C
psoc4_flash_bank
C
psoc5lp_device
C
psoc5lp_eeprom_flash_bank
C
psoc5lp_flash_bank
C
psoc5lp_nvl_flash_bank
C
psoc6_target_info
C
queue
C
range
C
range_list_t
C
reg
C
reg_arch_type
C
reg_cache
C
reg_data_type
C
reg_data_type_bitfield
C
reg_data_type_flags
C
reg_data_type_flags_field
C
reg_data_type_struct
C
reg_data_type_struct_field
C
reg_data_type_union
C
reg_data_type_union_field
C
reg_data_type_vector
C
reg_feature
C
reg_param
C
reset_command
C
riot_params
C
riot_symbol
C
riot_thread_state
C
riscv011_info_t
C
riscv013_info_t
C
riscv_batch
C
riscv_bscan_tunneled_scan_context_t
C
riscv_info
C
riscv_program
C
riscv_reg_info_t
C
riscv_sample_buf
C
riscv_sample_config_t
C
rlink_speed_table
C
row_region
C
rp2040_flash_bank
►
C
rsl10_info
C
rsl10_bank
C
rtos
C
rtos_reg
C
rtos_register_stacking
C
rtos_type
C
rtp_ops
Actions/operations to be executed while parsing ROM tables
C
rtt_channel
RTT channel
C
rtt_channel_info
RTT channel information
C
rtt_control
RTT control block
C
rtt_service
C
rtt_sink_list
C
rtt_source
RTT source
C
runtest_command
C
s3c24xx_nand_controller
C
sam3_bank_private
C
sam3_cfg
C
sam3_chip
C
sam3_chip_details
C
sam3_reg_list
C
sam4_bank_private
C
sam4_cfg
C
sam4_chip
C
sam4_chip_details
C
sam4_reg_list
C
sam4l_chip_info
C
sam4l_info
C
samd_family
C
samd_info
C
samd_part
C
samv_flash_bank
C
scan_blk
C
scan_command
The
scan_command
provide a means of encapsulating a set of scan_field_s structures that should be scanned in/out to the device
C
scan_field
This structure defines a single scan field in the scan
C
scan_result
C
scans_t
C
scratch_mem_t
C
sector_info
C
semihosting
C
semihosting_tcp_service
C
sequence
C
service
C
service_driver
C
setup_data
USB Control Setup Data
C
sfdp_4byte_addr_param
C
sfdp_basic_flash_param
C
sfdp_hdr
C
sfdp_phdr
C
sh_qspi_flash_bank
C
sh_qspi_target
C
signal
C
sim3x_info
C
sleep_command
C
speed_map
C
stableclocks_command
C
stack_register_offset
C
statemove_command
C
stellaris_flash_bank
C
stlink_backend_s
C
stlink_tcp_priv_s
C
stlink_tcp_version
C
stlink_usb_handle_s
C
stlink_usb_priv_s
C
stlink_usb_version
C
stm32h7x_flash_bank
C
stm32h7x_part_info
C
stm32h7x_rev
C
stm32l4_flash_bank
C
stm32l4_part_info
C
stm32l4_rev
►
C
stm32l4_work_area
C
flash_async_algorithm_circbuf
C
stm32l4_loader_params
C
stm32l4_wrp
C
stm32lx_flash_bank
C
stm32lx_part_info
C
stm32lx_rev
C
stm32x_flash_bank
C
stm32x_options
C
stm32x_property_addr
C
stm8_algorithm
C
stm8_common
C
stm8_comparator
C
stm8_core_reg
C
stmqspi_flash_bank
C
stmsmi_flash_bank
C
stmsmi_target
C
str7x_flash_bank
C
str7x_mem_layout
C
str9x_flash_bank
C
str9xpec_flash_controller
C
svf_check_tdo_para
C
svf_para
C
svf_statemove
C
svf_xxr_para
C
swbp_mem_patch
C
swd_cmd_queue_entry
C
swd_driver
C
swim_driver
C
symbol_table_elem
Table should be terminated by an element with NULL in symbol_name
C
symbols
C
target
C
target_desc_format
C
target_event_action
C
target_event_callback
C
target_list
C
target_list_t
C
target_memory_check_block
C
target_reset_callback
C
target_timer_callback
C
target_trace_callback
C
target_type
This holds methods shared between all instances of a given target type
C
tcb
C
tcl_connection
C
telnet_connection
C
telnet_service
C
thread_detail
C
threads
C
threadx_params
C
threadx_thread_state
C
timeout
C
timeval
C
tms470_flash_bank
C
tms_command
Encapsulates a series of bits to be clocked out, affecting state and mode of the interface
C
tms_sequences
C
trace
C
trace_point
C
transfer_result
C
transport
Wrapper for transport lifecycle operations
C
trigger
C
ublast_info
C
ublast_lowlevel
C
ublast_lowlevel_priv
C
ucos_iii_params
C
ulink
Describes one driver instance
C
ulink_cmd
OpenULINK command (OpenULINK command queue element)
C
usart_status_t
C
usb_config_descriptor
USB Configuration Descriptor
C
usb_device_descriptor
USB Device Descriptor
C
usb_endpoint_descriptor
USB Endpoint Descriptor
C
usb_interface_descriptor
USB Interface Descriptor
C
usb_language_descriptor
USB Language Descriptor
C
usb_string_descriptor
USB String Descriptor
C
usbprog_jtag
C
usbtoxxx_context_t
C
vd_client
C
vd_jtag_hdr
C
vd_rdata
C
vd_reg_hdr
C
vd_shm
C
versaloon_adaptors_t
C
versaloon_interface_t
C
versaloon_pending_t
C
versaloon_usb_setting_t
C
versaloon_want_pos_t
C
virt2phys_info_t
C
virtex2_pld_device
C
vpi_cmd
C
vsllink
C
w600_flash_bank
C
w600_flash_param
C
watchpoint
C
working_area
C
x86_32_common
C
x86_32_dbg_reg
C
xcf_priv
C
xcf_status
C
xds110_info
C
xilinx_bit_file
C
xlnx_pcie_xvc
C
xmc1xxx_flash_bank
C
xmc4xxx_command_seq
C
xmc4xxx_flash_bank
C
xscale_common
C
xscale_reg
C
xscale_trace
C
xscale_trace_data
C
xscale_trace_entry
C
xtensa
Represents a generic Xtensa core
C
xtensa_cache_config
C
xtensa_chip_common
C
xtensa_config
C
xtensa_core_status
C
xtensa_debug_config
C
xtensa_debug_module
C
xtensa_debug_module_config
C
xtensa_debug_ops
C
xtensa_dm_pwr_reg_offsets
C
xtensa_dm_reg_offsets
C
xtensa_high_prio_irq_config
C
xtensa_irq_config
C
xtensa_keyval_info_s
C
xtensa_local_mem_config
C
xtensa_local_mem_region_config
C
xtensa_mmu_config
C
xtensa_mpu_config
C
xtensa_perfmon_config
C
xtensa_perfmon_result
C
xtensa_power_ops
C
xtensa_power_status
C
xtensa_reg_desc
C
xtensa_reg_val_u
C
xtensa_sw_breakpoint
C
xtensa_trace_config
C
xtensa_trace_start_config
C
xtensa_trace_status
C
xtensa_tracing_config
C
zephyr_array
C
zephyr_params
C
zephyr_thread
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