OpenOCD
Data Structures | Macros | Enumerations | Functions | Variables
esp32.c File Reference
Include dependency graph for esp32.c:

Go to the source code of this file.

Data Structures

struct  esp32_common
 

Macros

#define ESP32_DPORT_APPCPU_CLKGATE_EN   BIT(0)
 
#define ESP32_DPORT_APPCPU_CTRL_B_REG   (ESP32_DR_REG_DPORT_BASE + 0x030)
 
#define ESP32_DR_REG_DPORT_BASE   ESP32_DR_REG_LOW
 
#define ESP32_DR_REG_HIGH   0x3ff71000
 
#define ESP32_DR_REG_LOW   0x3ff00000
 
#define ESP32_DRAM_HIGH   0x40000000
 
#define ESP32_DRAM_LOW   0x3ffae000
 
#define ESP32_EXTRAM_DATA_HIGH   0x3fc00000
 
#define ESP32_EXTRAM_DATA_LOW   0x3f800000
 
#define ESP32_IRAM_HIGH   0x400a0000
 
#define ESP32_IRAM_LOW   0x40070000
 
#define ESP32_IROM_MASK_HIGH   0x40064f00
 
#define ESP32_IROM_MASK_LOW   0x40000000
 
#define ESP32_RTC_CNTL_SW_CPU_STALL_DEF   0x0
 
#define ESP32_RTC_CNTL_SW_CPU_STALL_REG   (ESP32_RTCCNTL_BASE + 0xac)
 
#define ESP32_RTC_DATA_HIGH   0x50002000
 
#define ESP32_RTC_DATA_LOW   0x50000000
 
#define ESP32_RTC_DRAM_HIGH   0x3ff82000
 
#define ESP32_RTC_DRAM_LOW   0x3ff80000
 
#define ESP32_RTC_IRAM_HIGH   0x400c2000
 
#define ESP32_RTC_IRAM_LOW   0x400c0000
 
#define ESP32_RTC_SLOW_MEM_BASE   ESP32_RTC_DATA_LOW
 
#define ESP32_RTCCNTL_BASE   0x3ff48000
 
#define ESP32_RTCWDT_CFG   (ESP32_RTCCNTL_BASE + ESP32_RTCWDT_CFG_OFF)
 
#define ESP32_RTCWDT_CFG_OFF   0x8C
 
#define ESP32_RTCWDT_PROTECT   (ESP32_RTCCNTL_BASE + ESP32_RTCWDT_PROTECT_OFF)
 
#define ESP32_RTCWDT_PROTECT_OFF   0xA4
 
#define ESP32_SYS_RAM_HIGH   (ESP32_SYS_RAM_LOW + 0x20000000UL)
 
#define ESP32_SYS_RAM_LOW   0x60000000UL
 
#define ESP32_TIMG0_BASE   0x3ff5f000
 
#define ESP32_TIMG0WDT_CFG0   (ESP32_TIMG0_BASE + ESP32_TIMGWDT_CFG0_OFF)
 
#define ESP32_TIMG0WDT_PROTECT   (ESP32_TIMG0_BASE + ESP32_TIMGWDT_PROTECT_OFF)
 
#define ESP32_TIMG1_BASE   0x3ff60000
 
#define ESP32_TIMG1WDT_CFG0   (ESP32_TIMG1_BASE + ESP32_TIMGWDT_CFG0_OFF)
 
#define ESP32_TIMG1WDT_PROTECT   (ESP32_TIMG1_BASE + ESP32_TIMGWDT_PROTECT_OFF)
 
#define ESP32_TIMGWDT_CFG0_OFF   0x48
 
#define ESP32_TIMGWDT_PROTECT_OFF   0x64
 
#define ESP32_TRACEMEM_BLOCK_SZ   0x4000
 
#define ESP32_WDT_WKEY_VALUE   0x50d83aa1
 

Enumerations

enum  esp32_flash_bootstrap { FBS_DONTCARE = 0 , FBS_TMSLOW , FBS_TMSHIGH }
 

Functions

 COMMAND_HANDLER (esp32_cmd_flashbootstrap)
 
static COMMAND_HELPER (esp32_cmd_flashbootstrap_do, struct esp32_common *esp32)
 
static int esp32_arch_state (struct target *target)
 
static int esp32_disable_wdts (struct target *target)
 
static int esp32_on_halt (struct target *target)
 
static void esp32_queue_tdi_idle (struct target *target)
 
static int esp32_soc_reset (struct target *target)
 
static int esp32_target_create (struct target *target, Jim_Interp *interp)
 
static int esp32_target_init (struct command_context *cmd_ctx, struct target *target)
 
static int esp32_virt2phys (struct target *target, target_addr_t virtual, target_addr_t *physical)
 
static struct esp32_common * target_to_esp32 (struct target *target)
 

Variables

static const struct command_registration esp32_any_command_handlers []
 
static const struct esp_xtensa_smp_chip_ops esp32_chip_ops
 
static const struct command_registration esp32_command_handlers []
 
static const struct xtensa_debug_ops esp32_dbg_ops
 
static const struct xtensa_power_ops esp32_pwr_ops
 
static const uint8_t esp32_reset_stub_code []
 
static const struct esp_semihost_ops esp32_semihost_ops
 
struct target_type esp32_target
 Holds methods for Xtensa targets. More...
 

Macro Definition Documentation

◆ ESP32_DPORT_APPCPU_CLKGATE_EN

#define ESP32_DPORT_APPCPU_CLKGATE_EN   BIT(0)

Definition at line 68 of file esp32.c.

◆ ESP32_DPORT_APPCPU_CTRL_B_REG

#define ESP32_DPORT_APPCPU_CTRL_B_REG   (ESP32_DR_REG_DPORT_BASE + 0x030)

Definition at line 67 of file esp32.c.

◆ ESP32_DR_REG_DPORT_BASE

#define ESP32_DR_REG_DPORT_BASE   ESP32_DR_REG_LOW

Definition at line 66 of file esp32.c.

◆ ESP32_DR_REG_HIGH

#define ESP32_DR_REG_HIGH   0x3ff71000

Definition at line 42 of file esp32.c.

◆ ESP32_DR_REG_LOW

#define ESP32_DR_REG_LOW   0x3ff00000

Definition at line 41 of file esp32.c.

◆ ESP32_DRAM_HIGH

#define ESP32_DRAM_HIGH   0x40000000

Definition at line 28 of file esp32.c.

◆ ESP32_DRAM_LOW

#define ESP32_DRAM_LOW   0x3ffae000

Definition at line 27 of file esp32.c.

◆ ESP32_EXTRAM_DATA_HIGH

#define ESP32_EXTRAM_DATA_HIGH   0x3fc00000

Definition at line 40 of file esp32.c.

◆ ESP32_EXTRAM_DATA_LOW

#define ESP32_EXTRAM_DATA_LOW   0x3f800000

Definition at line 39 of file esp32.c.

◆ ESP32_IRAM_HIGH

#define ESP32_IRAM_HIGH   0x400a0000

Definition at line 32 of file esp32.c.

◆ ESP32_IRAM_LOW

#define ESP32_IRAM_LOW   0x40070000

Definition at line 31 of file esp32.c.

◆ ESP32_IROM_MASK_HIGH

#define ESP32_IROM_MASK_HIGH   0x40064f00

Definition at line 30 of file esp32.c.

◆ ESP32_IROM_MASK_LOW

#define ESP32_IROM_MASK_LOW   0x40000000

Definition at line 29 of file esp32.c.

◆ ESP32_RTC_CNTL_SW_CPU_STALL_DEF

#define ESP32_RTC_CNTL_SW_CPU_STALL_DEF   0x0

Definition at line 71 of file esp32.c.

◆ ESP32_RTC_CNTL_SW_CPU_STALL_REG

#define ESP32_RTC_CNTL_SW_CPU_STALL_REG   (ESP32_RTCCNTL_BASE + 0xac)

Definition at line 70 of file esp32.c.

◆ ESP32_RTC_DATA_HIGH

#define ESP32_RTC_DATA_HIGH   0x50002000

Definition at line 38 of file esp32.c.

◆ ESP32_RTC_DATA_LOW

#define ESP32_RTC_DATA_LOW   0x50000000

Definition at line 37 of file esp32.c.

◆ ESP32_RTC_DRAM_HIGH

#define ESP32_RTC_DRAM_HIGH   0x3ff82000

Definition at line 36 of file esp32.c.

◆ ESP32_RTC_DRAM_LOW

#define ESP32_RTC_DRAM_LOW   0x3ff80000

Definition at line 35 of file esp32.c.

◆ ESP32_RTC_IRAM_HIGH

#define ESP32_RTC_IRAM_HIGH   0x400c2000

Definition at line 34 of file esp32.c.

◆ ESP32_RTC_IRAM_LOW

#define ESP32_RTC_IRAM_LOW   0x400c0000

Definition at line 33 of file esp32.c.

◆ ESP32_RTC_SLOW_MEM_BASE

#define ESP32_RTC_SLOW_MEM_BASE   ESP32_RTC_DATA_LOW

Definition at line 45 of file esp32.c.

◆ ESP32_RTCCNTL_BASE

#define ESP32_RTCCNTL_BASE   0x3ff48000

Definition at line 57 of file esp32.c.

◆ ESP32_RTCWDT_CFG

#define ESP32_RTCWDT_CFG   (ESP32_RTCCNTL_BASE + ESP32_RTCWDT_CFG_OFF)

Definition at line 60 of file esp32.c.

◆ ESP32_RTCWDT_CFG_OFF

#define ESP32_RTCWDT_CFG_OFF   0x8C

Definition at line 58 of file esp32.c.

◆ ESP32_RTCWDT_PROTECT

#define ESP32_RTCWDT_PROTECT   (ESP32_RTCCNTL_BASE + ESP32_RTCWDT_PROTECT_OFF)

Definition at line 61 of file esp32.c.

◆ ESP32_RTCWDT_PROTECT_OFF

#define ESP32_RTCWDT_PROTECT_OFF   0xA4

Definition at line 59 of file esp32.c.

◆ ESP32_SYS_RAM_HIGH

#define ESP32_SYS_RAM_HIGH   (ESP32_SYS_RAM_LOW + 0x20000000UL)

Definition at line 44 of file esp32.c.

◆ ESP32_SYS_RAM_LOW

#define ESP32_SYS_RAM_LOW   0x60000000UL

Definition at line 43 of file esp32.c.

◆ ESP32_TIMG0_BASE

#define ESP32_TIMG0_BASE   0x3ff5f000

Definition at line 49 of file esp32.c.

◆ ESP32_TIMG0WDT_CFG0

#define ESP32_TIMG0WDT_CFG0   (ESP32_TIMG0_BASE + ESP32_TIMGWDT_CFG0_OFF)

Definition at line 53 of file esp32.c.

◆ ESP32_TIMG0WDT_PROTECT

#define ESP32_TIMG0WDT_PROTECT   (ESP32_TIMG0_BASE + ESP32_TIMGWDT_PROTECT_OFF)

Definition at line 55 of file esp32.c.

◆ ESP32_TIMG1_BASE

#define ESP32_TIMG1_BASE   0x3ff60000

Definition at line 50 of file esp32.c.

◆ ESP32_TIMG1WDT_CFG0

#define ESP32_TIMG1WDT_CFG0   (ESP32_TIMG1_BASE + ESP32_TIMGWDT_CFG0_OFF)

Definition at line 54 of file esp32.c.

◆ ESP32_TIMG1WDT_PROTECT

#define ESP32_TIMG1WDT_PROTECT   (ESP32_TIMG1_BASE + ESP32_TIMGWDT_PROTECT_OFF)

Definition at line 56 of file esp32.c.

◆ ESP32_TIMGWDT_CFG0_OFF

#define ESP32_TIMGWDT_CFG0_OFF   0x48

Definition at line 51 of file esp32.c.

◆ ESP32_TIMGWDT_PROTECT_OFF

#define ESP32_TIMGWDT_PROTECT_OFF   0x64

Definition at line 52 of file esp32.c.

◆ ESP32_TRACEMEM_BLOCK_SZ

#define ESP32_TRACEMEM_BLOCK_SZ   0x4000

Definition at line 63 of file esp32.c.

◆ ESP32_WDT_WKEY_VALUE

#define ESP32_WDT_WKEY_VALUE   0x50d83aa1

Definition at line 48 of file esp32.c.

Enumeration Type Documentation

◆ esp32_flash_bootstrap

enum esp32_flash_bootstrap
Enumerator
FBS_DONTCARE 
FBS_TMSLOW 
FBS_TMSHIGH 

Definition at line 74 of file esp32.c.

Function Documentation

◆ COMMAND_HANDLER()

COMMAND_HANDLER ( esp32_cmd_flashbootstrap  )

Definition at line 407 of file esp32.c.

◆ COMMAND_HELPER()

static COMMAND_HELPER ( esp32_cmd_flashbootstrap_do  ,
struct esp32_common *  esp32 
)
static

Definition at line 368 of file esp32.c.

References CMD, CMD_ARGC, CMD_ARGV, command_print(), ERROR_FAIL, ERROR_OK, FBS_DONTCARE, FBS_TMSHIGH, FBS_TMSLOW, esp32_common::flash_bootstrap, and state.

◆ esp32_arch_state()

static int esp32_arch_state ( struct target *  target)
static

Definition at line 272 of file esp32.c.

References ERROR_OK.

◆ esp32_disable_wdts()

static int esp32_disable_wdts ( struct target *  target)
static

Definition at line 229 of file esp32.c.

References ERROR_OK, ESP32_RTCWDT_CFG, ESP32_RTCWDT_PROTECT, ESP32_TIMG0WDT_CFG0, ESP32_TIMG0WDT_PROTECT, ESP32_TIMG1WDT_CFG0, ESP32_TIMG1WDT_PROTECT, ESP32_WDT_WKEY_VALUE, LOG_ERROR, and target_write_u32().

Referenced by esp32_on_halt().

◆ esp32_on_halt()

static int esp32_on_halt ( struct target *  target)
static

Definition at line 267 of file esp32.c.

References esp32_disable_wdts().

◆ esp32_queue_tdi_idle()

static void esp32_queue_tdi_idle ( struct target *  target)
static

Definition at line 292 of file esp32.c.

References buf_set_u32(), FBS_TMSHIGH, FBS_TMSLOW, esp32_common::flash_bootstrap, jtag_add_plain_ir_scan(), NULL, TAP_IRPAUSE, and target_to_esp32().

Referenced by esp32_target_create().

◆ esp32_soc_reset()

static int esp32_soc_reset ( struct target *  target)
static

Definition at line 108 of file esp32.c.

References alive_sleep(), xtensa::dbg_mod, ERROR_OK, ERROR_TARGET_TIMEOUT, esp32_reset_stub_code, ESP32_RTC_CNTL_SW_CPU_STALL_DEF, ESP32_RTC_CNTL_SW_CPU_STALL_REG, ESP32_RTC_SLOW_MEM_BASE, foreach_smp_target, LOG_DEBUG, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, target::reset_halt, target::smp, target::smp_targets, target::state, xtensa::suppress_dsr_errors, target_list::target, TARGET_HALTED, target_read_buffer(), TARGET_RESET, TARGET_RUNNING, target_to_xtensa(), target_wait_state(), target_write_buffer(), target_write_u32(), timeval_ms(), xtensa_assert_reset(), xtensa_deassert_reset(), xtensa_dm_core_is_stalled(), xtensa_halt(), xtensa_poll(), and xtensa_resume().

◆ esp32_target_create()

static int esp32_target_create ( struct target *  target,
Jim_Interp *  interp 
)
static

Definition at line 337 of file esp32.c.

References xtensa_debug_module_config::dbg_ops, DBG_REASON_NOTHALTED, target::debug_reason, ERROR_FAIL, ERROR_OK, esp32_chip_ops, esp32_dbg_ops, esp32_pwr_ops, esp32_queue_tdi_idle(), esp32_semihost_ops, esp32_common::esp_xtensa_smp, esp_xtensa_smp_init_arch_info(), FBS_DONTCARE, esp32_common::flash_bootstrap, LOG_ERROR, target::state, target::tap, and TARGET_RUNNING.

◆ esp32_target_init()

static int esp32_target_init ( struct command_context *  cmd_ctx,
struct target *  target 
)
static

Definition at line 312 of file esp32.c.

◆ esp32_virt2phys()

static int esp32_virt2phys ( struct target *  target,
target_addr_t  virtual,
target_addr_t *  physical 
)
static

Definition at line 277 of file esp32.c.

References ERROR_FAIL, and ERROR_OK.

◆ target_to_esp32()

static struct esp32_common* target_to_esp32 ( struct target *  target)
inlinestatic

Definition at line 85 of file esp32.c.

References target::arch_info, container_of, and esp32_common::esp_xtensa_smp.

Referenced by esp32_queue_tdi_idle().

Variable Documentation

◆ esp32_any_command_handlers

const struct command_registration esp32_any_command_handlers[]
static
Initial value:
= {
{
.name = "flashbootstrap",
.handler = esp32_cmd_flashbootstrap,
.mode = COMMAND_ANY,
.help =
"Set the idle state of the TMS pin, which at reset also is the voltage selector for the flash chip.",
.usage = "none|1.8|3.3|high|low",
},
COMMAND_REGISTRATION_DONE
}
COMMAND_REGISTRATION_DONE
#define COMMAND_REGISTRATION_DONE
Use this as the last entry in an array of command_registration records.
Definition: command.h:247
COMMAND_ANY
@ COMMAND_ANY
Definition: command.h:42

Definition at line 407 of file esp32.c.

◆ esp32_chip_ops

const struct esp_xtensa_smp_chip_ops esp32_chip_ops
static
Initial value:
= {
.reset = esp32_soc_reset,
.on_halt = esp32_on_halt
}
esp32_on_halt
static int esp32_on_halt(struct target *target)
Definition: esp32.c:267
esp32_soc_reset
static int esp32_soc_reset(struct target *target)
Definition: esp32.c:108

Definition at line 312 of file esp32.c.

Referenced by esp32_target_create().

◆ esp32_command_handlers

const struct command_registration esp32_command_handlers[]
static
Initial value:
= {
{
.chain = esp_xtensa_smp_command_handlers,
},
{
.name = "esp32",
.usage = "",
.chain = smp_command_handlers,
},
{
.name = "esp32",
.usage = "",
.chain = esp32_any_command_handlers,
},
{
.name = "arm",
.mode = COMMAND_ANY,
.help = "ARM Command Group",
.usage = "",
.chain = semihosting_common_handlers
},
COMMAND_REGISTRATION_DONE
}
esp32_any_command_handlers
static const struct command_registration esp32_any_command_handlers[]
Definition: esp32.c:427
esp_xtensa_smp_command_handlers
const struct command_registration esp_xtensa_smp_command_handlers[]
Definition: esp_xtensa_smp.c:924
semihosting_common_handlers
const struct command_registration semihosting_common_handlers[]
Definition: semihosting_common.c:2041
smp_command_handlers
const struct command_registration smp_command_handlers[]
Definition: smp.c:150
command_registration::name
const char * name
Definition: command.h:229

Definition at line 407 of file esp32.c.

◆ esp32_dbg_ops

const struct xtensa_debug_ops esp32_dbg_ops
static
Initial value:
= {
.queue_enable = xtensa_dm_queue_enable,
.queue_reg_read = xtensa_dm_queue_reg_read,
.queue_reg_write = xtensa_dm_queue_reg_write
}
xtensa_dm_queue_reg_read
int xtensa_dm_queue_reg_read(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint8_t *value)
Definition: xtensa_debug_module.c:152
xtensa_dm_queue_reg_write
int xtensa_dm_queue_reg_write(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint32_t value)
Definition: xtensa_debug_module.c:171
xtensa_dm_queue_enable
int xtensa_dm_queue_enable(struct xtensa_debug_module *dm)
Definition: xtensa_debug_module.c:147

Definition at line 312 of file esp32.c.

Referenced by esp32_target_create().

◆ esp32_pwr_ops

const struct xtensa_power_ops esp32_pwr_ops
static
Initial value:
= {
.queue_reg_read = xtensa_dm_queue_pwr_reg_read,
.queue_reg_write = xtensa_dm_queue_pwr_reg_write
}
xtensa_dm_queue_pwr_reg_write
int xtensa_dm_queue_pwr_reg_write(struct xtensa_debug_module *dm, enum xtensa_dm_pwr_reg reg, uint32_t data)
Definition: xtensa_debug_module.c:214
xtensa_dm_queue_pwr_reg_read
int xtensa_dm_queue_pwr_reg_read(struct xtensa_debug_module *dm, enum xtensa_dm_pwr_reg reg, uint8_t *data, uint32_t clear)
Definition: xtensa_debug_module.c:187

Definition at line 312 of file esp32.c.

Referenced by esp32_target_create().

◆ esp32_reset_stub_code

const uint8_t esp32_reset_stub_code[]
static
Initial value:
= {
}

Definition at line 104 of file esp32.c.

Referenced by esp32_soc_reset().

◆ esp32_semihost_ops

const struct esp_semihost_ops esp32_semihost_ops
static
Initial value:
= {
.prepare = esp32_disable_wdts
}
esp32_disable_wdts
static int esp32_disable_wdts(struct target *target)
Definition: esp32.c:229

Definition at line 312 of file esp32.c.

Referenced by esp32_target_create().

◆ esp32_target

struct target_type esp32_target

Holds methods for Xtensa targets.

Definition at line 407 of file esp32.c.