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max32xxx_qspi.c File Reference
Include dependency graph for max32xxx_qspi.c:

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Data Structures

struct  max32xxx_qspi_flash_bank
 

Macros

#define GCR_BASE   0x40000000
 
#define GCR_RST1   (GCR_BASE | 0x44)
 
#define GCR_RST1_SPIXIP   (0x1 << 5)
 
#define GCR_RST1_XSPIM   (0x1 << 4)
 
#define GCR_SCON   (GCR_BASE | 0x00)
 
#define MAX32XXX_QSPI_ERASE_TIMEOUT_MS   10000
 
#define MAX32XXX_QSPI_FIFO_TIMEOUT_MS   100
 
#define MAX32XXX_QSPI_MASS_ERASE_TIMEOUT_MS   100000
 
#define MAX32XXX_QSPI_WE_TIMEOUT_MS   100
 
#define SPI_CLOCK_PERIOD   2
 
#define SPI_DUAL_MODE   0
 
#define SPI_ICC_BASE   0x4002F000
 
#define SPI_ICC_CTRL   (SPI_ICC_BASE | 0x100)
 
#define SPI_ICC_CTRL_EN   (0x1UL << SPI_ICC_CTRL_EN_POS)
 
#define SPI_ICC_CTRL_EN_POS   0
 
#define SPI_ICC_CTRL_RDY   (0x1UL << SPI_ICC_CTRL_RDY_POS)
 
#define SPI_ICC_CTRL_RDY_POS   16
 
#define SPI_ICC_INV   (SPI_ICC_BASE | 0x700)
 
#define SPIXF_BASE   0x40026000
 
#define SPIXF_BUS_IDLE   (SPIXF_BASE | 0x24)
 
#define SPIXF_CFG   (SPIXF_BASE | 0x00)
 
#define SPIXF_FETCH_CTRL   (SPIXF_BASE | 0x04)
 
#define SPIXF_IO_CTRL   (SPIXF_BASE | 0x1C)
 
#define SPIXF_MEMSECCN   (SPIXF_BASE | 0x20)
 
#define SPIXF_MEMSECCN_AUTH_DISABLE   0x2
 
#define SPIXF_MEMSECCN_ENC_ENABLE   0x1
 
#define SPIXF_MODE_CTRL   (SPIXF_BASE | 0x08)
 
#define SPIXF_MODE_DATA   (SPIXF_BASE | 0x0C)
 
#define SPIXF_SCLK_FB_CTRL   (SPIXF_BASE | 0x10)
 
#define SPIXFC_FIFO_DEPTH   16
 
#define SPIXFC_HEADER_NULL   0xF000
 

Functions

 COMMAND_HANDLER (max32xxx_qspi_handle_mass_erase_command)
 
 COMMAND_HANDLER (max32xxx_qspi_handle_mem_mapping_setup_command)
 
 FLASH_BANK_COMMAND_HANDLER (max32xxx_qspi_flash_bank_command)
 
static int get_max32xxx_qspi_info (struct flash_bank *bank, struct command_invocation *cmd)
 
static int max32xxx_qspi_auto_probe (struct flash_bank *bank)
 
static int max32xxx_qspi_erase (struct flash_bank *bank, unsigned int first, unsigned int last)
 
static int max32xxx_qspi_poll_we (struct target *target)
 
static int max32xxx_qspi_poll_wip (struct target *target, unsigned int timeout)
 
static int max32xxx_qspi_post_op (struct flash_bank *bank)
 
static int max32xxx_qspi_pre_op (struct flash_bank *bank)
 
static int max32xxx_qspi_probe (struct flash_bank *bank)
 
static int max32xxx_qspi_read_bytes (struct target *target, uint8_t *data, unsigned int len, bool deass)
 
static int max32xxx_qspi_read_rxfifo (struct target *target, uint8_t *data, unsigned int len)
 
static int max32xxx_qspi_read_words (struct target *target, uint32_t *data, unsigned int len, bool deass)
 
static int max32xxx_qspi_set_we (struct target *target)
 
static int max32xxx_qspi_write (struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
 
static int max32xxx_qspi_write_block (struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t len)
 
static int max32xxx_qspi_write_bytes (struct target *target, const uint8_t *data, unsigned int len, bool deass)
 
static int max32xxx_qspi_write_txfifo (struct target *target, const uint8_t *data, unsigned int len)
 
static int read_sfdp_block (struct flash_bank *bank, uint32_t addr, uint32_t words, uint32_t *buffer)
 

Variables

static const struct command_registration max32xxx_qspi_command_handlers []
 
static const struct command_registration max32xxx_qspi_exec_command_handlers []
 
const struct flash_driver max32xxx_qspi_flash
 
static const uint8_t write_code []
 

Macro Definition Documentation

◆ GCR_BASE

#define GCR_BASE   0x40000000

Definition at line 56 of file max32xxx_qspi.c.

◆ GCR_RST1

#define GCR_RST1   (GCR_BASE | 0x44)

Definition at line 58 of file max32xxx_qspi.c.

◆ GCR_RST1_SPIXIP

#define GCR_RST1_SPIXIP   (0x1 << 5)

Definition at line 60 of file max32xxx_qspi.c.

◆ GCR_RST1_XSPIM

#define GCR_RST1_XSPIM   (0x1 << 4)

Definition at line 59 of file max32xxx_qspi.c.

◆ GCR_SCON

#define GCR_SCON   (GCR_BASE | 0x00)

Definition at line 57 of file max32xxx_qspi.c.

◆ MAX32XXX_QSPI_ERASE_TIMEOUT_MS

#define MAX32XXX_QSPI_ERASE_TIMEOUT_MS   10000

Definition at line 67 of file max32xxx_qspi.c.

◆ MAX32XXX_QSPI_FIFO_TIMEOUT_MS

#define MAX32XXX_QSPI_FIFO_TIMEOUT_MS   100

Definition at line 69 of file max32xxx_qspi.c.

◆ MAX32XXX_QSPI_MASS_ERASE_TIMEOUT_MS

#define MAX32XXX_QSPI_MASS_ERASE_TIMEOUT_MS   100000

Definition at line 66 of file max32xxx_qspi.c.

◆ MAX32XXX_QSPI_WE_TIMEOUT_MS

#define MAX32XXX_QSPI_WE_TIMEOUT_MS   100

Definition at line 68 of file max32xxx_qspi.c.

◆ SPI_CLOCK_PERIOD

#define SPI_CLOCK_PERIOD   2

Definition at line 63 of file max32xxx_qspi.c.

◆ SPI_DUAL_MODE

#define SPI_DUAL_MODE   0

Definition at line 73 of file max32xxx_qspi.c.

◆ SPI_ICC_BASE

#define SPI_ICC_BASE   0x4002F000

Definition at line 47 of file max32xxx_qspi.c.

◆ SPI_ICC_CTRL

#define SPI_ICC_CTRL   (SPI_ICC_BASE | 0x100)

Definition at line 48 of file max32xxx_qspi.c.

◆ SPI_ICC_CTRL_EN

#define SPI_ICC_CTRL_EN   (0x1UL << SPI_ICC_CTRL_EN_POS)

Definition at line 52 of file max32xxx_qspi.c.

◆ SPI_ICC_CTRL_EN_POS

#define SPI_ICC_CTRL_EN_POS   0

Definition at line 51 of file max32xxx_qspi.c.

◆ SPI_ICC_CTRL_RDY

#define SPI_ICC_CTRL_RDY   (0x1UL << SPI_ICC_CTRL_RDY_POS)

Definition at line 54 of file max32xxx_qspi.c.

◆ SPI_ICC_CTRL_RDY_POS

#define SPI_ICC_CTRL_RDY_POS   16

Definition at line 53 of file max32xxx_qspi.c.

◆ SPI_ICC_INV

#define SPI_ICC_INV   (SPI_ICC_BASE | 0x700)

Definition at line 49 of file max32xxx_qspi.c.

◆ SPIXF_BASE

#define SPIXF_BASE   0x40026000

Definition at line 34 of file max32xxx_qspi.c.

◆ SPIXF_BUS_IDLE

#define SPIXF_BUS_IDLE   (SPIXF_BASE | 0x24)

Definition at line 42 of file max32xxx_qspi.c.

◆ SPIXF_CFG

#define SPIXF_CFG   (SPIXF_BASE | 0x00)

Definition at line 35 of file max32xxx_qspi.c.

◆ SPIXF_FETCH_CTRL

#define SPIXF_FETCH_CTRL   (SPIXF_BASE | 0x04)

Definition at line 36 of file max32xxx_qspi.c.

◆ SPIXF_IO_CTRL

#define SPIXF_IO_CTRL   (SPIXF_BASE | 0x1C)

Definition at line 40 of file max32xxx_qspi.c.

◆ SPIXF_MEMSECCN

#define SPIXF_MEMSECCN   (SPIXF_BASE | 0x20)

Definition at line 41 of file max32xxx_qspi.c.

◆ SPIXF_MEMSECCN_AUTH_DISABLE

#define SPIXF_MEMSECCN_AUTH_DISABLE   0x2

Definition at line 45 of file max32xxx_qspi.c.

◆ SPIXF_MEMSECCN_ENC_ENABLE

#define SPIXF_MEMSECCN_ENC_ENABLE   0x1

Definition at line 44 of file max32xxx_qspi.c.

◆ SPIXF_MODE_CTRL

#define SPIXF_MODE_CTRL   (SPIXF_BASE | 0x08)

Definition at line 37 of file max32xxx_qspi.c.

◆ SPIXF_MODE_DATA

#define SPIXF_MODE_DATA   (SPIXF_BASE | 0x0C)

Definition at line 38 of file max32xxx_qspi.c.

◆ SPIXF_SCLK_FB_CTRL

#define SPIXF_SCLK_FB_CTRL   (SPIXF_BASE | 0x10)

Definition at line 39 of file max32xxx_qspi.c.

◆ SPIXFC_FIFO_DEPTH

#define SPIXFC_FIFO_DEPTH   16

Definition at line 30 of file max32xxx_qspi.c.

◆ SPIXFC_HEADER_NULL

#define SPIXFC_HEADER_NULL   0xF000

Definition at line 32 of file max32xxx_qspi.c.

Function Documentation

◆ COMMAND_HANDLER() [1/2]

◆ COMMAND_HANDLER() [2/2]

COMMAND_HANDLER ( max32xxx_qspi_handle_mem_mapping_setup_command  )

Definition at line 1026 of file max32xxx_qspi.c.

References bank, CALL_COMMAND_HANDLER, ERROR_OK, and max32xxx_qspi_post_op().

◆ FLASH_BANK_COMMAND_HANDLER()

FLASH_BANK_COMMAND_HANDLER ( max32xxx_qspi_flash_bank_command  )

◆ get_max32xxx_qspi_info()

◆ max32xxx_qspi_auto_probe()

static int max32xxx_qspi_auto_probe ( struct flash_bank bank)
static

◆ max32xxx_qspi_erase()

◆ max32xxx_qspi_poll_we()

◆ max32xxx_qspi_poll_wip()

static int max32xxx_qspi_poll_wip ( struct target target,
unsigned int  timeout 
)
static

◆ max32xxx_qspi_post_op()

◆ max32xxx_qspi_pre_op()

static int max32xxx_qspi_pre_op ( struct flash_bank bank)
static

◆ max32xxx_qspi_probe()

◆ max32xxx_qspi_read_bytes()

static int max32xxx_qspi_read_bytes ( struct target target,
uint8_t *  data,
unsigned int  len,
bool  deass 
)
static

◆ max32xxx_qspi_read_rxfifo()

static int max32xxx_qspi_read_rxfifo ( struct target target,
uint8_t *  data,
unsigned int  len 
)
static

◆ max32xxx_qspi_read_words()

static int max32xxx_qspi_read_words ( struct target target,
uint32_t *  data,
unsigned int  len,
bool  deass 
)
static

◆ max32xxx_qspi_set_we()

static int max32xxx_qspi_set_we ( struct target target)
static

◆ max32xxx_qspi_write()

◆ max32xxx_qspi_write_block()

◆ max32xxx_qspi_write_bytes()

static int max32xxx_qspi_write_bytes ( struct target target,
const uint8_t *  data,
unsigned int  len,
bool  deass 
)
static

◆ max32xxx_qspi_write_txfifo()

◆ read_sfdp_block()

static int read_sfdp_block ( struct flash_bank bank,
uint32_t  addr,
uint32_t  words,
uint32_t *  buffer 
)
static

Variable Documentation

◆ max32xxx_qspi_command_handlers

const struct command_registration max32xxx_qspi_command_handlers[]
static
Initial value:
= {
{
.name = "max32xxx_qspi",
.mode = COMMAND_ANY,
.help = "max32xxx_qspi flash command group",
.usage = "",
},
}
#define COMMAND_REGISTRATION_DONE
Use this as the last entry in an array of command_registration records.
Definition: command.h:256
@ COMMAND_ANY
Definition: command.h:42
static const struct command_registration max32xxx_qspi_exec_command_handlers[]

Definition at line 1098 of file max32xxx_qspi.c.

◆ max32xxx_qspi_exec_command_handlers

const struct command_registration max32xxx_qspi_exec_command_handlers[]
static
Initial value:
= {
{
.name = "mem_mapping_setup",
.handler = max32xxx_qspi_handle_mem_mapping_setup_command,
.mode = COMMAND_EXEC,
.usage = "",
.help = "Setup memory-mapped QSPI access.",
},
{
.name = "mass_erase",
.handler = max32xxx_qspi_handle_mass_erase_command,
.mode = COMMAND_EXEC,
.usage = "bank_id",
.help = "Mass erase entire flash device.",
},
}
@ COMMAND_EXEC
Definition: command.h:40

Definition at line 1098 of file max32xxx_qspi.c.

◆ max32xxx_qspi_flash

const struct flash_driver max32xxx_qspi_flash
Initial value:
= {
.name = "max32xxx_qspi",
.flash_bank_command = max32xxx_qspi_flash_bank_command,
.protect = NULL,
.auto_probe = max32xxx_qspi_auto_probe,
.erase_check = default_flash_blank_check,
.protect_check = NULL,
.free_driver_priv = default_flash_free_driver_priv,
}
int default_flash_verify(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
Provides default verify implementation for flash memory.
int default_flash_blank_check(struct flash_bank *bank)
Provides default erased-bank check handling.
int default_flash_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
Provides default read implementation for flash memory.
void default_flash_free_driver_priv(struct flash_bank *bank)
Deallocates bank->driver_priv.
static int max32xxx_qspi_probe(struct flash_bank *bank)
static int max32xxx_qspi_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
static const struct command_registration max32xxx_qspi_command_handlers[]
static int max32xxx_qspi_auto_probe(struct flash_bank *bank)
static int get_max32xxx_qspi_info(struct flash_bank *bank, struct command_invocation *cmd)
static int max32xxx_qspi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
#define NULL
Definition: usb.h:16

Definition at line 1098 of file max32xxx_qspi.c.

◆ write_code

const uint8_t write_code[]
static
Initial value:
= {
}

Definition at line 76 of file max32xxx_qspi.c.

Referenced by max32xxx_qspi_write_block(), max32xxx_write_block(), and xmc1xxx_write().