OpenOCD
ch347.c
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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 /***************************************************************************
4  * Driver for CH347-JTAG interface V1.1 *
5  * *
6  * Copyright (C) 2022 by oidcat. *
7  * Author: oidcatiot@163.com *
8  * *
9  * Enhancements by EasyDevKits - info@easydevkits.com *
10  * *
11  * CH347 is a high-speed USB bus converter chip that provides UART, I2C *
12  * and SPI synchronous serial ports and JTAG interface through USB bus. *
13  * *
14  * The JTAG interface by CH347 can supports transmission frequency *
15  * configuration up to 60MHz. *
16  * *
17  * The USB2.0 to JTAG scheme based on CH347 can be used to build *
18  * customized USB high-speed JTAG debugger and other products. *
19  * *
20  * _____________ *
21  * | |____JTAG/SWD (TDO,TDI,TMS,TCK,TRST) *
22  * USB__| CH347T/F | *
23  * |_____________|____UART(TXD1,RXD1,RTS1,CTS1,DTR1) *
24  * ______|______ *
25  * | | *
26  * | 8 MHz XTAL | *
27  * |_____________| *
28  * *
29  * This CH347 driver is only tested for the CH347T chip in mode 3. *
30  * The CH347 datasheet mention another chip the CH347F which was not *
31  * available for testing. *
32  * *
33  * The datasheet for the wch-ic.com's CH347 part is here: *
34  * https://www.wch-ic.com/downloads/CH347DS1_PDF.html *
35  * *
36  ***************************************************************************/
37 
38 #ifdef HAVE_CONFIG_H
39 #include "config.h"
40 #endif
41 
42 #if IS_CYGWIN == 1
43 #include "windows.h"
44 #undef LOG_ERROR
45 #endif
46 
47 // project specific includes
48 #include <jtag/interface.h>
49 #include <jtag/commands.h>
50 #include <jtag/swd.h>
51 #include <helper/time_support.h>
52 #include <helper/replacements.h>
53 #include <helper/list.h>
54 #include <helper/binarybuffer.h>
55 #include "libusb_helper.h"
56 
57 // system includes
58 #include <stdlib.h>
59 #include <string.h>
60 #include <sys/time.h>
61 #include <time.h>
62 #include <unistd.h>
63 
64 #define TDI_H BIT(4)
65 #define TDI_L 0
66 #define TMS_H BIT(1)
67 #define TMS_L 0
68 #define TCK_H BIT(0)
69 #define TCK_L 0
70 #define TRST_H BIT(5)
71 #define TRST_L 0
72 #define LED_ON 1
73 #define LED_OFF 0
74 #define GPIO_CNT 8 // the CH347 has 8 GPIO's
75 /* mask which GPIO's are available in mode 3 of CH347T only GPIO3 (Pin11 / SCL), GPIO4 (Pin15 / ACT),
76  GPIO5 (Pin9 / TRST) and GPIO6 (Pin2 / CTS1) are possible. Tested only with CH347T not CH347F chip.
77  pin numbers are for CH347T */
78 #define USEABLE_GPIOS 0x78
79 /* For GPIO command: always set bits 7 and 6 for GPIO enable
80  bits 5 and 4 for pin direction output bit 3 is the data bit */
81 #define GPIO_SET_L (BIT(4) | BIT(5) | BIT(6) | BIT(7)) // value for setting a GPIO to low
82 #define GPIO_SET_H (BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7)) // value for setting a GPIO to high
83 
84 #define VENDOR_VERSION 0x5F // for getting the chip version
85 
86 // maybe the hardware of the CH347 chip can capture only this amount of TDO bits
87 #define HW_TDO_BUF_SIZE 4096
88 // Don't send more than this amount of bytes via libusb in one packet. Also that is the limit for LARGER_PACK mode.
89 #define LARGER_PACK_MAX_SIZE 51200
90 // The data length contained in each command packet during USB high-speed operation
91 #define UCMDPKT_DATA_MAX_BYTES_USBHS 507
92 #define USBC_PACKET_USBHS 512 // Maximum data length per packet at USB high speed
93 #define CH347_CMD_HEADER 3 // Protocol header length (1 byte command type + 2 bytes data length)
94 #define CH347_CMD_INIT_READ_LEN 1 // for JTAG_INIT/SWD_INIT we have only one data byte
95 // if we send 9 in the init command we get the STANDARD mode or LARGER_PACK mode flag
96 #define CH347_CMD_INIT_GET_MODE_CLOCK_INDEX_VALUE 9
97 // No more bits are allowed per CH347_CMD_JTAG_BIT_OP command; this should be dividable by 8
98 #define MAX_BITS_PER_BIT_OP 248
99 
100 /* Protocol transmission format: CMD (1 byte) + Length (2 bytes) + Data
101  Parameter acquisition, used to obtain firmware version, JTAG interface related parameters, etc */
102 #define CH347_CMD_INFO_RD 0xCA
103 #define CH347_CMD_GPIO 0xCC // GPIO Command
104 #define CH347_CMD_JTAG_INIT 0xD0 // JTAG Interface initialization command
105 #define CH347_CMD_JTAG_BIT_OP 0xD1 // JTAG interface pin bit control command
106 #define CH347_CMD_JTAG_BIT_OP_RD 0xD2 // JTAG interface pin bit control and read commands
107 #define CH347_CMD_JTAG_DATA_SHIFT 0xD3 // JTAG interface data shift command
108 #define CH347_CMD_JTAG_DATA_SHIFT_RD 0xD4 // JTAG interface data shift and read command
109 // for a single command these amount of data can be read at max
110 #define CH347_SINGLE_CMD_MAX_READ MAX(GPIO_CNT, CH347_CMD_INIT_READ_LEN)
111 
112 // for SWD
113 #define CH347_CMD_SWD_INIT 0xE5 // SWD Interface Initialization Command
114 #define CH347_CMD_SWD 0xE8 // SWD Command group header
115 #define CH347_CMD_SWD_REG_W 0xA0 // SWD Interface write reg
116 #define CH347_CMD_SWD_SEQ_W 0xA1 // SWD Interface write spec seq
117 #define CH347_CMD_SWD_REG_R 0xA2 // SWD Interface read reg
118 #define CH347_MAX_PROCESSING_US 7000 // max time in us for packet processing
119  // USB hosts disconnect the adapter if SWD processing takes more!
120 #define CH347_MAX_SEND_BUF USBC_PACKET_USBHS
121 #define CH347_MAX_RECV_BUF USBC_PACKET_USBHS
122 #define CH347_MAX_CMD_BUF 128
123 #define CH347_SWD_CLOCK_MAX 5000
124 #define CH347_SWD_CLOCK_BASE 1000
125 // limited by the longest sequence processing time
126 #define CH347_SWD_CLOCK_MAX_DIVISOR (CH347_MAX_PROCESSING_US / swd_seq_dormant_to_swd_len)
127 
128 #define CH347_EPOUT 0x06u // the usb endpoint number for writing
129 #define CH347_EPIN 0x86u // the usb endpoint number for reading
130 #define CH347T_MPHSI_INTERFACE 2 // the CH347T JTAG interface is number 2
131 #define CH347F_MPHSI_INTERFACE 4 // the CH347F JTAG interface is number 4
132 #define USB_WRITE_TIMEOUT 500 // write timeout in milliseconds
133 #define USB_READ_TIMEOUT 500 // read timeout in milliseconds
134 // BCD version for devices that can use bytewise mode below this version only bitwise mode can be used
135 #define BYTEWISE_MODE_VERSION 0x241
136 /* if the configuration is not setting the vendor id / product id we search for vendor id 1a86
137  and product id's 0x55dd (CH347T chip in mode 3), 0x55de (CH347F chip) and 0x55e7 (other chip) */
138 #define DEFAULT_VENDOR_ID 0x1a86
139 #define DEFAULT_CH347T_PRODUCT_ID 0x55dd
140 #define DEFAULT_CH347F_PRODUCT_ID 0x55de
141 #define DEFAULT_OTHER_PRODUCT_ID 0x55e7
142 
143 /* There are 3 different CH347 variants. The datasheet mentions the CH347T chip which has the product id 0x55dd
144  as default when it's configured to mode 3. The CH347F chip is also mentioned in the datasheet and has the
145  default product id 0x55de. The 3rd variant is not mentioned in a datasheet but was found here
146  https://github.com/WCHSoftGroup/ch347
147  The code from WCHSoftGroup is also searching for this product id */
149  CH347T = 0, // The CH347T chip
150  CH347F = 1, // The CH347F chip
151  OTHER_PRODUCT_ID = 2, // other product id not mentioned in the datasheet
152 };
153 
154 /* STANDARD_PACK means that we can send only one USBC_PACKET_USBHS-sized USB packet
155  and then read data back. LARGER_PACK means, we can send packets as large as
156  LARGER_PACK_MAX_SIZE. libusb splits there large packets into smaller USB packets and
157  transmit the data. Then we read back the data in a bigger packet. */
158 enum pack_size {
159  UNSET = -1,
162 };
163 
164 // for STANDARD_PACK mode: these are the 6 possible speeds; values in kHz
165 static const int ch347_standard_pack_clock_speeds[] = {
166  1875, // 1.875 MHz (60000 : 32)
167  3750, // 3.75 MHz (60000 : 16)
168  7500, // 7.5 MHz (60000 : 8)
169  15000, // 15 MHz (60000 : 4)
170  30000, // 30 MHz (60000 : 2)
171  60000 // 60 MHz
172 };
173 
174 // for LARGER_PACK mode: these are the 8 possible speeds; values in kHz
175 static const int ch347_larger_pack_clock_speeds[] = {
176  469, // 468.75 kHz (60000 : 128)
177  938, // 937.5 kHz (60000 : 64)
178  1875, // 1.875 MHz (60000 : 32)
179  3750, // 3.75 MHz (60000 : 16)
180  7500, // 7.5 MHz (60000 : 8)
181  15000, // 15 MHz (60000 : 4)
182  30000, // 30 MHz (60000 : 2)
183  60000 // 60 MHz
184 };
185 
186 struct ch347_cmd {
187  uint8_t type; // the command type
188  uint8_t *write_data; // data bytes for write
189  uint16_t write_data_len; // count of data bytes in the write_data buffer
190  uint16_t read_len; // if >0 a read is needed after this command
191  uint16_t tdo_bit_count; // how many TDO bits are needed to shift in by this read
192  struct list_head queue; // for handling a queue (list)
193 };
194 
195 struct ch347_scan {
196  struct scan_field *fields; // array of scan_field's for data from the device
197  int fields_len; // scan_fields array length
198  struct list_head queue; // for handling a queue (list)
199 };
200 
201 struct ch347_info {
202  // Record the CH347 pin status
203  int tms_pin;
204  int tdi_pin;
205  int tck_pin;
206  int trst_pin;
207 
208  enum ch347_variant chip_variant; // ch347_variant for explanation
209  // if true then we can't us the bytewise commands due to a bug of the chip; depends on BYTEWISE_MODE_VERSION
211  enum pack_size pack_size; // see: pack_size for explanation
212  int max_len; // in STANDARD_PACK or bitwise mode we can send only one USBC_PACKET_USBHS sized package
214 
215  // a "scratchpad" where we record all bytes for one command
216  uint8_t scratchpad_cmd_type; // command type
217  uint8_t scratchpad[UCMDPKT_DATA_MAX_BYTES_USBHS]; // scratchpad buffer
218  int scratchpad_idx; // current index in scratchpad
219 
220  // after a command is complete it will be stored for later processing
221  struct list_head cmd_queue;
222  // all data input scan fields are queued here
223  struct list_head scan_queue;
224  // read buffer for the single commands like CH347_CMD_GPIO and CH347_CMD_JTAG_INIT
226  int singe_read_len; // data length in single_read
227 };
228 
229 struct ch347_swd_io {
230  uint8_t usb_cmd; // 0xA0, 0xA1, 0xA2
231  uint8_t cmd;
232  uint32_t *dst;
233  uint32_t value;
234  struct list_head list_entry;
235 };
236 
240  int send_len;
241  int recv_len;
245  unsigned int clk_divisor;
246  unsigned int total_swd_clk;
247  struct list_head send_cmd_head;
248  struct list_head free_cmd_head;
250 };
251 
253 static bool swd_mode;
257 static uint16_t custom_ch347_vids[] = {0, 0, 0, 0};
258 static uint16_t custom_ch347_pids[] = {0, 0, 0, 0};
259 static char *ch347_device_desc;
260 static uint8_t ch347_activity_led_gpio_pin = 0xFF;
262 static struct ch347_info ch347;
263 static struct libusb_device_handle *ch347_handle;
264 
265 /* there are "single" commands. These commands can't be chained together and
266  need to be send as single command and need a read after write */
267 static inline bool ch347_is_single_cmd_type(uint8_t type)
268 {
270 }
271 
272 static void log_buf_dump(const uint8_t *data, unsigned int size, bool recv)
273 {
274  unsigned int i = 0, j = 0;
275  unsigned int n = size * 3 + 1;
276  char *str = malloc(n);
277  if (!str)
278  return;
279 
280  while (i < size && j < n) {
281  uint8_t cmd = data[i++];
282  hexify(str + j, &cmd, 1, n - j);
283  j += 2;
284  str[j++] = ' ';
285 
286  unsigned int cmd_payload_size = le_to_h_u16(data + i);
287  if (i + 2 <= size && j + 4 < n) {
288  hexify(str + j, data + i, 2, n - j);
289  i += 2;
290  j += 4;
291  str[j++] = ' ';
292  }
293 
294  if (cmd == CH347_CMD_SWD) {
295  // nested SWD commands
296  str[j] = '\0';
297  if (i + cmd_payload_size > size) {
298  LOG_DEBUG_IO("%s - bad size", str);
299  cmd_payload_size = size - i;
300  } else {
301  LOG_DEBUG_IO("%s", str);
302  }
303  j = 0;
304  unsigned int swd_base_i = i;
305 
306  while (i < swd_base_i + cmd_payload_size) {
307  uint8_t swd_cmd = data[i++];
308  hexify(str + j, &swd_cmd, 1, n - j);
309  j += 2;
310  str[j++] = ' ';
311 
312  unsigned int swd_bits = 0;
313  unsigned int swd_payload_size = 0;
314  if (!recv) {
315  if (i + 2 <= size) {
316  swd_bits = le_to_h_u16(data + i);
317  hexify(str + j, data + i, 2, n - j);
318  i += 2;
319  j += 4;
320  str[j++] = ' ';
321  }
322  }
323 
324  switch (swd_cmd) {
325  case CH347_CMD_SWD_REG_W:
326  if (recv)
327  swd_payload_size = 1;
328  else
329  swd_payload_size = DIV_ROUND_UP(swd_bits, 8);
330  break;
331  case CH347_CMD_SWD_SEQ_W:
332  if (!recv)
333  swd_payload_size = DIV_ROUND_UP(swd_bits, 8);
334  break;
335  case CH347_CMD_SWD_REG_R:
336  if (recv)
337  swd_payload_size = 1 + 4 + 1;
338  else
339  swd_payload_size = 1;
340  break;
341  }
342 
343  hexify(str + j, data + i, MIN(swd_payload_size, size - i), n - j);
344  i += swd_payload_size;
345  j += 2 * swd_payload_size;
346  str[j] = '\0';
347  if (i > size)
348  LOG_DEBUG_IO(" %s - bad size", str);
349  else
350  LOG_DEBUG_IO(" %s", str);
351  j = 0;
352  }
353  } else {
354  hexify(str + j, data + i, MIN(cmd_payload_size, size - i), n - j);
355  i += cmd_payload_size;
356  j += 2 * cmd_payload_size;
357  str[j] = '\0';
358  if (i > size)
359  LOG_DEBUG_IO("%s - bad size", str);
360  else
361  LOG_DEBUG_IO("%s", str);
362  j = 0;
363  }
364  }
365  free(str);
366 }
367 
375 static int ch347_write_data(uint8_t *data, int *length)
376 {
377  int write_len = *length;
378  int i = 0;
379  int transferred = 0;
380 
381  while (true) {
382  int retval = jtag_libusb_bulk_write(ch347_handle, CH347_EPOUT, (char *)&data[i],
383  write_len, USB_WRITE_TIMEOUT, &transferred);
384  if (retval != ERROR_OK) {
385  LOG_ERROR("CH347 write fail");
386  *length = 0;
387  return retval;
388  }
389  i += transferred;
390  if (i >= *length)
391  break;
392  write_len = *length - i;
393  }
394 
396  LOG_DEBUG_IO("size=%d, buf=", i);
397  log_buf_dump(data, i, false);
398  }
399 
400  *length = i;
401  return ERROR_OK;
402 }
403 
411 static int ch347_read_data(uint8_t *data, int *length)
412 {
413  int read_len = *length;
414  int i = 0;
415  int transferred = 0;
416 
417  while (true) {
418  int retval = jtag_libusb_bulk_read(ch347_handle, CH347_EPIN, (char *)&data[i],
419  read_len, USB_READ_TIMEOUT, &transferred);
420  if (retval != ERROR_OK) {
421  LOG_ERROR("CH347 read fail");
422  *length = 0;
423  return retval;
424  }
425 
426  i += transferred;
427  if (i >= *length)
428  break;
429  read_len = *length - i;
430  }
431 
433  LOG_DEBUG_IO("size=%d, buf=", i);
434  log_buf_dump(data, i, true);
435  }
436 
437  *length = i;
438  return ERROR_OK;
439 }
440 
447 static void ch347_cmd_calc_reads(struct ch347_cmd *cmd)
448 {
449  cmd->read_len = 0;
450  cmd->tdo_bit_count = 0;
451 
452  switch (cmd->type) {
453  case CH347_CMD_GPIO:
454  // for GPIO we need to read back the same amount of data that we had send
455  cmd->read_len = cmd->write_data_len;
456  break;
457  case CH347_CMD_JTAG_INIT:
458  case CH347_CMD_SWD_INIT:
459  // for JTAG_INIT/SWD_INIT the amount is fixed
460  cmd->read_len = CH347_CMD_INIT_READ_LEN;
461  break;
463  // for bit operations we need to count the TCK high edges
464  for (int i = 0; i < cmd->write_data_len; i++) {
465  if ((cmd->write_data[i] & TCK_H) == TCK_H) {
466  cmd->read_len++;
467  cmd->tdo_bit_count++;
468  }
469  }
470  break;
472  // for byte operations: need to read one byte back for each data byte
473  cmd->read_len = cmd->write_data_len;
474  // we occupy 8 bits per byte in the TDO hardware buffer
475  cmd->tdo_bit_count = cmd->read_len * 8;
476  break;
477  }
478 }
479 
488 {
489  // nothing to do if no bytes are recorded
490  if (!ch347.scratchpad_idx)
491  return ERROR_OK;
492 
493  // malloc for the command and data bytes
494  struct ch347_cmd *cmd = malloc(sizeof(struct ch347_cmd));
495  if (cmd)
496  cmd->write_data = malloc(ch347.scratchpad_idx);
497  if (!cmd || !cmd->write_data) {
498  LOG_ERROR("malloc failed");
499  free(cmd);
500  return ERROR_FAIL;
501  }
502 
503  // copy data, calculate the reads and add to the command queue
504  cmd->type = ch347.scratchpad_cmd_type;
505  cmd->write_data_len = ch347.scratchpad_idx;
506  memcpy(cmd->write_data, ch347.scratchpad, ch347.scratchpad_idx);
508  list_add_tail(&cmd->queue, &ch347.cmd_queue);
509 
510  // cleanup the scratchpad for the next command
512  ch347.scratchpad_idx = 0;
513  return ERROR_OK;
514 }
515 
525 static int ch347_read_scan(uint8_t *decoded_buf, int decoded_buf_len, int raw_read_len)
526 {
527  int read_len = raw_read_len;
528  uint8_t *read_buf = malloc(read_len);
529  if (!read_buf) {
530  LOG_ERROR("malloc failed");
531  return ERROR_FAIL;
532  }
533 
534  int retval = ch347_read_data(read_buf, &read_len);
535  if (retval != ERROR_OK) {
536  free(read_buf);
537  return retval;
538  }
539 
540  int rd_idx = 0;
541  int decoded_buf_idx = 0;
542 
543  while (rd_idx < read_len) {
544  unsigned int type = read_buf[rd_idx++];
545  uint16_t data_len = le_to_h_u16(&read_buf[rd_idx]);
546  rd_idx += 2;
547  if (decoded_buf_idx > decoded_buf_len) {
548  LOG_ERROR("CH347 decoded_buf too small");
549  free(read_buf);
550  return ERROR_FAIL;
551  }
552 
553  // nothing to decode? Only read to make the CH347 happy!
554  if (!decoded_buf) {
555  rd_idx += data_len;
556  continue;
557  }
558 
559  switch (type) {
560  case CH347_CMD_GPIO:
561  case CH347_CMD_JTAG_INIT:
562  case CH347_CMD_SWD_INIT:
564  // for all bytewise commands: copy the data bytes
565  memcpy(&decoded_buf[decoded_buf_idx], &read_buf[rd_idx], data_len);
566  decoded_buf_idx += data_len;
567  rd_idx += data_len;
568  break;
570  // for CH347_CMD_JTAG_BIT_OP_RD we need to copy bit by bit
571  for (int i = 0; i < data_len; i++) {
572  if (read_buf[rd_idx + i] & BIT(0))
573  decoded_buf[decoded_buf_idx + i / 8] |= BIT(i % 8);
574  else
575  decoded_buf[decoded_buf_idx + i / 8] &= ~(BIT(i % 8));
576  }
577  rd_idx += data_len;
578  decoded_buf_idx += DIV_ROUND_UP(data_len, 8);
579  break;
580  default:
581  LOG_ERROR("CH347 read command fail");
582  free(read_buf);
583  return ERROR_FAIL;
584  }
585  }
586 
587  free(read_buf);
588  return ERROR_OK;
589 }
590 
598 static int ch347_scan_data_to_fields(uint8_t *decoded_buf, int decoded_buf_len)
599 {
600  int byte_offset = 0;
601  struct ch347_scan *scan;
602  struct ch347_scan *tmp;
603  int bit_offset = 0;
605  for (int i = 0; i < scan->fields_len; i++) {
606  int num_bits = scan->fields[i].num_bits;
607  LOG_DEBUG("fields[%d].in_value[%d], read from bit offset: %d", i, num_bits, bit_offset);
608  // only if we need the value
609  if (scan->fields[i].in_value) {
610  uint8_t *capture_buf = malloc(DIV_ROUND_UP(num_bits, 8));
611  if (!capture_buf) {
612  LOG_ERROR("malloc failed");
613  return ERROR_FAIL;
614  }
615  uint8_t *captured = buf_set_buf(decoded_buf, bit_offset, capture_buf, 0, num_bits);
616 
618  char *str = buf_to_hex_str(captured, num_bits);
619  LOG_DEBUG_IO("size=%d, buf=[%s]", num_bits, str);
620  free(str);
621  }
622 
623  buf_cpy(captured, scan->fields[i].in_value, num_bits);
624  free(capture_buf);
625  } else {
627  LOG_DEBUG_IO("field skipped");
628  }
629  bit_offset += num_bits;
630  }
631  list_del(&scan->queue);
632  free(scan);
633  /* after one round of scan field processing the
634  next data bits are read from the next data byte
635  => round up and calculate the next start bit */
636  byte_offset = DIV_ROUND_UP(bit_offset, 8);
637  bit_offset = byte_offset * 8;
638  }
639 
640  // if not all bytes are transferred: put the rest into single_read buffer
641  if (byte_offset < decoded_buf_len) {
642  ch347.singe_read_len = decoded_buf_len - byte_offset;
643  LOG_DEBUG("single read of %d bytes", ch347.singe_read_len);
645  LOG_ERROR("Can't read more than %d bytes for a single command!", CH347_SINGLE_CMD_MAX_READ);
647  }
648  memcpy(ch347.single_read, &decoded_buf[byte_offset], ch347.singe_read_len);
649  }
650 
651  return ERROR_OK;
652 }
653 
660 static int ch347_cmd_transmit_queue(void)
661 {
662  // queue last command
663  int retval = ch347_cmd_from_scratchpad();
664  if (retval != ERROR_OK)
665  return retval;
666 
667  // nothing to do! => done here
668  if (list_empty(&ch347.cmd_queue))
669  return ERROR_OK;
670 
671  // calculate the needed buffer length for all decoded bytes
672  struct ch347_cmd *cmd;
673  int decoded_buf_len = 0;
675  if (cmd->read_len > 0)
676  decoded_buf_len += ch347_is_single_cmd_type(cmd->type) ?
677  cmd->read_len : DIV_ROUND_UP(cmd->tdo_bit_count, 8);
678 
679  // create the buffer for all decoded bytes
680  uint8_t *decoded_buf = NULL;
681  int decoded_buf_idx = 0;
682  if (decoded_buf_len > 0) {
683  decoded_buf = malloc(decoded_buf_len);
684  if (!decoded_buf) {
685  LOG_ERROR("malloc failed");
686  return ERROR_FAIL;
687  }
688  }
689 
690  while (!list_empty(&ch347.cmd_queue)) {
691  struct ch347_cmd *last_cmd = NULL;
692  int total_len = 0;
693  int total_tdo_count = 0;
694  int bytes_to_write = 0;
695 
697  total_len += CH347_CMD_HEADER + cmd->write_data_len;
698  total_tdo_count += cmd->tdo_bit_count;
699  // don't exceed max length or max TDO bit count
700  if (total_len >= ch347.max_len || total_tdo_count >= HW_TDO_BUF_SIZE)
701  break;
702  // remember the last cmd to send and bytes to send
703  last_cmd = cmd;
704  bytes_to_write = total_len;
705  }
706 
707  // sanity checks
708  if (!last_cmd || bytes_to_write == 0) {
709  LOG_ERROR("Nothing to send!");
710  free(decoded_buf);
711  return ERROR_FAIL;
712  }
713 
714  // create the write buffer
715  uint8_t *write_buf = malloc(bytes_to_write);
716  if (!write_buf) {
717  LOG_ERROR("malloc failed");
718  free(decoded_buf);
719  return ERROR_FAIL;
720  }
721 
722  int idx = 0;
723  int bytes_to_read = 0;
724  int current_decoded_buf_len = 0;
725  struct ch347_cmd *tmp;
726 
728  // copy command to buffer
729  write_buf[idx++] = cmd->type;
730  h_u16_to_le(&write_buf[idx], cmd->write_data_len);
731  idx += 2;
732  memcpy(&write_buf[idx], cmd->write_data, cmd->write_data_len);
733  idx += cmd->write_data_len;
734  // need to read something back?
735  if (cmd->read_len > 0) {
736  bytes_to_read += CH347_CMD_HEADER + cmd->read_len;
737  current_decoded_buf_len += ch347_is_single_cmd_type(cmd->type) ?
738  cmd->read_len : DIV_ROUND_UP(cmd->tdo_bit_count, 8);
739  }
740 
741  // cmd data no longer needed
742  list_del(&cmd->queue);
743  free(cmd->write_data);
744  free(cmd);
745 
746  if (cmd == last_cmd)
747  break;
748  }
749 
750  // write data to device
751  retval = ch347_write_data(write_buf, &idx);
752  free(write_buf);
753  if (retval != ERROR_OK) {
754  free(decoded_buf);
755  return retval;
756  }
757 
758  if (!bytes_to_read)
759  continue;
760 
761  // Need only to execute a read without decoding the data to make the CH347 happy?
762  if (!current_decoded_buf_len) {
763  // read but don't decode anything
764  retval = ch347_read_scan(NULL, 0, bytes_to_read);
765  } else {
766  retval = ch347_read_scan(&decoded_buf[decoded_buf_idx], current_decoded_buf_len, bytes_to_read);
767  decoded_buf_idx += current_decoded_buf_len;
768  }
769 
770  if (retval != ERROR_OK) {
771  free(decoded_buf);
772  return retval;
773  }
774  }
775 
776  // something decoded from the data read back from CH347?
777  if (decoded_buf) {
778  // put the decoded data into the scan fields or single_read buffer
779  retval = ch347_scan_data_to_fields(decoded_buf, decoded_buf_len);
780  free(decoded_buf);
781  }
782 
783  return retval;
784 }
785 
792 static int ch347_cmd_start_next(uint8_t type)
793 {
794  // different command type or non chainable command? (GPIO commands can't be concat)
795  uint8_t prev_type = ch347.scratchpad_cmd_type;
796  int retval = ERROR_OK;
797  if (prev_type != type || ch347_is_single_cmd_type(type)) {
798  // something written in the scratchpad? => store it as command
799  if (prev_type != 0 && ch347.scratchpad_idx > 0) {
800  retval = ch347_cmd_from_scratchpad();
801  if (retval != ERROR_OK)
802  return retval;
803 
804  /* if the last queued command is not chainable we should send it immediately
805  because e.g. the GPIO command can't be combined with any other command */
806  if (ch347_is_single_cmd_type(prev_type)) {
807  retval = ch347_cmd_transmit_queue();
808  if (retval != ERROR_OK)
809  return retval;
810  }
811  }
812 
813  /* before we can send non chainable command ("single" like GPIO command) we should send all
814  other commands because we can't send it together with other commands */
816  retval = ch347_cmd_transmit_queue();
817  if (retval != ERROR_OK)
818  return retval;
819  }
820 
821  // store the next command type
823  }
824 
825  return retval;
826 }
827 
835 static int ch347_scan_queue_fields(struct scan_field *scan_fields, int scan_fields_len)
836 {
837  // malloc for the scan struct
838  struct ch347_scan *scan = malloc(sizeof(struct ch347_scan));
839  if (!scan) {
840  LOG_ERROR("malloc failed");
841  return ERROR_FAIL;
842  }
843 
844  scan->fields = scan_fields;
845  scan->fields_len = scan_fields_len;
846  list_add_tail(&scan->queue, &ch347.scan_queue);
847  return ERROR_OK;
848 }
849 
858 static int ch347_single_read_get_byte(int read_buf_idx, uint8_t *byte)
859 {
860  int retval = ch347_cmd_transmit_queue();
861  if (retval != ERROR_OK)
862  return retval;
863 
864  if (read_buf_idx > CH347_SINGLE_CMD_MAX_READ || read_buf_idx < 0) {
865  LOG_ERROR("read_buf_idx out of range");
866  read_buf_idx = 0;
867  return ERROR_FAIL;
868  }
869 
870  *byte = ch347.single_read[read_buf_idx];
871  return ERROR_OK;
872 }
873 
879 {
880  // if full create a new command in the queue
882  uint8_t type = ch347.scratchpad_cmd_type;
885  }
886 }
887 
896 static int ch347_scratchpad_add_byte(uint8_t byte)
897 {
898  if (ch347.scratchpad_cmd_type == 0) {
899  LOG_ERROR("call ch347_next_cmd first!");
900  return ERROR_FAIL;
901  }
902 
905  return ERROR_OK;
906 }
907 
916 {
918 }
919 
930 static int ch347_scratchpad_add_bytes(uint8_t *bytes, int count)
931 {
932  if (ch347.scratchpad_cmd_type == 0) {
933  LOG_ERROR("call ch347_next_cmd first!");
934  return ERROR_FAIL;
935  }
936 
937  int remaining = count;
938  int bytes_idx = 0;
939  while (remaining > 0) {
940  int bytes_to_store = ch347.scratchpad_idx + remaining <= UCMDPKT_DATA_MAX_BYTES_USBHS ?
942 
943  if (bytes)
944  memcpy(&ch347.scratchpad[ch347.scratchpad_idx], &bytes[bytes_idx], bytes_to_store);
945  else
946  memset(&ch347.scratchpad[ch347.scratchpad_idx], 0, bytes_to_store);
947 
948  ch347.scratchpad_idx += bytes_to_store;
949  bytes_idx += bytes_to_store;
950  remaining -= bytes_to_store;
952  }
953 
954  return ERROR_OK;
955 }
956 
964 static int ch347_scratchpad_add_clock_tms(bool tms)
965 {
966  ch347.tms_pin = tms ? TMS_H : TMS_L;
967  ch347.tck_pin = TCK_L;
968  int retval = ch347_scratchpad_add_pin_byte();
969  if (retval != ERROR_OK)
970  return retval;
971 
972  ch347.tck_pin = TCK_H;
974 }
975 
983 {
984  int retval = ERROR_OK;
985  if (ch347.scratchpad_cmd_type == 0) {
987  if (retval != ERROR_OK)
988  return retval;
989  }
990 
991  bool tms = ch347.tms_pin == TMS_H;
992  retval = ERROR_OK;
993  for (int i = 0; i < count; i++) {
994  retval = ch347_scratchpad_add_clock_tms(tms);
995  if (retval != ERROR_OK)
996  return retval;
997  }
998 
999  return ERROR_OK;
1000 }
1001 
1008 {
1009  ch347.tck_pin = TCK_L;
1011 }
1012 
1021 static int ch347_scratchpad_add_tms_change(const uint8_t *tms_value, int step, int skip)
1022 {
1023  LOG_DEBUG_IO("TMS Value: %02x..., step = %d, skip = %d", tms_value[0], step, skip);
1024 
1026  if (retval != ERROR_OK)
1027  return retval;
1028 
1029  for (int i = skip; i < step; i++) {
1030  retval = ch347_scratchpad_add_clock_tms((tms_value[i / 8] >> (i % 8)) & BIT(0));
1031  if (retval != ERROR_OK)
1032  return retval;
1033  }
1034 
1036 }
1037 
1045 {
1046  LOG_DEBUG_IO("num_states=%d, last_state=%d", cmd->num_states, cmd->path[cmd->num_states - 1]);
1047 
1049  if (retval != ERROR_OK)
1050  return retval;
1051 
1052  for (unsigned int i = 0; i < cmd->num_states; i++) {
1053  if (tap_state_transition(tap_get_state(), false) == cmd->path[i]) {
1054  retval = ch347_scratchpad_add_clock_tms(0);
1055  if (retval != ERROR_OK)
1056  return retval;
1057  } else if (tap_state_transition(tap_get_state(), true) == cmd->path[i]) {
1058  retval = ch347_scratchpad_add_clock_tms(1);
1059  if (retval != ERROR_OK)
1060  return retval;
1061  } else {
1062  LOG_ERROR("No transition possible!");
1064  }
1065  tap_set_state(cmd->path[i]);
1066  }
1067 
1069 }
1070 
1079 {
1080  uint8_t tms_scan;
1081  int tms_len;
1082 
1084  // don't do anything if we are already in the right state; but do execute always the TAP_RESET
1085  if (tap_get_state() == state && state != TAP_RESET)
1086  return ERROR_OK;
1087 
1088  tms_scan = tap_get_tms_path(tap_get_state(), state);
1090  int retval = ch347_scratchpad_add_tms_change(&tms_scan, tms_len, skip);
1092  return retval;
1093 }
1094 
1104 static int ch347_scratchpad_add_write_read(struct scan_command *cmd, uint8_t *bits, int bits_len, enum scan_type scan)
1105 {
1106  // the bits and bytes to transfer
1107  int byte_count = bits_len / 8;
1108  int bit_count = bits_len % 8;
1109 
1110  // only bytes are not possible because we need to set TMS high for the last bit
1111  if (byte_count > 0 && bit_count == 0) {
1112  // make one byte to eight bits
1113  byte_count--;
1114  bit_count = 8;
1115  }
1116 
1117  // in bitwise mode only bits are allowed
1118  if (ch347.use_bitwise_mode) {
1119  byte_count = 0;
1120  bit_count = bits_len;
1121  }
1122 
1123  bool is_read = (scan == SCAN_IN || scan == SCAN_IO);
1124 
1125  // if we need to send bytes
1126  if (byte_count > 0) {
1127  // start the next cmd and copy the data out bytes to it
1129  if (retval != ERROR_OK)
1130  return retval;
1131 
1132  if (bits)
1133  retval = ch347_scratchpad_add_bytes(bits, byte_count);
1134  else
1135  retval = ch347_scratchpad_add_bytes(NULL, byte_count);
1136 
1137  if (retval != ERROR_OK)
1138  return retval;
1139  }
1140 
1141  // bits are always need to send; no possibility to not send bits
1143  if (retval != ERROR_OK)
1144  return retval;
1145 
1146  ch347.tms_pin = TMS_L;
1147  ch347.tdi_pin = TDI_L;
1148 
1149  for (int i = 0; i < bit_count; i++) {
1150  if (bits)
1151  ch347.tdi_pin = ((bits[byte_count + i / 8] >> i % 8) & BIT(0)) ? TDI_H : TDI_L;
1152 
1153  // for the last bit set TMS high to exit the shift state
1154  if (i + 1 == bit_count)
1155  ch347.tms_pin = TMS_H;
1156 
1157  ch347.tck_pin = TCK_L;
1158  retval = ch347_scratchpad_add_pin_byte();
1159  if (retval != ERROR_OK)
1160  return retval;
1161 
1162  ch347.tck_pin = TCK_H;
1163  retval = ch347_scratchpad_add_pin_byte();
1164  if (retval != ERROR_OK)
1165  return retval;
1166 
1167  /* cut the package after each MAX_BITS_PER_BIT_OP bits because it
1168  needs a dividable by 8 bits package */
1169  if (i > 0 && (i + 1) % MAX_BITS_PER_BIT_OP == 0) {
1170  retval = ch347_cmd_from_scratchpad();
1171  if (retval != ERROR_OK)
1172  return retval;
1173 
1175  if (retval != ERROR_OK)
1176  return retval;
1177  }
1178  }
1179 
1180  // one TCK_L after the last bit
1182  if (retval != ERROR_OK)
1183  return retval;
1184 
1185  // if read is involved we need to queue the scan fields
1186  if (is_read)
1187  return ch347_scan_queue_fields(cmd->fields, cmd->num_fields);
1188 
1189  return ERROR_OK;
1190 }
1191 
1199 static int ch347_scratchpad_add_run_test(int cycles, enum tap_state state)
1200 {
1201  LOG_DEBUG_IO("cycles=%d, end_state=%d", cycles, state);
1202  int retval = ERROR_OK;
1203  if (tap_get_state() != TAP_IDLE) {
1205  if (retval != ERROR_OK)
1206  return retval;
1207  }
1208 
1209  retval = ch347_scratchpad_add_stableclocks(cycles);
1210  if (retval != ERROR_OK)
1211  return retval;
1212 
1214 }
1215 
1223 {
1224  static const char *const type2str[] = {"", "SCAN_IN", "SCAN_OUT", "SCAN_IO"};
1225 
1226  enum scan_type type = jtag_scan_type(cmd);
1227  uint8_t *buf = NULL;
1228  int scan_bits = jtag_build_buffer(cmd, &buf);
1229 
1230  // add a move to IRSHIFT or DRSHIFT state
1231  int retval = ERROR_OK;
1232  if (cmd->ir_scan)
1234  else
1236 
1237  if (retval != ERROR_OK) {
1238  free(buf);
1239  return retval;
1240  }
1241 
1243  char *log_buf = buf_to_hex_str(buf, scan_bits);
1244  LOG_DEBUG_IO("scan=%s, type=%s, bits=%d, buf=[%s], end_state=%d",
1245  cmd->ir_scan ? "IRSCAN" : "DRSCAN",
1246  type2str[type],
1247  scan_bits, log_buf, cmd->end_state);
1248  free(log_buf);
1249  }
1250 
1251  retval = ch347_scratchpad_add_write_read(cmd, buf, scan_bits, type);
1252  free(buf);
1253  if (retval != ERROR_OK)
1254  return retval;
1255 
1256  // add a move to the final state
1257  return ch347_scratchpad_add_move_state(cmd->end_state, 1);
1258 }
1259 
1267 static int ch347_gpio_set(int gpio, bool data)
1268 {
1269  int retval = ch347_cmd_start_next(CH347_CMD_GPIO);
1270  if (retval != ERROR_OK)
1271  return retval;
1272 
1273  uint8_t gpios[GPIO_CNT];
1274  memset(gpios, 0, GPIO_CNT);
1275  /* always set bits 7 and 6 for GPIO enable
1276  bits 5 and 4 for pin direction output
1277  bit 3 is the data bit */
1278  gpios[gpio] = data == 0 ? GPIO_SET_L : GPIO_SET_H;
1280  if (retval != ERROR_OK)
1281  return retval;
1282 
1283  // check in the read if the bit is set/cleared correctly
1284  uint8_t byte;
1285  retval = ch347_single_read_get_byte(gpio, &byte);
1286  if (retval != ERROR_OK)
1287  return retval;
1288 
1289  if ((byte & BIT(6)) >> 6 != data) {
1290  LOG_ERROR("Output not set.");
1291  return ERROR_FAIL;
1292  }
1293 
1294  return ERROR_OK;
1295 }
1296 
1303 static int ch347_activity_led_set(int led_state)
1304 {
1305  if (ch347_activity_led_gpio_pin != 0xFF)
1306  return ch347_gpio_set(ch347_activity_led_gpio_pin, ch347_activity_led_active_high ? led_state : 1 - led_state);
1307 
1308  // not configured => also OK
1309  return ERROR_OK;
1310 }
1311 
1320 static int ch347_reset(int trst, int srst)
1321 {
1322  LOG_DEBUG_IO("reset trst: %i srst %i", trst, srst);
1323  if (srst) {
1324  LOG_ERROR("Asserting SRST not supported!");
1325  return ERROR_FAIL;
1326  }
1327 
1328  if (swd_mode) {
1329  if (trst)
1330  LOG_WARNING("Asserting TRST not supported in SWD mode!");
1331  return ERROR_OK;
1332  }
1333 
1335  if (retval != ERROR_OK)
1336  return retval;
1337 
1338  ch347.trst_pin = trst ? TRST_L : TRST_H;
1339  retval = ch347_scratchpad_add_pin_byte();
1340  if (retval != ERROR_OK)
1341  return retval;
1342 
1344  if (retval != ERROR_OK)
1345  return retval;
1346 
1347  return ch347_cmd_transmit_queue();
1348 }
1349 
1356 static int ch347_sleep(int us)
1357 {
1358  LOG_DEBUG_IO("us=%d", us);
1359  int retval = ch347_cmd_transmit_queue();
1360  jtag_sleep(us);
1361  return retval;
1362 }
1363 
1369 static int ch347_execute_queue(struct jtag_command *cmd_queue)
1370 {
1371  struct jtag_command *cmd = cmd_queue;
1372 
1373  int retval = ch347_activity_led_set(LED_ON);
1374  if (retval != ERROR_OK)
1375  return retval;
1376 
1377  while (retval == ERROR_OK && cmd) {
1378  switch (cmd->type) {
1379  case JTAG_RUNTEST:
1380  retval = ch347_scratchpad_add_run_test(cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
1381  break;
1382  case JTAG_STABLECLOCKS:
1383  retval = ch347_scratchpad_add_stableclocks(cmd->cmd.stableclocks->num_cycles);
1384  break;
1385  case JTAG_TLR_RESET:
1386  retval = ch347_scratchpad_add_move_state(cmd->cmd.statemove->end_state, 0);
1387  break;
1388  case JTAG_PATHMOVE:
1389  retval = ch347_scratchpad_add_move_path(cmd->cmd.pathmove);
1390  break;
1391  case JTAG_TMS:
1392  retval = ch347_scratchpad_add_tms_change(cmd->cmd.tms->bits, cmd->cmd.tms->num_bits, 0);
1393  break;
1394  case JTAG_SLEEP:
1395  retval = ch347_sleep(cmd->cmd.sleep->us);
1396  break;
1397  case JTAG_SCAN:
1398  retval = ch347_scratchpad_add_scan(cmd->cmd.scan);
1399  break;
1400  default:
1401  LOG_ERROR("BUG: unknown JTAG command type 0x%X", cmd->type);
1402  retval = ERROR_FAIL;
1403  break;
1404  }
1405 
1406  cmd = cmd->next;
1407  }
1408 
1409  if (retval != ERROR_OK)
1410  return retval;
1411 
1412  retval = ch347_cmd_transmit_queue();
1413  if (retval != ERROR_OK)
1414  return retval;
1415 
1417 }
1418 
1424 static int ch347_open_device(void)
1425 {
1426  const uint16_t *ch347_vids = custom_ch347_vids[0] != 0 ? custom_ch347_vids : default_ch347_vids;
1427  const uint16_t *ch347_pids = custom_ch347_pids[0] != 0 ? custom_ch347_pids : default_ch347_pids;
1428 
1429  int retval = jtag_libusb_open(ch347_vids, ch347_pids, ch347_device_desc, &ch347_handle, NULL);
1430  if (retval != ERROR_OK) {
1431  char error_message[256];
1432  snprintf(error_message, sizeof(error_message), "CH347 not found. Tried VID/PID pairs: ");
1433  for (int i = 0; ch347_vids[i] != 0; i++)
1434  snprintf(error_message + strlen(error_message), sizeof(error_message) - strlen(error_message),
1435  "%04x:%04x ", ch347_vids[i], ch347_pids[i]);
1436 
1437  LOG_ERROR("%s", error_message);
1438  return retval;
1439  }
1440 
1441  struct libusb_device_descriptor ch347_device_descriptor;
1442  libusb_device *device = libusb_get_device(ch347_handle);
1443  if (!device) {
1444  LOG_ERROR("CH347 error calling libusb_get_device");
1446  return ERROR_FAIL;
1447  }
1448 
1449  retval = libusb_get_device_descriptor(device, &ch347_device_descriptor);
1450  if (retval != ERROR_OK) {
1451  LOG_ERROR("CH347 error getting device descriptor: %s", libusb_error_name(retval));
1453  return retval;
1454  }
1455 
1456  // CH347T / CH347F detection
1457  // if we can claim interface 4 we found a CH347F chip; if we can claim interface 2 we found CH347T chip
1458  retval = libusb_claim_interface(ch347_handle, CH347F_MPHSI_INTERFACE);
1459  if (retval != ERROR_OK) {
1460  retval = libusb_claim_interface(ch347_handle, CH347T_MPHSI_INTERFACE);
1461  if (retval != ERROR_OK) {
1462  LOG_ERROR("CH347 unable to claim interface: %s", libusb_error_name(retval));
1464  return retval;
1465  }
1467  } else {
1469  }
1470 
1471  char firmware_version;
1473  LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
1474  VENDOR_VERSION, 0, 0, &firmware_version, sizeof(firmware_version),
1476  if (retval != ERROR_OK) {
1477  LOG_ERROR("CH347 unable to get firmware version");
1479  return retval;
1480  }
1481 
1482  char manufacturer[256 + 1];
1483  if (libusb_get_string_descriptor_ascii(ch347_handle, ch347_device_descriptor.iManufacturer,
1484  (unsigned char *)manufacturer, sizeof(manufacturer) - 1) < 0) {
1485  strcpy(manufacturer, "(unknown)");
1486  }
1487  char product[256 + 1];
1488  if (libusb_get_string_descriptor_ascii(ch347_handle, ch347_device_descriptor.iProduct,
1489  (unsigned char *)product, sizeof(product) - 1) < 0) {
1490  strcpy(product, "(unknown)");
1491  }
1492  char serial_number[256 + 1];
1493  if (libusb_get_string_descriptor_ascii(ch347_handle, ch347_device_descriptor.iSerialNumber,
1494  (unsigned char *)serial_number, sizeof(serial_number) - 1) < 0) {
1495  strcpy(serial_number, "(unknown)");
1496  }
1497 
1498  LOG_INFO("CH347 %s from vendor %s with serial number %s found. (Chip version=%X.%2X, Firmware=0x%02X)",
1499  product,
1500  manufacturer,
1501  serial_number,
1502  (ch347_device_descriptor.bcdDevice >> 8) & 0xFF,
1503  ch347_device_descriptor.bcdDevice & 0xFF,
1504  firmware_version);
1505 
1506  if (ch347.chip_variant == CH347T && ch347_device_descriptor.bcdDevice < BYTEWISE_MODE_VERSION) {
1507  LOG_INFO("CH347T old version of the chip, JTAG only working in bitwise mode. For bytewise mode at least version %X.%X is needed.",
1508  (BYTEWISE_MODE_VERSION >> 8) & 0xFF,
1509  BYTEWISE_MODE_VERSION & 0xFF);
1510  ch347.use_bitwise_mode = true;
1511  } else {
1512  ch347.use_bitwise_mode = false;
1513  }
1514 
1515  if (ch347.chip_variant == CH347T) {
1516  if (swd_mode) {
1517  ch347.swclk_5mhz_supported = ch347_device_descriptor.bcdDevice >= 0x544;
1518 
1519  if (ch347_device_descriptor.bcdDevice < 0x441)
1520  LOG_WARNING("CH347T version older than 4.41 probably does not support SWD transport");
1521 
1522  if (ch347_device_descriptor.bcdDevice == 0x441)
1523  LOG_WARNING("If CH347T version 4.41 cannot connect or SWD fails often, insert a resistor to SWDIO circuit");
1524 
1525  } else if (ch347_device_descriptor.bcdDevice == 0x241) {
1526  LOG_WARNING("CH347T version 2.41 has very weird clock timing, may not work with a slower JTAG device");
1527  }
1528 
1529  if (ch347_device_descriptor.bcdDevice < 0x544)
1530  LOG_INFO("Please upgrade CH347T firmware to a production version >= 5.44");
1531 
1532  } else if (ch347.chip_variant == CH347F) {
1533  ch347.swclk_5mhz_supported = ch347_device_descriptor.bcdDevice >= 0x101;
1534 
1535  if (ch347_device_descriptor.bcdDevice < 0x101)
1536  LOG_INFO("Please upgrade CH347F firmware to a production version >= 1.1");
1537  }
1538 
1539  return ERROR_OK;
1540 }
1541 
1547 static int ch347_quit(void)
1548 {
1549  // on close set the LED on, because the state without JTAG is on
1551  int retval = ch347_cmd_transmit_queue();
1553  LOG_DEBUG_IO("CH347 close");
1554  return retval;
1555 }
1556 
1568 static int ch347_adapter_init(uint8_t clock_index, bool *supports_larger_pack_mode)
1569 {
1571  if (retval != ERROR_OK)
1572  return retval;
1573 
1574  retval = ch347_scratchpad_add_byte(0);
1575  if (retval != ERROR_OK)
1576  return retval;
1577 
1578  retval = ch347_scratchpad_add_byte(clock_index);
1579  if (retval != ERROR_OK)
1580  return retval;
1581 
1582  for (int i = 0; i < 4; i++) {
1583  retval = ch347_scratchpad_add_pin_byte();
1584  if (retval != ERROR_OK)
1585  return retval;
1586  }
1587 
1588  uint8_t mode;
1589  retval = ch347_single_read_get_byte(0, &mode);
1590  if (retval != ERROR_OK)
1591  return retval;
1592 
1593  *supports_larger_pack_mode = mode != 0;
1594  return ERROR_OK;
1595 }
1596 
1605 static int ch347_adapter_supports_larger_pack_mode(bool *supports_larger_pack_mode)
1606 {
1607  return ch347_adapter_init(CH347_CMD_INIT_GET_MODE_CLOCK_INDEX_VALUE, supports_larger_pack_mode);
1608 }
1609 
1617 static int ch347_adapter_set_speed(uint8_t clock_index)
1618 {
1619  bool unused;
1620  return ch347_adapter_init(clock_index, &unused);
1621 }
1622 
1629 static int ch347_swd_init_cmd(uint8_t clock_divisor)
1630 {
1632  if (retval != ERROR_OK)
1633  return retval;
1634 
1635  uint8_t cmd_data[] = {0x40, 0x42, 0x0f, 0x00, clock_divisor, 0x00, 0x00, 0x00 };
1636  retval = ch347_scratchpad_add_bytes(cmd_data, ARRAY_SIZE(cmd_data));
1637  if (retval != ERROR_OK)
1638  return retval;
1639 
1640  /* TODO: CH347_CMD_SWD_INIT reads one data byte.
1641  But how can we decide if SWD init was successfully executed?
1642  Return an error code if init was failed */
1643  uint8_t init_result = 0;
1644  retval = ch347_single_read_get_byte(0, &init_result);
1645  LOG_DEBUG("SWD init clk div %" PRIu8 ", result %02" PRIx8,
1646  clock_divisor, init_result);
1647  ch347_swd_context.clk_divisor = clock_divisor;
1648  return retval;
1649 }
1650 
1657 static int ch347_speed_set(int speed_index)
1658 {
1659  if (swd_mode)
1660  return ch347_swd_init_cmd(speed_index);
1661 
1662  int retval = ch347_adapter_set_speed(speed_index);
1663  if (retval != ERROR_OK) {
1664  LOG_ERROR("Couldn't set CH347 speed");
1665  return retval;
1666  }
1667 
1668  return ERROR_OK;
1669 }
1670 
1676 static int ch347_init_pack_size(void)
1677 {
1678  // already set?
1679  if (ch347.pack_size != UNSET)
1680  return ERROR_OK;
1681 
1682  // set the lower limit for starting
1684  bool supports_larger_pack_mode;
1685  int retval = ch347_adapter_supports_larger_pack_mode(&supports_larger_pack_mode);
1686  if (retval != ERROR_OK)
1687  return retval;
1688 
1689  ch347.pack_size = supports_larger_pack_mode ? LARGER_PACK : STANDARD_PACK;
1692  return ERROR_OK;
1693 }
1694 
1702 static int ch347_speed_get(int speed_idx, int *khz)
1703 {
1704  if (swd_mode) {
1705  if (speed_idx)
1706  *khz = DIV_ROUND_UP(CH347_SWD_CLOCK_BASE, speed_idx);
1707  else
1708  *khz = CH347_SWD_CLOCK_MAX;
1709  return ERROR_OK;
1710  }
1711 
1712  int retval = ch347_init_pack_size();
1713  if (retval != ERROR_OK)
1714  return retval;
1715  const int *speeds = ch347.pack_size == STANDARD_PACK ?
1717  *khz = speeds[speed_idx];
1718  return ERROR_OK;
1719 }
1720 
1728 static int ch347_speed_get_index(int khz, int *speed_idx)
1729 {
1730  if (khz == 0) {
1731  LOG_ERROR("Adaptive clocking not supported");
1732  return ERROR_FAIL;
1733  }
1734 
1735  if (swd_mode) {
1737  *speed_idx = 0;
1738  } else {
1739  // Don't allow too low clk speeds: packet processing is limited to ~8 msec
1740  // or triggers host USB disconnect
1741  *speed_idx = MIN(DIV_ROUND_UP(CH347_SWD_CLOCK_BASE, khz),
1743  }
1744  return ERROR_OK;
1745  }
1746 
1747  // when checking with speed index 9 we can see if the device supports STANDARD_PACK or LARGER_PACK mode
1748  int retval = ch347_init_pack_size();
1749  if (retval != ERROR_OK)
1750  return retval;
1751  // depending on pack size there are different fixed clock speeds possible
1752  const int *speeds = ch347.pack_size == STANDARD_PACK ?
1754  int length = ch347.pack_size == STANDARD_PACK ?
1756  int idx = -1;
1757  int lower_bound = 0;
1758  // find the suitable speed index
1759  for (int i = 0; i < length; i++) {
1760  if (khz >= lower_bound && khz <= speeds[i]) {
1761  idx = i;
1762  break;
1763  }
1764  lower_bound = speeds[i];
1765  }
1766  // too high! => use max possible speed
1767  if (idx == -1) {
1768  LOG_INFO("Speed %d kHz is higher than highest speed of %d kHz. Using %d khz!",
1769  khz, speeds[length - 1], speeds[length - 1]);
1770  idx = length - 1;
1771  } else if (speeds[idx] != khz) {
1772  LOG_INFO("Requested speed of %d kHz is not possible. Using the next higher speed of %d kHz!",
1773  khz, speeds[idx]);
1774  }
1775  *speed_idx = idx;
1776  return ERROR_OK;
1777 }
1778 
1784 COMMAND_HANDLER(ch347_handle_vid_pid_command)
1785 {
1786  if (CMD_ARGC < 2)
1788 
1789  for (int i = 0; i < (int)(MIN(CMD_ARGC, ARRAY_SIZE(custom_ch347_pids))); i += 2) {
1791  COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i + 1], custom_ch347_pids[i / 2]);
1792  }
1793 
1794  return ERROR_OK;
1795 }
1796 
1802 COMMAND_HANDLER(ch347_handle_device_desc_command)
1803 {
1804  if (CMD_ARGC != 1)
1806 
1807  free(ch347_device_desc);
1808  ch347_device_desc = strdup(CMD_ARGV[0]);
1809  return ERROR_OK;
1810 }
1811 
1817 COMMAND_HANDLER(ch347_handle_activity_led_command)
1818 {
1819  if (CMD_ARGC != 1)
1821 
1822  uint8_t gpio;
1823  if (CMD_ARGV[0][0] == 'n') {
1824  COMMAND_PARSE_NUMBER(u8, &CMD_ARGV[0][1], gpio);
1826  } else {
1827  COMMAND_PARSE_NUMBER(u8, CMD_ARGV[0], gpio);
1829  }
1830 
1831  if (gpio >= GPIO_CNT || (BIT(gpio) & USEABLE_GPIOS) == 0)
1833 
1835  return ERROR_OK;
1836 }
1837 
1838 static const struct command_registration ch347_subcommand_handlers[] = {
1839  {
1840  .name = "vid_pid",
1841  .handler = &ch347_handle_vid_pid_command,
1842  .mode = COMMAND_CONFIG,
1843  .help = "the vendor ID and product ID of the CH347 device",
1844  .usage = "(vid pid)*",
1845  },
1846  {
1847  .name = "device_desc",
1848  .handler = &ch347_handle_device_desc_command,
1849  .mode = COMMAND_CONFIG,
1850  .help = "set the USB device description of the CH347 device",
1851  .usage = "description_string",
1852  },
1853  {
1854  .name = "activity_led",
1855  .handler = &ch347_handle_activity_led_command,
1856  .mode = COMMAND_CONFIG,
1857  .help = "if set this CH347 GPIO pin is the JTAG activity LED; start with n for active low output",
1858  .usage = "[n]gpio_number",
1859  },
1861 };
1862 
1863 static const struct command_registration ch347_command_handlers[] = {
1864  {
1865  .name = "ch347",
1866  .mode = COMMAND_ANY,
1867  .help = "perform ch347 management",
1868  .chain = ch347_subcommand_handlers,
1869  .usage = "",
1870  },
1872 };
1873 
1879 static int ch347_init(void)
1880 {
1881  int retval = ch347_open_device();
1882 
1883  if (retval != ERROR_OK) {
1884  LOG_ERROR("CH347 open error");
1885  return retval;
1886  }
1887 
1888  LOG_DEBUG_IO("CH347 open success");
1889 
1890  // CH347 JTAG init
1891  ch347.tck_pin = TCK_L;
1892  ch347.tms_pin = TMS_H;
1893  ch347.tdi_pin = TDI_L;
1894  ch347.trst_pin = TRST_H;
1897 
1898  ch347.pack_size = UNSET;
1899 
1900  if (!swd_mode) {
1902  } else {
1903  retval = ch347_init_pack_size();
1904  if (retval != ERROR_OK)
1905  return retval;
1906 
1907  retval = ch347_swd_init_cmd(1);
1908  }
1909  return retval;
1910 }
1911 
1917 static int ch347_swd_init(void)
1918 {
1919  LOG_INFO("CH347 SWD mode enabled");
1920  swd_mode = true;
1921  memset(&ch347_swd_context, 0, sizeof(ch347_swd_context));
1922 
1925 
1927  // 0XE8 + 2byte len + N byte cmds
1929  // 0XE8 + 2byte len + N byte ack + data
1931  struct ch347_swd_io *pswd_io = ch347_swd_context.ch347_cmd_buf;
1932  for (int i = 0; i < CH347_MAX_CMD_BUF; i++, pswd_io++) {
1933  INIT_LIST_HEAD(&pswd_io->list_entry);
1935  }
1936  return ERROR_OK;
1937 }
1938 
1940 {
1941  struct ch347_swd_io *pswd_io;
1943  return NULL;
1944 
1946  struct ch347_swd_io, list_entry);
1947  list_del_init(&pswd_io->list_entry);
1948  pswd_io->cmd = 0;
1949  pswd_io->usb_cmd = CH347_CMD_SWD_SEQ_W;
1950  pswd_io->dst = NULL;
1951  return pswd_io;
1952 }
1953 
1954 static int ch347_swd_queue_flush(void)
1955 {
1960  if (retval != ERROR_OK) {
1962  LOG_DEBUG("CH347WriteData error");
1963  return retval;
1964  }
1965 
1969  if (retval != ERROR_OK) {
1971  LOG_DEBUG("CH347ReadData error");
1972  return retval;
1973  }
1974 
1977  LOG_ERROR("write/read failed %d %d",
1980  retval = ERROR_FAIL;
1981  }
1982 
1983  return retval;
1984 }
1985 
1986 static void ch347_write_swd_reg(uint8_t cmd, const uint32_t out)
1987 {
1989  // 8bit + 32bit +1bit
1996  // 0xA0 + 1 byte(3bit ACK)
1997  ch347_swd_context.need_recv_len += (1 + 1);
1999 }
2000 
2001 static void ch347_write_spec_seq(const uint8_t *out, uint8_t out_len)
2002 {
2007  for (uint8_t i = 0; i < DIV_ROUND_UP(out_len, 8); i++)
2008  ch347_swd_context.send_buf[ch347_swd_context.send_len++] = out ? out[i] : 0x00;
2009  ch347_swd_context.need_recv_len += 1; // 0xA1
2010  ch347_swd_context.total_swd_clk += out_len;
2011 }
2012 
2013 static void ch347_read_swd_reg(uint8_t cmd)
2014 {
2019  // 0xA2 + 1 byte(3bit ACK) + 4 byte(data) + 1 byte(1bit parity+1bit trn)
2020  ch347_swd_context.need_recv_len += 1 + 1 + 4 + 1;
2022 }
2023 
2024 static int ch347_swd_switch_out(enum swd_special_seq seq, const uint8_t *out, unsigned int out_len)
2025 {
2026  if ((ch347_swd_context.send_len + (1 + 2 + DIV_ROUND_UP(out_len, 8))) > CH347_MAX_SEND_BUF)
2027  return ERROR_FAIL;
2029  return ERROR_FAIL;
2030 
2031  struct ch347_swd_io *pswd_io = ch347_get_one_swd_io();
2032  if (pswd_io) {
2033  ch347_write_spec_seq(out, out_len);
2035  return ERROR_OK;
2036  } else {
2037  return ERROR_FAIL;
2038  }
2039 }
2040 
2041 // check read/write REG can fill in remaining buff
2042 static bool ch347_chk_buf_size(uint8_t cmd, uint32_t ap_delay_clk)
2043 {
2044  bool flush = false;
2045  int send_len = ch347_swd_context.send_len;
2046  int recv_len = ch347_swd_context.need_recv_len;
2047  int len;
2048  do {
2049  if (cmd & SWD_CMD_RNW) {
2050  len = 1 + 1 + 1 + 1; // 0xA2 + len + rev + cmd
2051  if (send_len + len > CH347_MAX_SEND_BUF)
2052  break;
2053  send_len += len;
2054  len = 1 + 1 + 4 + 1;
2055  /* 0xA2 + 1byte(3bit ack) + 4byte(data) +
2056  1byte(1bit parity+1bit trn) */
2057  if (recv_len + len > CH347_MAX_RECV_BUF)
2058  break;
2059  recv_len += len;
2060  } else { // write reg
2061  len = 1 + 1 + 1 + 1 + 4 + 1;
2062  // 0xA0 + len + rev + cmd +data + parity
2063  if (send_len + len > CH347_MAX_SEND_BUF)
2064  break;
2065  send_len += len;
2066  len = 1 + 1; // 0xA0 + 1byte(3bit ack)
2067  if (recv_len + len > CH347_MAX_RECV_BUF)
2068  break;
2069  recv_len += len;
2070  }
2071  if (cmd & SWD_CMD_APNDP) {
2072  len = 1 + 1 + 1 + DIV_ROUND_UP(ap_delay_clk, 8);
2073  // 0xA1 + Len + rev + n byte(delay)
2074  if (send_len + len > CH347_MAX_SEND_BUF)
2075  break;
2076  len = 1; // 0xA1
2077  if ((recv_len + len) > CH347_MAX_RECV_BUF)
2078  break;
2079  }
2080  // swd packet requests
2081  flush = true;
2082  } while (false);
2083 
2084  return flush;
2085 }
2086 
2087 static int ch347_swd_run_queue_inner(void);
2088 
2089 static int ch347_swd_send_idle(uint32_t ap_delay_clk)
2090 {
2091  bool run_q = false;
2092  struct ch347_swd_io *pswd_io = NULL;
2093  unsigned int max_processing_clk = ch347_swd_context.clk_divisor
2096  bool more_q_runs =
2097  1 + 1 + 1 + DIV_ROUND_UP(ap_delay_clk, 8) > CH347_MAX_SEND_BUF
2098  && ap_delay_clk > max_processing_clk;
2099 
2101  unsigned int expected_total_clk = ch347_swd_context.total_swd_clk + ap_delay_clk;
2102  unsigned int expected_send_len = ch347_swd_context.send_len
2103  + 1 + 1 + 1 + DIV_ROUND_UP(ap_delay_clk, 8);
2104  // 0xA1 + Len + rev + n byte(delay)
2105  unsigned int expected_recv_len = ch347_swd_context.need_recv_len + 1;
2106  // 0xA1
2107  unsigned int expected_time = ch347_swd_context.clk_divisor
2108  ? expected_total_clk * ch347_swd_context.clk_divisor
2109  : expected_total_clk / 5;
2110  if (expected_time > CH347_MAX_PROCESSING_US
2111  || expected_send_len > CH347_MAX_SEND_BUF
2112  || expected_recv_len > CH347_MAX_RECV_BUF) {
2113  int send_room = CH347_MAX_SEND_BUF - ch347_swd_context.send_len - 1 - 1 - 1;
2114  if (more_q_runs
2115  && send_room > 0
2116  && expected_recv_len <= CH347_MAX_RECV_BUF
2117  && ch347_swd_context.total_swd_clk < max_processing_clk) {
2118  pswd_io = ch347_get_one_swd_io();
2119  if (pswd_io) {
2120  // fill the rest of queue/time by part of delay
2121  unsigned int this_delay_clk = MIN(ap_delay_clk, 255);
2122  if ((unsigned int)send_room * 8 < this_delay_clk)
2123  this_delay_clk = send_room * 8;
2124  if (max_processing_clk - ch347_swd_context.total_swd_clk < this_delay_clk)
2125  this_delay_clk = max_processing_clk - ch347_swd_context.total_swd_clk;
2126  LOG_DEBUG_IO("partial delay %u clk", this_delay_clk);
2127  ch347_write_spec_seq(NULL, this_delay_clk);
2129  ap_delay_clk -= this_delay_clk;
2130  }
2131  }
2132  run_q = true;
2133  }
2134  }
2135 
2136  do {
2137  if (!run_q)
2138  pswd_io = ch347_get_one_swd_io();
2139 
2140  if (!pswd_io) {
2141  int retval = ch347_swd_run_queue_inner();
2142  if (retval != ERROR_OK)
2143  return retval;
2144 
2145  pswd_io = ch347_get_one_swd_io();
2146  if (!pswd_io) {
2147  LOG_ERROR("ch347 SWD queue not empty after ch347_swd_run_queue");
2149  return ERROR_FAIL;
2150  }
2151  }
2152 
2153  unsigned int send_room = CH347_MAX_SEND_BUF - 1 - 1 - 1;
2154  unsigned int this_delay_clk = MIN(ap_delay_clk, 255);
2155  if (send_room * 8 < this_delay_clk)
2156  this_delay_clk = send_room * 8;
2157  if (max_processing_clk < this_delay_clk)
2158  this_delay_clk = max_processing_clk;
2159  LOG_DEBUG_IO("delay %u clk", this_delay_clk);
2160  ch347_write_spec_seq(NULL, this_delay_clk);
2162  ap_delay_clk -= this_delay_clk;
2163  run_q = true;
2164  pswd_io = NULL;
2165  } while (ap_delay_clk);
2166  return ERROR_OK;
2167 }
2168 
2170 {
2171  LOG_DEBUG_IO("Executing %u queued transactions", ch347_swd_context.sent_cmd_count);
2173  LOG_DEBUG_IO("Skipping due to previous errors: %d", ch347_swd_context.queued_retval);
2174  goto skip;
2175  }
2176 
2177  int retval = ch347_swd_queue_flush();
2178  if (retval != ERROR_OK)
2179  return retval;
2180 
2182  LOG_ERROR("CH347 usb write/read failed - queued_retval");
2183  goto skip;
2184  }
2185  uint8_t *recv_buf = ch347_swd_context.recv_buf;
2186  int recv_len = 0;
2187  if (recv_buf[recv_len++] != CH347_CMD_SWD) { // 0XE8
2189  LOG_ERROR("CH347 usb write/read failed - not CH347_CMD_SWD");
2190  goto skip;
2191  }
2192 
2193  int cmds_len = le_to_h_u16(&recv_buf[recv_len]);
2194  recv_len += 2; // cmds_len
2195  if ((cmds_len + CH347_CMD_HEADER) > ch347_swd_context.recv_len) {
2197  LOG_ERROR("CH347 usb write/read failed - too long");
2198  goto skip;
2199  }
2200 
2201  struct list_head *tmp;
2202  struct list_head *pos;
2203  struct ch347_swd_io *pswd_io;
2204 
2206  pswd_io = list_entry(pos, struct ch347_swd_io, list_entry);
2207  if (pswd_io->usb_cmd == CH347_CMD_SWD_SEQ_W) {
2208  if (recv_buf[recv_len++] != CH347_CMD_SWD_SEQ_W) {
2210  LOG_ERROR("CH347 usb write/read failed - not CH347_CMD_SWD_SEQ_W");
2211  goto skip;
2212  }
2213  } else { // read/write Reg
2214  uint32_t ack;
2215  bool check_ack;
2216  // read Reg
2217  if (recv_buf[recv_len] == CH347_CMD_SWD_REG_R) {
2218  recv_len++;
2219  ack = buf_get_u32(&recv_buf[recv_len++], 0, 3);
2220  /* Devices do not reply to DP_TARGETSEL write
2221  cmd, ignore received ack */
2222  check_ack = swd_cmd_returns_ack(pswd_io->cmd);
2223  if (pswd_io->cmd & SWD_CMD_RNW) {
2224  uint32_t data = buf_get_u32(&recv_buf[recv_len], 0, 32);
2225 
2226  LOG_CUSTOM_LEVEL((check_ack && ack != SWD_ACK_OK)
2228  "%s%s %s read reg %X = %08" PRIx32,
2229  check_ack ? "" : "ack ignored ",
2230  ack == SWD_ACK_OK ? "OK" :
2231  ack == SWD_ACK_WAIT ? "WAIT" :
2232  ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
2233  pswd_io->cmd & SWD_CMD_APNDP ? "AP" : "DP",
2234  (pswd_io->cmd & SWD_CMD_A32) >> 1,
2235  data);
2236 
2237  if (ack != SWD_ACK_OK && check_ack) {
2239  goto skip;
2240  }
2241 
2242  uint32_t parity = buf_get_u32(&recv_buf[recv_len], 32, 1);
2243  if (parity != (uint32_t)parity_u32(data)) {
2244  LOG_ERROR("SWD Read data parity mismatch");
2246  goto skip;
2247  }
2248 
2249  if (pswd_io->dst)
2250  *pswd_io->dst = data;
2251  } else {
2253  LOG_ERROR("CH347 usb write/read failed - not SWD_CMD_RNW");
2254  goto skip;
2255  }
2256  recv_len += 5;
2257  } else if (recv_buf[recv_len] == CH347_CMD_SWD_REG_W) {
2258  recv_len++;
2259  ack = buf_get_u32(&recv_buf[recv_len++], 0, 3);
2260  /* Devices do not reply to DP_TARGETSEL write
2261  cmd, ignore received ack */
2262  check_ack = swd_cmd_returns_ack(pswd_io->cmd);
2263 
2264  LOG_CUSTOM_LEVEL((check_ack && ack != SWD_ACK_OK)
2266  "%s%s %s write reg %X = %08" PRIx32,
2267  check_ack ? "" : "ack ignored ",
2268  ack == SWD_ACK_OK ? "OK" :
2269  ack == SWD_ACK_WAIT ? "WAIT" :
2270  ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
2271  pswd_io->cmd & SWD_CMD_APNDP ? "AP" : "DP",
2272  (pswd_io->cmd & SWD_CMD_A32) >> 1,
2273  pswd_io->value);
2274 
2275  if (ack != SWD_ACK_OK && check_ack) {
2277  goto skip;
2278  }
2279  } else {
2281  LOG_ERROR("CH347 usb write/read failed recv_len = %d", recv_len);
2282  goto skip;
2283  }
2284  }
2285  list_del_init(&pswd_io->list_entry);
2286  list_add_tail(&pswd_io->list_entry,
2288  }
2289 
2290 skip:
2293  pswd_io = list_entry(pos, struct ch347_swd_io, list_entry);
2294  list_del_init(&pswd_io->list_entry);
2295  list_add_tail(&pswd_io->list_entry,
2297  }
2298  }
2299 
2300  // 0xE8 + 2byte len
2302  // 0xE8 + 2byte len
2309  return retval;
2310 }
2311 
2312 static int ch347_swd_run_queue(void)
2313 {
2314  /* A transaction must be followed by another transaction or at least 8
2315  idle cycles to ensure that data is clocked through the AP. */
2316  int retval = ch347_swd_send_idle(8);
2317  if (retval != ERROR_OK)
2318  return retval;
2319 
2320  return ch347_swd_run_queue_inner();
2321 }
2322 
2323 static int ch347_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint32_t ap_delay_clk)
2324 {
2325  int retval = ERROR_OK;
2326  bool run_q = false;
2328  unsigned int expected_total_clk = ch347_swd_context.total_swd_clk
2329  + 46 // SWD transaction
2330  + ap_delay_clk
2331  + 8; // 8 idle cycles at the end of queue
2332  unsigned int expected_time = ch347_swd_context.clk_divisor
2333  ? expected_total_clk * ch347_swd_context.clk_divisor
2334  : expected_total_clk / 5;
2335  if (expected_time > CH347_MAX_PROCESSING_US) {
2336  LOG_DEBUG_IO("Expected queue run %u cycles, with this cmd %u",
2337  ch347_swd_context.total_swd_clk, expected_total_clk);
2338  run_q = true;
2339  } else if (!ch347_chk_buf_size(cmd, ap_delay_clk)) {
2340  run_q = true;
2341  }
2342  }
2343 
2344  struct ch347_swd_io *pswd_io = NULL;
2345  if (!run_q)
2346  pswd_io = ch347_get_one_swd_io();
2347 
2348  if (!pswd_io) {
2349  retval = ch347_swd_run_queue_inner();
2350  if (retval != ERROR_OK)
2351  return retval;
2352 
2353  pswd_io = ch347_get_one_swd_io();
2354  if (!pswd_io) {
2355  LOG_ERROR("ch347 SWD queue not empty after ch347_swd_run_queue");
2357  return ERROR_FAIL;
2358  }
2359  }
2360 
2361  pswd_io->cmd = cmd | SWD_CMD_START | SWD_CMD_PARK;
2362 
2363  if (pswd_io->cmd & SWD_CMD_RNW) {
2364  pswd_io->usb_cmd = CH347_CMD_SWD_REG_R;
2365  pswd_io->dst = dst;
2366  ch347_read_swd_reg(pswd_io->cmd);
2367  } else {
2368  pswd_io->usb_cmd = CH347_CMD_SWD_REG_W;
2369  pswd_io->value = data;
2370  ch347_write_swd_reg(pswd_io->cmd, data);
2371  }
2372 
2375 
2376  // Insert idle cycles after AP accesses to avoid WAIT
2377  if (ap_delay_clk)
2378  retval = ch347_swd_send_idle(ap_delay_clk);
2379 
2380  return retval;
2381 }
2382 
2384 {
2385  switch (seq) {
2386  case LINE_RESET:
2387  LOG_DEBUG("SWD line reset");
2389  case JTAG_TO_SWD:
2390  LOG_DEBUG("JTAG-to-SWD");
2392  case JTAG_TO_DORMANT:
2393  LOG_DEBUG("JTAG-to-DORMANT");
2395  case SWD_TO_JTAG:
2396  LOG_DEBUG("SWD-to-JTAG");
2398  case SWD_TO_DORMANT:
2399  LOG_DEBUG("SWD-to-DORMANT");
2401  case DORMANT_TO_SWD:
2402  LOG_DEBUG("DORMANT-to-SWD");
2404  case DORMANT_TO_JTAG:
2405  LOG_DEBUG("DORMANT-to-JTAG");
2407  default:
2408  LOG_ERROR("Sequence %d not supported", seq);
2409  return ERROR_FAIL;
2410  }
2411 }
2412 
2413 static void ch347_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
2414 {
2415  assert(cmd & SWD_CMD_RNW);
2416  int retval = ch347_swd_queue_cmd(cmd, value, 0, ap_delay_clk);
2417  if (retval != ERROR_OK)
2419 }
2420 
2421 static void ch347_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
2422 {
2423  assert(!(cmd & SWD_CMD_RNW));
2424  int retval = ch347_swd_queue_cmd(cmd, NULL, value, ap_delay_clk);
2425  if (retval != ERROR_OK)
2427 }
2428 
2429 static const struct swd_driver ch347_swd = {
2430  .init = ch347_swd_init,
2431  .switch_seq = ch347_swd_switch_seq,
2432  .read_reg = ch347_swd_read_reg,
2433  .write_reg = ch347_swd_write_reg,
2434  .run = ch347_swd_run_queue,
2435 };
2436 
2437 static struct jtag_interface ch347_interface = {
2439  .execute_queue = ch347_execute_queue,
2440 };
2441 
2443  .name = "ch347",
2444  .transport_ids = TRANSPORT_JTAG | TRANSPORT_SWD,
2445  .transport_preferred_id = TRANSPORT_JTAG,
2446  .commands = ch347_command_handlers,
2447 
2448  .init = ch347_init,
2449  .quit = ch347_quit,
2450  .reset = ch347_reset,
2451  .speed = ch347_speed_set,
2452  .khz = ch347_speed_get_index,
2453  .speed_div = ch347_speed_get,
2454 
2455  .jtag_ops = &ch347_interface,
2456  .swd_ops = &ch347_swd,
2457 };
struct adapter_gpio_config gpios[ADAPTER_GPIO_IDX_NUM]
Definition: adapter.c:47
#define SWD_ACK_FAULT
Definition: arm_adi_v5.h:33
swd_special_seq
Definition: arm_adi_v5.h:236
@ DORMANT_TO_JTAG
Definition: arm_adi_v5.h:243
@ JTAG_TO_SWD
Definition: arm_adi_v5.h:238
@ DORMANT_TO_SWD
Definition: arm_adi_v5.h:242
@ LINE_RESET
Definition: arm_adi_v5.h:237
@ JTAG_TO_DORMANT
Definition: arm_adi_v5.h:239
@ SWD_TO_DORMANT
Definition: arm_adi_v5.h:241
@ SWD_TO_JTAG
Definition: arm_adi_v5.h:240
#define SWD_ACK_WAIT
Definition: arm_adi_v5.h:32
#define SWD_ACK_OK
Definition: arm_adi_v5.h:31
enum arm_mode mode
Definition: armv4_5.c:281
static const struct device_t * device
Definition: at91rm9200.c:94
char * buf_to_hex_str(const void *_buf, unsigned int buf_len)
Definition: binarybuffer.c:178
void * buf_set_buf(const void *_src, unsigned int src_start, void *_dst, unsigned int dst_start, unsigned int len)
Definition: binarybuffer.c:120
void * buf_cpy(const void *from, void *_to, unsigned int size)
Copies size bits out of from and into to.
Definition: binarybuffer.c:43
size_t hexify(char *hex, const uint8_t *bin, size_t count, size_t length)
Convert binary data into a string of hexadecimal pairs.
Definition: binarybuffer.c:380
Support functions to access arbitrary bits in a byte array.
static uint32_t buf_get_u32(const uint8_t *_buffer, unsigned int first, unsigned int num)
Retrieves num bits from _buffer, starting at the first bit, returning the bits in a 32-bit word.
Definition: binarybuffer.h:104
static int ch347_scratchpad_add_idle_clock(void)
Function to ensure that the clock is in a low state.
Definition: ch347.c:1007
static int ch347_scratchpad_add_move_state(enum tap_state state, int skip)
Toggle the tap state to the target state.
Definition: ch347.c:1078
static int ch347_cmd_from_scratchpad(void)
copy the scratchpad content into a new command in the command queue
Definition: ch347.c:487
struct adapter_driver ch347_adapter_driver
Definition: ch347.c:2442
static int ch347_scratchpad_add_bytes(uint8_t *bytes, int count)
adds bytes from a buffer to the scratchpad if scratchpad is full after this byte the command will be ...
Definition: ch347.c:930
#define CH347_MAX_CMD_BUF
Definition: ch347.c:122
static int ch347_init_pack_size(void)
inits ch347.pack_size and ch347.max_len
Definition: ch347.c:1676
#define TDI_L
Definition: ch347.c:65
static int ch347_swd_switch_out(enum swd_special_seq seq, const uint8_t *out, unsigned int out_len)
Definition: ch347.c:2024
#define HW_TDO_BUF_SIZE
Definition: ch347.c:87
static int ch347_read_data(uint8_t *data, int *length)
reads data from the CH347 via libusb driver
Definition: ch347.c:411
static int ch347_scan_data_to_fields(uint8_t *decoded_buf, int decoded_buf_len)
Used to put the data from the decoded buffer into the scan command fields.
Definition: ch347.c:598
#define CH347_CMD_SWD
Definition: ch347.c:114
static const int ch347_larger_pack_clock_speeds[]
Definition: ch347.c:175
#define CH347_EPOUT
Definition: ch347.c:128
static void ch347_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
Definition: ch347.c:2413
static int ch347_quit(void)
CH347 Device Release Function.
Definition: ch347.c:1547
#define CH347F_MPHSI_INTERFACE
Definition: ch347.c:131
#define DEFAULT_CH347F_PRODUCT_ID
Definition: ch347.c:140
static struct ch347_swd_io * ch347_get_one_swd_io(void)
Definition: ch347.c:1939
#define CH347_MAX_PROCESSING_US
Definition: ch347.c:118
static int ch347_scratchpad_add_move_path(struct pathmove_command *cmd)
Obtain the current Tap status and switch to the status TMS value passed down by cmd.
Definition: ch347.c:1044
#define CH347_SWD_CLOCK_MAX
Definition: ch347.c:123
#define DEFAULT_OTHER_PRODUCT_ID
Definition: ch347.c:141
#define CH347_CMD_INIT_GET_MODE_CLOCK_INDEX_VALUE
Definition: ch347.c:96
#define CH347_EPIN
Definition: ch347.c:129
static void ch347_cmd_calc_reads(struct ch347_cmd *cmd)
calculates the amount of bits and bytes that should be read for this command
Definition: ch347.c:447
static uint16_t custom_ch347_vids[]
Definition: ch347.c:257
#define VENDOR_VERSION
Definition: ch347.c:84
#define TMS_L
Definition: ch347.c:67
#define TMS_H
Definition: ch347.c:66
#define TDI_H
Definition: ch347.c:64
static const struct command_registration ch347_command_handlers[]
Definition: ch347.c:1863
#define DEFAULT_VENDOR_ID
Definition: ch347.c:138
static void ch347_write_swd_reg(uint8_t cmd, const uint32_t out)
Definition: ch347.c:1986
#define CH347_CMD_JTAG_INIT
Definition: ch347.c:104
static int ch347_cmd_start_next(uint8_t type)
starts the next command in the scratchpad.
Definition: ch347.c:792
#define CH347_SWD_CLOCK_BASE
Definition: ch347.c:124
#define USB_READ_TIMEOUT
Definition: ch347.c:133
#define CH347_MAX_SEND_BUF
Definition: ch347.c:120
static bool ch347_is_single_cmd_type(uint8_t type)
Definition: ch347.c:267
static bool swd_mode
Definition: ch347.c:253
#define CH347_CMD_INIT_READ_LEN
Definition: ch347.c:94
static int ch347_swd_run_queue(void)
Definition: ch347.c:2312
#define USEABLE_GPIOS
Definition: ch347.c:78
static const struct swd_driver ch347_swd
Definition: ch347.c:2429
#define CH347_SINGLE_CMD_MAX_READ
Definition: ch347.c:110
static int ch347_speed_get_index(int khz, int *speed_idx)
multiplies the input speed by 1000
Definition: ch347.c:1728
#define TCK_H
Definition: ch347.c:68
static int ch347_adapter_set_speed(uint8_t clock_index)
Sends the CH347_CMD_JTAG_INIT (D0) command to get the JTAG interface initialized with the speed index...
Definition: ch347.c:1617
static int ch347_open_device(void)
opens the CH347 device via libusb driver
Definition: ch347.c:1424
static int ch347_scratchpad_add_stableclocks(int count)
Function adds a certain amount of TCK pulses without changing the TMS pin.
Definition: ch347.c:982
#define GPIO_SET_H
Definition: ch347.c:82
static int ch347_scratchpad_add_byte(uint8_t byte)
adds one byte to the scratchpad if scratchpad is full after this byte the command will be created fro...
Definition: ch347.c:896
static int ch347_execute_queue(struct jtag_command *cmd_queue)
Executes the command queue.
Definition: ch347.c:1369
static int ch347_swd_send_idle(uint32_t ap_delay_clk)
Definition: ch347.c:2089
#define TRST_L
Definition: ch347.c:71
#define LED_OFF
Definition: ch347.c:73
static int ch347_cmd_transmit_queue(void)
Sends the write buffer via libusb and if LARGER_PACK mode is active read also data back.
Definition: ch347.c:660
static void log_buf_dump(const uint8_t *data, unsigned int size, bool recv)
Definition: ch347.c:272
static int ch347_activity_led_set(int led_state)
Turn the activity LED on or off.
Definition: ch347.c:1303
#define CH347_CMD_SWD_INIT
Definition: ch347.c:113
static int ch347_gpio_set(int gpio, bool data)
Sets a GPIO bit.
Definition: ch347.c:1267
static int ch347_swd_queue_flush(void)
Definition: ch347.c:1954
static int ch347_scratchpad_add_pin_byte(void)
adds the output pin byte to the scratchpad if scratchpad is full after this byte the command will be ...
Definition: ch347.c:915
static void ch347_write_spec_seq(const uint8_t *out, uint8_t out_len)
Definition: ch347.c:2001
static struct libusb_device_handle * ch347_handle
Definition: ch347.c:263
#define UCMDPKT_DATA_MAX_BYTES_USBHS
Definition: ch347.c:91
static uint16_t default_ch347_pids[]
Definition: ch347.c:255
static uint16_t custom_ch347_pids[]
Definition: ch347.c:258
static int ch347_scan_queue_fields(struct scan_field *scan_fields, int scan_fields_len)
queue the scan fields into the scan queue
Definition: ch347.c:835
static int ch347_scratchpad_add_run_test(int cycles, enum tap_state state)
Toggle the Tap state to run test/idle.
Definition: ch347.c:1199
#define CH347_MAX_RECV_BUF
Definition: ch347.c:121
static int ch347_speed_get(int speed_idx, int *khz)
returns the speed in kHz by the give speed index
Definition: ch347.c:1702
#define CH347_CMD_GPIO
Definition: ch347.c:103
static int ch347_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint32_t ap_delay_clk)
Definition: ch347.c:2323
static int ch347_swd_switch_seq(enum swd_special_seq seq)
Definition: ch347.c:2383
static struct jtag_interface ch347_interface
Definition: ch347.c:2437
ch347_variant
Definition: ch347.c:148
@ CH347F
Definition: ch347.c:150
@ OTHER_PRODUCT_ID
Definition: ch347.c:151
@ CH347T
Definition: ch347.c:149
static bool ch347_chk_buf_size(uint8_t cmd, uint32_t ap_delay_clk)
Definition: ch347.c:2042
static int ch347_scratchpad_add_write_read(struct scan_command *cmd, uint8_t *bits, int bits_len, enum scan_type scan)
CH347 Batch read/write function.
Definition: ch347.c:1104
#define USB_WRITE_TIMEOUT
Definition: ch347.c:132
static int ch347_write_data(uint8_t *data, int *length)
writes data to the CH347 via libusb driver
Definition: ch347.c:375
static struct ch347_info ch347
Definition: ch347.c:262
#define CH347_SWD_CLOCK_MAX_DIVISOR
Definition: ch347.c:126
#define DEFAULT_CH347T_PRODUCT_ID
Definition: ch347.c:139
#define CH347_CMD_JTAG_DATA_SHIFT
Definition: ch347.c:107
static int ch347_read_scan(uint8_t *decoded_buf, int decoded_buf_len, int raw_read_len)
Reads data back from CH347 and decode it byte- and bitwise into the buffer.
Definition: ch347.c:525
#define CH347_CMD_SWD_REG_R
Definition: ch347.c:117
static uint8_t ch347_activity_led_gpio_pin
Definition: ch347.c:260
static int ch347_scratchpad_add_tms_change(const uint8_t *tms_value, int step, int skip)
Function that performs state switching by changing the value of TMS.
Definition: ch347.c:1021
static int ch347_swd_init(void)
Initialization for the swd mode.
Definition: ch347.c:1917
static int ch347_single_read_get_byte(int read_buf_idx, uint8_t *byte)
Function executes the single command and deliver one byte from the buffer that's read back from USB.
Definition: ch347.c:858
#define TCK_L
Definition: ch347.c:69
#define CH347T_MPHSI_INTERFACE
Definition: ch347.c:130
#define GPIO_CNT
Definition: ch347.c:74
#define TRST_H
Definition: ch347.c:70
#define GPIO_SET_L
Definition: ch347.c:81
static int ch347_sleep(int us)
Flushes the command buffer and sleeps for a specific timespan.
Definition: ch347.c:1356
static void ch347_read_swd_reg(uint8_t cmd)
Definition: ch347.c:2013
#define CH347_CMD_JTAG_BIT_OP
Definition: ch347.c:105
static int ch347_adapter_supports_larger_pack_mode(bool *supports_larger_pack_mode)
Sends the CH347_CMD_JTAG_INIT (D0) command to ask the JTAG interface with special clock index 9 for t...
Definition: ch347.c:1605
static int ch347_init(void)
CH347 Initialization function.
Definition: ch347.c:1879
static int ch347_adapter_init(uint8_t clock_index, bool *supports_larger_pack_mode)
Sends the CH347_CMD_JTAG_INIT (D0) command to get the JTAG interface initialized with the speed index...
Definition: ch347.c:1568
#define LARGER_PACK_MAX_SIZE
Definition: ch347.c:89
#define CH347_CMD_HEADER
Definition: ch347.c:93
static const int ch347_standard_pack_clock_speeds[]
Definition: ch347.c:165
static uint16_t default_ch347_vids[]
Definition: ch347.c:254
static int ch347_scratchpad_add_clock_tms(bool tms)
Function used to change the TMS value at the rising edge of TCK to switch its TAP state.
Definition: ch347.c:964
static int ch347_swd_run_queue_inner(void)
Definition: ch347.c:2169
#define CH347_CMD_SWD_SEQ_W
Definition: ch347.c:116
#define CH347_CMD_SWD_REG_W
Definition: ch347.c:115
static const struct command_registration ch347_subcommand_handlers[]
Definition: ch347.c:1838
static void ch347_scratchpad_check_full(void)
checks if the scratchpad is full.
Definition: ch347.c:878
static void ch347_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
Definition: ch347.c:2421
pack_size
Definition: ch347.c:158
@ STANDARD_PACK
Definition: ch347.c:160
@ LARGER_PACK
Definition: ch347.c:161
@ UNSET
Definition: ch347.c:159
static int ch347_swd_init_cmd(uint8_t clock_divisor)
swd init function
Definition: ch347.c:1629
#define CH347_CMD_JTAG_BIT_OP_RD
Definition: ch347.c:106
static int ch347_speed_set(int speed_index)
Initializes the JTAG interface and set CH347 TCK frequency.
Definition: ch347.c:1657
#define BYTEWISE_MODE_VERSION
Definition: ch347.c:135
#define USBC_PACKET_USBHS
Definition: ch347.c:92
static int ch347_reset(int trst, int srst)
Control (assert/deassert) the signals SRST and TRST on the interface.
Definition: ch347.c:1320
static int ch347_scratchpad_add_scan(struct scan_command *cmd)
Switch to SHIFT-DR or SHIFT-IR status for scanning.
Definition: ch347.c:1222
#define MAX_BITS_PER_BIT_OP
Definition: ch347.c:98
#define LED_ON
Definition: ch347.c:72
COMMAND_HANDLER(ch347_handle_vid_pid_command)
The command handler for setting the device usb vid/pid.
Definition: ch347.c:1784
static bool ch347_activity_led_active_high
Definition: ch347.c:261
static char * ch347_device_desc
Definition: ch347.c:259
#define CH347_CMD_JTAG_DATA_SHIFT_RD
Definition: ch347.c:108
#define CMD_ARGV
Use this macro to access the arguments for the command being handled, rather than accessing the varia...
Definition: command.h:156
#define ERROR_COMMAND_SYNTAX_ERROR
Definition: command.h:400
#define CMD_ARGC
Use this macro to access the number of arguments for the command being handled, rather than accessing...
Definition: command.h:151
#define COMMAND_PARSE_NUMBER(type, in, out)
parses the string in into out as a type, or prints a command error and passes the error code to the c...
Definition: command.h:440
#define COMMAND_REGISTRATION_DONE
Use this as the last entry in an array of command_registration records.
Definition: command.h:251
#define ERROR_COMMAND_ARGUMENT_INVALID
Definition: command.h:402
@ COMMAND_CONFIG
Definition: command.h:41
@ COMMAND_ANY
Definition: command.h:42
int jtag_build_buffer(const struct scan_command *cmd, uint8_t **buffer)
Definition: commands.c:192
enum scan_type jtag_scan_type(const struct scan_command *cmd)
Definition: commands.c:167
scan_type
The inferred type of a scan_command structure, indicating whether the command has the host scan in fr...
Definition: commands.h:22
@ SCAN_IN
From device to host,.
Definition: commands.h:24
@ SCAN_IO
Full-duplex scan.
Definition: commands.h:28
@ JTAG_TLR_RESET
Definition: commands.h:137
@ JTAG_SCAN
Definition: commands.h:129
@ JTAG_PATHMOVE
Definition: commands.h:140
@ JTAG_STABLECLOCKS
Definition: commands.h:142
@ JTAG_RUNTEST
Definition: commands.h:138
@ JTAG_SLEEP
Definition: commands.h:141
@ JTAG_TMS
Definition: commands.h:143
uint32_t size
Size of dw_spi_transaction::buffer.
Definition: dw-spi-helper.h:4
uint8_t type
Definition: esp_usb_jtag.c:0
uint8_t length
Definition: esp_usb_jtag.c:1
enum tap_state tap_state_transition(enum tap_state cur_state, bool tms)
Function tap_state_transition takes a current TAP state and returns the next state according to the t...
Definition: interface.c:223
const char * tap_state_name(enum tap_state state)
Function tap_state_name Returns a string suitable for display representing the JTAG tap_state.
Definition: interface.c:344
int tap_get_tms_path_len(enum tap_state from, enum tap_state to)
Function int tap_get_tms_path_len returns the total number of bits that represents a TMS path transit...
Definition: interface.c:195
enum tap_state tap_get_state(void)
This function gets the state of the "state follower" which tracks the state of the TAPs connected to ...
Definition: interface.c:37
int tap_get_tms_path(enum tap_state from, enum tap_state to)
This function provides a "bit sequence" indicating what has to be done with TMS during a sequence of ...
Definition: interface.c:190
#define DEBUG_CAP_TMS_SEQ
Definition: interface.h:188
#define tap_set_state(new_state)
This function sets the state of a "state follower" which tracks the state of the TAPs connected to th...
Definition: interface.h:50
void jtag_sleep(uint32_t us)
Definition: jtag/core.c:1075
tap_state
Defines JTAG Test Access Port states.
Definition: jtag.h:37
@ TAP_RESET
Definition: jtag.h:56
@ TAP_IRSHIFT
Definition: jtag.h:51
@ TAP_IDLE
Definition: jtag.h:53
@ TAP_DRSHIFT
Definition: jtag.h:43
#define ERROR_JTAG_TRANSITION_INVALID
Definition: jtag.h:560
static struct scan_blk scan
Definition: lakemont.c:60
int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[], const char *product, struct libusb_device_handle **out, adapter_get_alternate_serial_fn adapter_get_alternate_serial)
int jtag_libusb_bulk_write(struct libusb_device_handle *dev, int ep, char *bytes, int size, int timeout, int *transferred)
int jtag_libusb_control_transfer(struct libusb_device_handle *dev, uint8_t request_type, uint8_t request, uint16_t value, uint16_t index, char *bytes, uint16_t size, unsigned int timeout, int *transferred)
void jtag_libusb_close(struct libusb_device_handle *dev)
int jtag_libusb_bulk_read(struct libusb_device_handle *dev, int ep, char *bytes, int size, int timeout, int *transferred)
#define list_first_entry(ptr, type, member)
Definition: list.h:131
static void list_add_tail(struct list_head *new, struct list_head *head)
Definition: list.h:203
static int list_empty(const struct list_head *head)
Definition: list.h:61
#define list_for_each_entry_safe(p, n, h, field)
Definition: list.h:159
#define list_for_each_entry(p, h, field)
Definition: list.h:155
static void list_del(struct list_head *entry)
Definition: list.h:88
#define list_entry(ptr, type, field)
Definition: list.h:129
#define list_for_each_safe(p, n, head)
Definition: list.h:152
static void list_del_init(struct list_head *entry)
Definition: list.h:123
static void INIT_LIST_HEAD(struct list_head *list)
Definition: list.h:54
#define LOG_CUSTOM_LEVEL(level, expr ...)
Definition: log.h:118
#define LOG_DEBUG_IO(expr ...)
Definition: log.h:102
#define LOG_WARNING(expr ...)
Definition: log.h:130
#define ERROR_FAIL
Definition: log.h:174
#define LOG_ERROR(expr ...)
Definition: log.h:133
#define LOG_LEVEL_IS(FOO)
Definition: log.h:100
#define LOG_INFO(expr ...)
Definition: log.h:127
#define LOG_DEBUG(expr ...)
Definition: log.h:110
#define ERROR_OK
Definition: log.h:168
@ LOG_LVL_DEBUG
Definition: log.h:47
@ LOG_LVL_DEBUG_IO
Definition: log.h:48
const unsigned char bit_offset
Definition: mspm0.c:533
uint8_t bits[QN908X_FLASH_MAX_BLOCKS *QN908X_FLASH_PAGES_PER_BLOCK/8]
Definition: qn908x.c:0
#define MIN(a, b)
Definition: replacements.h:22
static int step(struct target *target, bool current, target_addr_t address, bool handle_breakpoints)
Definition: riscv-011.c:1442
#define BIT(nr)
Definition: stm32l4x.h:18
Represents a driver for a debugging interface.
Definition: interface.h:208
const char *const name
The name of the interface driver.
Definition: interface.h:210
uint16_t read_len
Definition: ch347.c:190
uint8_t type
Definition: ch347.c:187
uint16_t tdo_bit_count
Definition: ch347.c:191
uint16_t write_data_len
Definition: ch347.c:189
uint8_t * write_data
Definition: ch347.c:188
int singe_read_len
Definition: ch347.c:226
struct list_head scan_queue
Definition: ch347.c:223
int max_len
Definition: ch347.c:212
bool use_bitwise_mode
Definition: ch347.c:210
struct list_head cmd_queue
Definition: ch347.c:221
int tms_pin
Definition: ch347.c:203
bool swclk_5mhz_supported
Definition: ch347.c:213
int tdi_pin
Definition: ch347.c:204
uint8_t single_read[CH347_SINGLE_CMD_MAX_READ]
Definition: ch347.c:225
int trst_pin
Definition: ch347.c:206
enum ch347_variant chip_variant
Definition: ch347.c:208
uint8_t scratchpad[UCMDPKT_DATA_MAX_BYTES_USBHS]
Definition: ch347.c:217
int scratchpad_idx
Definition: ch347.c:218
int tck_pin
Definition: ch347.c:205
enum pack_size pack_size
Definition: ch347.c:211
uint8_t scratchpad_cmd_type
Definition: ch347.c:216
int fields_len
Definition: ch347.c:197
struct scan_field * fields
Definition: ch347.c:196
int queued_retval
Definition: ch347.c:243
struct list_head free_cmd_head
Definition: ch347.c:248
struct ch347_swd_io ch347_cmd_buf[CH347_MAX_CMD_BUF]
Definition: ch347.c:249
int sent_cmd_count
Definition: ch347.c:244
unsigned int clk_divisor
Definition: ch347.c:245
int need_recv_len
Definition: ch347.c:242
uint8_t send_buf[CH347_MAX_SEND_BUF]
Definition: ch347.c:238
uint8_t recv_buf[CH347_MAX_RECV_BUF]
Definition: ch347.c:239
struct list_head send_cmd_head
Definition: ch347.c:247
unsigned int total_swd_clk
Definition: ch347.c:246
uint32_t * dst
Definition: ch347.c:232
struct list_head list_entry
Definition: ch347.c:234
uint8_t usb_cmd
Definition: ch347.c:230
uint8_t cmd
Definition: ch347.c:231
uint32_t value
Definition: ch347.c:233
const char * name
Definition: command.h:234
const char * usage
a string listing the options and arguments, required or optional
Definition: command.h:239
Represents a driver for a debugging interface.
Definition: interface.h:183
unsigned int supported
Bit vector listing capabilities exposed by this driver.
Definition: interface.h:187
Definition: list.h:41
Definition: osbdm.c:25
The scan_command provide a means of encapsulating a set of scan_field structures that should be scann...
Definition: commands.h:35
This structure defines a single scan field in the scan.
Definition: jtag.h:87
int(* init)(void)
Initialize the debug link so it can perform SWD operations.
Definition: swd.h:255
static const unsigned int swd_seq_dormant_to_swd_len
Definition: swd.h:190
static const uint8_t swd_seq_dormant_to_jtag[]
Dormant-to-JTAG sequence.
Definition: swd.h:230
#define SWD_CMD_A32
Definition: swd.h:19
static const uint8_t swd_seq_dormant_to_swd[]
Dormant-to-SWD sequence.
Definition: swd.h:171
static const uint8_t swd_seq_jtag_to_dormant[]
JTAG-to-dormant sequence.
Definition: swd.h:199
static bool swd_cmd_returns_ack(uint8_t cmd)
Test if we can rely on ACK returned by SWD command.
Definition: swd.h:58
#define SWD_CMD_PARK
Definition: swd.h:22
static int swd_ack_to_error_code(uint8_t ack)
Convert SWD ACK value returned from DP to OpenOCD error code.
Definition: swd.h:72
static uint8_t swd_cmd(bool is_read, bool is_ap, uint8_t regnum)
Construct a "cmd" byte, in lSB bit order, which swd_driver.read_reg() and swd_driver....
Definition: swd.h:35
static const unsigned int swd_seq_jtag_to_swd_len
Definition: swd.h:125
static const unsigned int swd_seq_line_reset_len
Definition: swd.h:104
static const unsigned int swd_seq_dormant_to_jtag_len
Definition: swd.h:244
#define SWD_CMD_APNDP
Definition: swd.h:17
static const unsigned int swd_seq_swd_to_dormant_len
Definition: swd.h:159
#define SWD_CMD_START
Definition: swd.h:16
#define SWD_CMD_RNW
Definition: swd.h:18
static const uint8_t swd_seq_line_reset[]
SWD Line reset.
Definition: swd.h:98
static const uint8_t swd_seq_jtag_to_swd[]
JTAG-to-SWD sequence.
Definition: swd.h:115
static const uint8_t swd_seq_swd_to_jtag[]
SWD-to-JTAG sequence.
Definition: swd.h:136
static const unsigned int swd_seq_swd_to_jtag_len
Definition: swd.h:144
static const unsigned int swd_seq_jtag_to_dormant_len
Definition: swd.h:211
static const uint8_t swd_seq_swd_to_dormant[]
SWD-to-dormant sequence.
Definition: swd.h:153
#define TRANSPORT_SWD
Definition: transport.h:20
#define TRANSPORT_JTAG
Definition: transport.h:19
static uint16_t le_to_h_u16(const uint8_t *buf)
Definition: types.h:122
static void h_u32_to_le(uint8_t *buf, uint32_t val)
Definition: types.h:178
#define ARRAY_SIZE(x)
Compute the number of elements of a variable length array.
Definition: types.h:57
#define DIV_ROUND_UP(m, n)
Rounds m up to the nearest multiple of n using division.
Definition: types.h:79
static void h_u16_to_le(uint8_t *buf, uint16_t val)
Definition: types.h:208
static int parity_u32(uint32_t x)
Calculate the (even) parity of a 32-bit datum.
Definition: types.h:265
#define NULL
Definition: usb.h:16
uint8_t cmd
Definition: vdebug.c:1
uint8_t state[4]
Definition: vdebug.c:21
uint8_t count[4]
Definition: vdebug.c:22
static unsigned int parity(unsigned int v)
Definition: xscale.c:624