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Data Structures | |
| struct | swd_driver |
Macros | |
| #define | ERROR_SWD_FAIL (-400) /** protocol or parity error */ |
| #define | ERROR_SWD_FAULT (-401) /** device returned FAULT in ACK field */ |
| #define | SWD_CMD_A32 (3 << 3) /* bits A[3:2] of register addr */ |
| #define | SWD_CMD_APNDP (1 << 1) /* set only for AP access */ |
| #define | SWD_CMD_PARITY (1 << 5) /* parity of APnDP|RnW|A32 */ |
| #define | SWD_CMD_PARK (1 << 7) /* driven high by host */ |
| #define | SWD_CMD_RNW (1 << 2) /* set only for read access */ |
| #define | SWD_CMD_START (1 << 0) /* always set */ |
| #define | SWD_CMD_STOP (0 << 6) /* always clear for synch SWD */ |
Functions | |
| static int | swd_ack_to_error_code (uint8_t ack) |
| Convert SWD ACK value returned from DP to OpenOCD error code. More... | |
| static uint8_t | swd_cmd (bool is_read, bool is_ap, uint8_t regnum) |
| Construct a "cmd" byte, in lSB bit order, which swd_driver.read_reg() and swd_driver.write_reg() methods will use directly. More... | |
| static bool | swd_cmd_returns_ack (uint8_t cmd) |
| Test if we can rely on ACK returned by SWD command. More... | |
| int | swd_init_reset (struct command_context *cmd_ctx) |
Variables | |
| static const uint8_t | swd_seq_dormant_to_jtag [] |
| Dormant-to-JTAG sequence. More... | |
| static const unsigned | swd_seq_dormant_to_jtag_len = 160 |
| static const uint8_t | swd_seq_dormant_to_swd [] |
| Dormant-to-SWD sequence. More... | |
| static const unsigned | swd_seq_dormant_to_swd_len = 224 |
| static const uint8_t | swd_seq_jtag_to_dormant [] |
| JTAG-to-dormant sequence. More... | |
| static const unsigned | swd_seq_jtag_to_dormant_len = 40 |
| static const uint8_t | swd_seq_jtag_to_swd [] |
| JTAG-to-SWD sequence. More... | |
| static const unsigned | swd_seq_jtag_to_swd_len = 136 |
| static const uint8_t | swd_seq_line_reset [] |
| SWD Line reset. More... | |
| static const unsigned | swd_seq_line_reset_len = 64 |
| static const uint8_t | swd_seq_swd_to_dormant [] |
| SWD-to-dormant sequence. More... | |
| static const unsigned | swd_seq_swd_to_dormant_len = 72 |
| static const uint8_t | swd_seq_swd_to_jtag [] |
| SWD-to-JTAG sequence. More... | |
| static const unsigned | swd_seq_swd_to_jtag_len = 80 |
Macro Definition Documentation
◆ ERROR_SWD_FAIL
◆ ERROR_SWD_FAULT
◆ SWD_CMD_A32
◆ SWD_CMD_APNDP
◆ SWD_CMD_PARITY
◆ SWD_CMD_PARK
◆ SWD_CMD_RNW
◆ SWD_CMD_START
◆ SWD_CMD_STOP
Function Documentation
◆ swd_ack_to_error_code()
|
inlinestatic |
Convert SWD ACK value returned from DP to OpenOCD error code.
- Parameters
-
ack
- Returns
- error code
Definition at line 72 of file swd.h.
References ERROR_OK, ERROR_SWD_FAIL, ERROR_SWD_FAULT, ERROR_WAIT, SWD_ACK_FAULT, SWD_ACK_OK, and SWD_ACK_WAIT.
Referenced by bitbang_swd_read_reg(), bitbang_swd_write_reg(), and ftdi_swd_run_queue().
◆ swd_cmd()
|
inlinestatic |
Construct a "cmd" byte, in lSB bit order, which swd_driver.read_reg() and swd_driver.write_reg() methods will use directly.
Definition at line 35 of file swd.h.
References cmd, parity_u32(), SWD_CMD_APNDP, SWD_CMD_PARITY, and SWD_CMD_RNW.
Referenced by buspirate_swd_clear_sticky_errors(), cmsis_dap_metacmd_targetsel(), cmsis_dap_swd_queue_cmd(), swd_clear_sticky_errors(), swd_cmd_returns_ack(), swd_finish_read(), swd_queue_ap_abort(), swd_queue_ap_read(), swd_queue_ap_write(), swd_queue_dp_read_inner(), and swd_queue_dp_write_inner().
◆ swd_cmd_returns_ack()
|
inlinestatic |
Test if we can rely on ACK returned by SWD command.
- Parameters
-
cmd Byte constructed by swd_cmd(), START, STOP and TRN are filtered off
- Returns
- true if ACK should be checked, false if should be ignored
Definition at line 58 of file swd.h.
References cmd, DP_TARGETSEL, swd_cmd(), SWD_CMD_A32, SWD_CMD_APNDP, and SWD_CMD_RNW.
Referenced by bitbang_swd_write_reg(), and ftdi_swd_run_queue().
◆ swd_init_reset()
| int swd_init_reset | ( | struct command_context * | cmd_ctx | ) |
Definition at line 1583 of file jtag/core.c.
References adapter_init(), adapter_system_reset(), ERROR_OK, jtag_reset_config, LOG_DEBUG, and RESET_HAS_SRST.
Referenced by jim_jtag_arp_init_reset().
Variable Documentation
◆ swd_seq_dormant_to_jtag
|
static |
Dormant-to-JTAG sequence.
This is at least 8 TCK/SWCLK cycles with TMS/SWDIO high to abort any ongoing selection alert sequence, followed by a specific 128-bit selection alert sequence, followed by 4 TCK/SWCLK cycles with TMS/SWDIO low, followed by a specific protocol-dependent activation code. For JTAG there are two possible activation codes:
- "JTAG-Serial": 12 bits 0x00, 0x00
- "Arm CoreSight JTAG-DP": 8 bits 0x0a We use "JTAG-Serial" only, which seams more generic. Since the target TAP can be either in Run/Test Idle or in Test-Logic-Reset states, Arm recommends to put the TAP in Run/Test Idle using one TCK cycle with TMS low. To keep the sequence length multiple of 8, 8 TCK cycle with TMS low are sent (allowed by JTAG state machine). Bits are stored (and transmitted) LSB-first.
Definition at line 230 of file swd.h.
Referenced by bitbang_swd_switch_seq(), cmsis_dap_swd_switch_seq(), and jlink_swd_switch_seq().
◆ swd_seq_dormant_to_jtag_len
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static |
Definition at line 244 of file swd.h.
Referenced by bitbang_swd_switch_seq(), cmsis_dap_swd_switch_seq(), and jlink_swd_switch_seq().
◆ swd_seq_dormant_to_swd
|
static |
Dormant-to-SWD sequence.
This is at least 8 TCK/SWCLK cycles with TMS/SWDIO high to abort any ongoing selection alert sequence, followed by a specific 128-bit selection alert sequence, followed by 4 TCK/SWCLK cycles with TMS/SWDIO low, followed by a specific protocol-dependent activation code. For SWD the activation code is an 8-bit sequence. The sequence ends with a line reset. Bits are stored (and transmitted) LSB-first.
Definition at line 171 of file swd.h.
Referenced by bitbang_swd_switch_seq(), cmsis_dap_swd_switch_seq(), and jlink_swd_switch_seq().
◆ swd_seq_dormant_to_swd_len
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static |
Definition at line 190 of file swd.h.
Referenced by bitbang_swd_switch_seq(), cmsis_dap_swd_switch_seq(), and jlink_swd_switch_seq().
◆ swd_seq_jtag_to_dormant
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static |
JTAG-to-dormant sequence.
This is at least 5 TCK cycles with TMS high to put the interface in test-logic-reset state, followed by a specific 31-bit sequence. Bits are stored (and transmitted) LSB-first.
Definition at line 199 of file swd.h.
Referenced by bitbang_swd_switch_seq(), cmsis_dap_swd_switch_seq(), and jlink_swd_switch_seq().
◆ swd_seq_jtag_to_dormant_len
|
static |
Definition at line 211 of file swd.h.
Referenced by bitbang_swd_switch_seq(), cmsis_dap_swd_switch_seq(), and jlink_swd_switch_seq().
◆ swd_seq_jtag_to_swd
|
static |
JTAG-to-SWD sequence.
The JTAG-to-SWD sequence is at least 50 TCK/SWCLK cycles with TMS/SWDIO high, putting either interface logic into reset state, followed by a specific 16-bit sequence and finally a line reset in case the SWJ-DP was already in SWD mode. Bits are stored (and transmitted) LSB-first.
Definition at line 115 of file swd.h.
Referenced by bitbang_swd_switch_seq(), buspirate_swd_switch_seq(), cmsis_dap_swd_switch_seq(), jlink_swd_switch_seq(), jtag_send_sequence(), vsllink_swd_switch_seq(), and xlnx_pcie_xvc_swd_switch_seq().
◆ swd_seq_jtag_to_swd_len
|
static |
Definition at line 125 of file swd.h.
Referenced by bitbang_swd_switch_seq(), buspirate_swd_switch_seq(), cmsis_dap_swd_switch_seq(), jlink_swd_switch_seq(), jtag_send_sequence(), vsllink_swd_switch_seq(), and xlnx_pcie_xvc_swd_switch_seq().
◆ swd_seq_line_reset
|
static |
SWD Line reset.
SWD Line reset is at least 50 SWCLK cycles with SWDIO driven high, followed by at least two idle (low) cycle. Bits are stored (and transmitted) LSB-first.
Definition at line 98 of file swd.h.
Referenced by bitbang_swd_switch_seq(), buspirate_swd_switch_seq(), cmsis_dap_swd_switch_seq(), jlink_swd_switch_seq(), vsllink_swd_switch_seq(), and xlnx_pcie_xvc_swd_switch_seq().
◆ swd_seq_line_reset_len
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static |
Definition at line 104 of file swd.h.
Referenced by bitbang_swd_switch_seq(), buspirate_swd_switch_seq(), cmsis_dap_swd_switch_seq(), jlink_swd_switch_seq(), vsllink_swd_switch_seq(), and xlnx_pcie_xvc_swd_switch_seq().
◆ swd_seq_swd_to_dormant
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static |
SWD-to-dormant sequence.
This is at least 50 SWCLK cycles with SWDIO high to put the interface in reset state, followed by a specific 16-bit sequence. Bits are stored (and transmitted) LSB-first.
Definition at line 153 of file swd.h.
Referenced by bitbang_swd_switch_seq(), cmsis_dap_swd_switch_seq(), and jlink_swd_switch_seq().
◆ swd_seq_swd_to_dormant_len
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static |
Definition at line 159 of file swd.h.
Referenced by bitbang_swd_switch_seq(), cmsis_dap_swd_switch_seq(), and jlink_swd_switch_seq().
◆ swd_seq_swd_to_jtag
|
static |
SWD-to-JTAG sequence.
The SWD-to-JTAG sequence is at least 50 TCK/SWCLK cycles with TMS/SWDIO high, putting either interface logic into reset state, followed by a specific 16-bit sequence and finally at least 5 TCK/SWCLK cycles with TMS/SWDIO high to put the JTAG TAP in Test-Logic-Reset state. Bits are stored (and transmitted) LSB-first.
Definition at line 136 of file swd.h.
Referenced by bitbang_swd_switch_seq(), buspirate_swd_switch_seq(), cmsis_dap_swd_switch_seq(), jlink_swd_switch_seq(), jtag_send_sequence(), vsllink_swd_switch_seq(), and xlnx_pcie_xvc_swd_switch_seq().
◆ swd_seq_swd_to_jtag_len
|
static |
Definition at line 144 of file swd.h.
Referenced by bitbang_swd_switch_seq(), buspirate_swd_switch_seq(), cmsis_dap_swd_switch_seq(), jlink_swd_switch_seq(), jtag_send_sequence(), vsllink_swd_switch_seq(), and xlnx_pcie_xvc_swd_switch_seq().
