8 #ifndef OPENOCD_TARGET_ARMV4_5_MMU_H
9 #define OPENOCD_TARGET_ARMV4_5_MMU_H
29 uint32_t *cb, uint32_t *val);
37 uint32_t address, uint32_t
size, uint32_t
count,
const uint8_t *
buffer);
int armv4_5_mmu_read_physical(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
int armv4_5_mmu_write_physical(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
@ ARMV4_5_ALIGNMENT_CHECK
int armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, uint32_t *cb, uint32_t *val)
size_t size
Size of the control block search area.
int(* write_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
int(* read_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
int(* get_ttb)(struct target *target, uint32_t *result)
int(* enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache)
int(* disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache)
struct armv4_5_cache_common armv4_5_cache