19 uint32_t first_lvl_descriptor = 0x0;
20 uint32_t second_lvl_descriptor = 0x0;
28 (ttb & 0xffffc000) | ((va & 0xfff00000) >> 18),
29 4, 1, (uint8_t *)&first_lvl_descriptor);
34 LOG_DEBUG(
"1st lvl desc: %8.8" PRIx32
"", first_lvl_descriptor);
36 if ((first_lvl_descriptor & 0x3) == 0) {
41 if (!armv4_5_mmu->
has_tiny_pages && ((first_lvl_descriptor & 0x3) == 3)) {
46 if ((first_lvl_descriptor & 0x3) == 2) {
48 *cb = (first_lvl_descriptor & 0xc) >> 2;
49 *val = (first_lvl_descriptor & 0xfff00000) | (va & 0x000fffff);
53 if ((first_lvl_descriptor & 0x3) == 1) {
56 (first_lvl_descriptor & 0xfffffc00) | ((va & 0x000ff000) >> 10),
57 4, 1, (uint8_t *)&second_lvl_descriptor);
60 }
else if ((first_lvl_descriptor & 0x3) == 3) {
63 (first_lvl_descriptor & 0xfffff000) | ((va & 0x000ffc00) >> 8),
64 4, 1, (uint8_t *)&second_lvl_descriptor);
71 LOG_DEBUG(
"2nd lvl desc: %8.8" PRIx32
"", second_lvl_descriptor);
73 if ((second_lvl_descriptor & 0x3) == 0) {
79 *cb = (second_lvl_descriptor & 0xc) >> 2;
81 if ((second_lvl_descriptor & 0x3) == 1) {
83 *val = (second_lvl_descriptor & 0xffff0000) | (va & 0x0000ffff);
87 if ((second_lvl_descriptor & 0x3) == 2) {
89 *val = (second_lvl_descriptor & 0xfffff000) | (va & 0x00000fff);
93 if ((second_lvl_descriptor & 0x3) == 3) {
95 *val = (second_lvl_descriptor & 0xfffffc00) | (va & 0x000003ff);
100 LOG_ERROR(
"Address translation failure");
int armv4_5_mmu_read_physical(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
int armv4_5_mmu_write_physical(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
int armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, uint32_t *cb, uint32_t *val)
#define LOG_ERROR(expr ...)
#define LOG_DEBUG(expr ...)
size_t size
Size of the control block search area.
int(* write_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
int(* read_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
int(* get_ttb)(struct target *target, uint32_t *result)
int(* enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache)
int(* disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache)
struct armv4_5_cache_common armv4_5_cache
uint32_t target_buffer_get_u32(struct target *target, const uint8_t *buffer)
#define ERROR_TARGET_NOT_HALTED
#define ERROR_TARGET_TRANSLATION_FAULT