3 #ifndef OPENOCD_TARGET_RISCV_RISCV_REG_H
4 #define OPENOCD_TARGET_RISCV_RISCV_REG_H
int riscv_reg_set(struct target *target, enum gdb_regno i, riscv_reg_t v)
Set the register value.
void riscv_reg_cache_invalidate_all(struct target *target)
Invalidate all registers - forget their cached register values.
const char * riscv_reg_gdb_regno_name(const struct target *target, enum gdb_regno regno)
This file describes the register cache interface available to the RISC-V target.
int riscv_reg_get(struct target *target, riscv_reg_t *value, enum gdb_regno r)
Get register, from the cache if it's in there.
int riscv_reg_write(struct target *target, enum gdb_regno i, riscv_reg_t v)
Set the register value and immediately write it to the target (write-through mode).
int riscv_reg_flush_all(struct target *target)
Write all dirty registers to the target.
void riscv_reg_free_all(struct target *target)
Free register cache and associated structures.
bool riscv_reg_cache_any_dirty(const struct target *target, int log_level)
Check whether there are any dirty registers in the OpenOCD's register cache.