15 #define PAC55XX_FLASH_BASE 0x00000000UL
17 #define PAC55XX_PERIPH_BASE 0x40000000UL
18 #define PAC55XX_MEMCTL_BASE (PAC55XX_PERIPH_BASE + 0xD0000)
20 #define PAC55XX_MEMCTL_FLASHSTATUS (PAC55XX_MEMCTL_BASE + 0x04)
21 #define PAC55XX_MEMCTL_FLASHLOCK (PAC55XX_MEMCTL_BASE + 0x08)
22 #define PAC55XX_MEMCTL_FLASHPAGE (PAC55XX_MEMCTL_BASE + 0x0C)
23 #define PAC55XX_MEMCTL_FLASHERASE (PAC55XX_MEMCTL_BASE + 0x20)
25 #define PAC55XX_MEMCTL_FLASHSTATUS_ERASEBUSY BIT(1)
26 #define PAC55XX_MEMCTL_FLASHSTATUS_WRITEBUSY BIT(0)
28 #define PAC55XX_MEMCTL_FLASHLOCK_ALLOWWRITEERASE 0x43DF140A
29 #define PAC55XX_MEMCTL_FLASHLOCK_LOCKED 0x0
30 #define PAC55XX_MEMCTL_FLASHERASE_ERASE 0x8C799CA7
33 #define FLASH_ERASE_TIMEOUT_MS 20
34 #define FLASH_WRITE_TIMEOUT_MS 20
59 if ((
timeval_ms() - start_time) > timeout_ms) {
72 LOG_ERROR(
"Target must be halted to erase.");
82 for (
unsigned int i = first; i < last; ++i) {
104 ret = ret_lock_flash;
114 LOG_ERROR(
"Target must be halted to write.");
124 assert(
count % 16 == 0);
133 flash_address += 16,
buffer += 16) {
155 ret = ret_lock_flash;
168 uint32_t num_pages = 128;
173 bank->write_start_alignment = 16;
174 bank->write_end_alignment = 16;
175 bank->num_sectors = num_pages;
181 for (
unsigned int i = 0; i <
bank->num_sectors; i++)
182 bank->sectors[i].is_protected = 0;
192 .flash_bank_command = pac55xx_flash_bank_command,
uint64_t buffer
Pointer to data buffer to send over SPI.
uint32_t page_size
Page size.
struct flash_sector * alloc_block_array(uint32_t offset, uint32_t size, unsigned int num_blocks)
Allocate and fill an array of sectors or protection blocks.
int default_flash_blank_check(struct flash_bank *bank)
Provides default erased-bank check handling.
int default_flash_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
Provides default read implementation for flash memory.
void default_flash_free_driver_priv(struct flash_bank *bank)
Deallocates bank->driver_priv.
#define LOG_ERROR(expr ...)
#define ERROR_TIMEOUT_REACHED
#define PAC55XX_MEMCTL_FLASHSTATUS_WRITEBUSY
#define FLASH_WRITE_TIMEOUT_MS
int pac55xx_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
#define PAC55XX_MEMCTL_FLASHERASE
FLASH_BANK_COMMAND_HANDLER(pac55xx_flash_bank_command)
#define PAC55XX_MEMCTL_FLASHLOCK_LOCKED
#define PAC55XX_MEMCTL_FLASHLOCK_ALLOWWRITEERASE
#define PAC55XX_MEMCTL_FLASHSTATUS_ERASEBUSY
#define PAC55XX_MEMCTL_FLASHSTATUS
#define PAC55XX_FLASH_BASE
int pac55xx_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
#define PAC55XX_MEMCTL_FLASHERASE_ERASE
#define PAC55XX_MEMCTL_FLASHLOCK
int pac55xx_probe(struct flash_bank *bank)
const struct flash_driver pac55xx_flash
#define FLASH_ERASE_TIMEOUT_MS
#define PAC55XX_MEMCTL_FLASHPAGE
static int pac55xx_wait_for_operation_to_finish(struct flash_bank *bank, unsigned int timeout_ms)
Wait until the flash controller is not busy anymore.
Provides details of a flash bank, available either on-chip or through a major interface.
Provides the implementation-independent structure that defines all of the callbacks required by OpenO...
const char * name
Gives a human-readable name of this flash driver, This field is used to select and initialize the dri...
int target_write_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
Write count items of size bytes to the memory of target at the address given.
int target_write_u32(struct target *target, target_addr_t address, uint32_t value)
int target_read_u32(struct target *target, target_addr_t address, uint32_t *value)
#define ERROR_TARGET_NOT_HALTED