OpenOCD
flash/nand/core.c
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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 /***************************************************************************
4  * Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
5  * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
6  * Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
7  * *
8  * Partially based on drivers/mtd/nand_ids.c from Linux. *
9  ***************************************************************************/
10 
11 #ifdef HAVE_CONFIG_H
12 #include "config.h"
13 #endif
14 
15 #include "imp.h"
16 
17 /* configured NAND devices and NAND Flash command handler */
19 
21 {
22  if (nand_devices) {
23  struct nand_device *p = nand_devices;
24  while (p && p->next)
25  p = p->next;
26  p->next = c;
27  } else
28  nand_devices = c;
29 }
30 
31 
32 /* Chip ID list
33  *
34  * Manufacturer, ID code, pagesize, chipsize in MegaByte, eraseblock size,
35  * options, name
36  *
37  * Pagesize; 0, 256, 512
38  * 0 get this information from the extended chip ID
39  * 256 256 Byte page size
40  * 512 512 Byte page size
41  */
42 static struct nand_info nand_flash_ids[] = {
43  /* Vendor Specific Entries */
44  { NAND_MFR_SAMSUNG, 0xD5, 8192, 2048, 0x100000, LP_OPTIONS,
45  "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
46  { NAND_MFR_SAMSUNG, 0xD7, 8192, 4096, 0x100000, LP_OPTIONS,
47  "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
48 
49  /* start "museum" IDs */
50  { 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"},
51  { 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"},
52  { 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"},
53  { 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
54  { 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
55  { 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"},
56  { 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
57  { 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
58  { 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
59  { 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
60 
61  { 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"},
62  { 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
63  { 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
64  { 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
65  /* end "museum" IDs */
66 
67  { 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"},
68  { 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"},
69  { 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 1.8V 16-bit"},
70  { 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 3.3V 16-bit"},
71 
72  { 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"},
73  { 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"},
74  { 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 1.8V 16-bit"},
75  { 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 3.3V 16-bit"},
76 
77  { 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"},
78  { 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"},
79  { 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 1.8V 16-bit"},
80  { 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 3.3V 16-bit"},
81 
82  { 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
83  { 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
84  { 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"},
85  { 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
86  { 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
87  { 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
88  { 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
89 
90  { 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"},
91 
92  { 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"},
93  { 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"},
94  { 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"},
95  { 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"},
96 
97  { 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"},
98  { 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"},
99  { 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"},
100  { 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"},
101 
102  { 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"},
103  { 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"},
104  { 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"},
105  { 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"},
106 
107  { 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"},
108  { 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"},
109  { 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"},
110  { 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"},
111 
112  { 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"},
113  { 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"},
114  { 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"},
115  { 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"},
116 
117  { 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"},
118  { 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
119  { 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"},
120  { 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"},
121 
122  { 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
123 
124  {0, 0, 0, 0, 0, 0, NULL}
125 };
126 
127 /* Manufacturer ID list
128  */
129 static struct nand_manufacturer nand_manuf_ids[] = {
130  {0x0, "unknown"},
131  {NAND_MFR_TOSHIBA, "Toshiba"},
132  {NAND_MFR_SAMSUNG, "Samsung"},
133  {NAND_MFR_FUJITSU, "Fujitsu"},
134  {NAND_MFR_NATIONAL, "National"},
135  {NAND_MFR_RENESAS, "Renesas"},
136  {NAND_MFR_STMICRO, "ST Micro"},
137  {NAND_MFR_HYNIX, "Hynix"},
138  {NAND_MFR_MICRON, "Micron"},
139  {0x0, NULL},
140 };
141 
142 /*
143  * Define default oob placement schemes for large and small page devices
144  */
145 
146 #if 0
147 static struct nand_ecclayout nand_oob_8 = {
148  .eccbytes = 3,
149  .eccpos = {0, 1, 2},
150  .oobfree = {
151  {.offset = 3,
152  .length = 2},
153  {.offset = 6,
154  .length = 2}
155  }
156 };
157 #endif
158 
166 static struct nand_device *get_nand_device_by_name(const char *name)
167 {
168  unsigned int requested = get_flash_name_index(name);
169  unsigned int found = 0;
170 
171  struct nand_device *nand;
172  for (nand = nand_devices; nand; nand = nand->next) {
173  if (strcmp(nand->name, name) == 0)
174  return nand;
176  continue;
177  if (++found < requested)
178  continue;
179  return nand;
180  }
181  return NULL;
182 }
183 
185 {
186  struct nand_device *p;
187  int i = 0;
188 
189  for (p = nand_devices; p; p = p->next) {
190  if (i++ == num)
191  return p;
192  }
193 
194  return NULL;
195 }
196 
197 COMMAND_HELPER(nand_command_get_device, unsigned int name_index,
198  struct nand_device **nand)
199 {
200  const char *str = CMD_ARGV[name_index];
201  *nand = get_nand_device_by_name(str);
202  if (*nand)
203  return ERROR_OK;
204 
205  unsigned int num;
206  COMMAND_PARSE_NUMBER(uint, str, num);
207  *nand = get_nand_device_by_num(num);
208  if (!*nand) {
209  command_print(CMD, "NAND flash device '%s' not found", str);
211  }
212  return ERROR_OK;
213 }
214 
215 int nand_build_bbt(struct nand_device *nand, int first, int last)
216 {
217  uint32_t page;
218  int i;
219  int pages_per_block = (nand->erase_size / nand->page_size);
220  uint8_t oob[6];
221  int ret;
222 
223  if ((first < 0) || (first >= nand->num_blocks))
224  first = 0;
225 
226  if ((last >= nand->num_blocks) || (last == -1))
227  last = nand->num_blocks - 1;
228 
229  page = first * pages_per_block;
230  for (i = first; i <= last; i++) {
231  ret = nand_read_page(nand, page, NULL, 0, oob, 6);
232  if (ret != ERROR_OK)
233  return ret;
234 
235  if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
236  || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
237  ((nand->page_size == 2048) && (oob[0] != 0xff)))) {
238  LOG_WARNING("bad block: %i", i);
239  nand->blocks[i].is_bad = 1;
240  } else
241  nand->blocks[i].is_bad = 0;
242 
243  page += pages_per_block;
244  }
245 
246  return ERROR_OK;
247 }
248 
249 int nand_read_status(struct nand_device *nand, uint8_t *status)
250 {
251  if (!nand->device)
253 
254  /* Send read status command */
255  /* FIXME: errors returned from nand->controller are mostly ignored! */
256  nand->controller->command(nand, NAND_CMD_STATUS);
257 
258  alive_sleep(1);
259 
260  /* read status */
261  if (nand->device->options & NAND_BUSWIDTH_16) {
262  uint16_t data;
263  nand->controller->read_data(nand, &data);
264  *status = data & 0xff;
265  } else
266  nand->controller->read_data(nand, status);
267 
268  return ERROR_OK;
269 }
270 
271 static int nand_poll_ready(struct nand_device *nand, int timeout)
272 {
273  uint8_t status;
274 
275  nand->controller->command(nand, NAND_CMD_STATUS);
276  do {
277  if (nand->device->options & NAND_BUSWIDTH_16) {
278  uint16_t data;
279  nand->controller->read_data(nand, &data);
280  status = data & 0xff;
281  } else
282  nand->controller->read_data(nand, &status);
284  break;
285  alive_sleep(1);
286  } while (timeout--);
287 
288  return (status & NAND_STATUS_READY) != 0;
289 }
290 
291 int nand_probe(struct nand_device *nand)
292 {
293  uint8_t manufacturer_id, device_id;
294  uint8_t id_buff[6] = { 0 }; /* zero buff to silence false warning
295  * from clang static analyzer */
296  int retval;
297  int i;
298 
299  /* clear device data */
300  nand->device = NULL;
301  nand->manufacturer = NULL;
302 
303  /* clear device parameters */
304  nand->bus_width = 0;
305  nand->address_cycles = 0;
306  nand->page_size = 0;
307  nand->erase_size = 0;
308 
309  /* initialize controller (device parameters are zero, use controller default) */
310  retval = nand->controller->init(nand);
311  if (retval != ERROR_OK) {
312  switch (retval) {
314  LOG_DEBUG("controller initialization failed");
317  LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
319  default:
320  LOG_ERROR("BUG: unknown controller initialization failure");
322  }
323  }
324 
325  nand->controller->command(nand, NAND_CMD_RESET);
326  nand->controller->reset(nand);
327 
328  nand->controller->command(nand, NAND_CMD_READID);
329  nand->controller->address(nand, 0x0);
330 
331  if (nand->bus_width == 8) {
332  nand->controller->read_data(nand, &manufacturer_id);
333  nand->controller->read_data(nand, &device_id);
334  } else {
335  uint16_t data_buf;
336  nand->controller->read_data(nand, &data_buf);
337  manufacturer_id = data_buf & 0xff;
338  nand->controller->read_data(nand, &data_buf);
339  device_id = data_buf & 0xff;
340  }
341 
342  for (i = 0; nand_flash_ids[i].name; i++) {
343  if (nand_flash_ids[i].id == device_id &&
344  (nand_flash_ids[i].mfr_id == manufacturer_id ||
345  nand_flash_ids[i].mfr_id == 0)) {
346  nand->device = &nand_flash_ids[i];
347  break;
348  }
349  }
350 
351  for (i = 0; nand_manuf_ids[i].name; i++) {
352  if (nand_manuf_ids[i].id == manufacturer_id) {
353  nand->manufacturer = &nand_manuf_ids[i];
354  break;
355  }
356  }
357 
358  if (!nand->manufacturer) {
359  nand->manufacturer = &nand_manuf_ids[0];
360  nand->manufacturer->id = manufacturer_id;
361  }
362 
363  if (!nand->device) {
364  LOG_ERROR(
365  "unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
366  manufacturer_id,
367  device_id);
369  }
370 
371  LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
372 
373  /* initialize device parameters */
374 
375  /* bus width */
376  if (nand->device->options & NAND_BUSWIDTH_16)
377  nand->bus_width = 16;
378  else
379  nand->bus_width = 8;
380 
381  /* Do we need extended device probe information? */
382  if (nand->device->page_size == 0 ||
383  nand->device->erase_size == 0) {
384  if (nand->bus_width == 8) {
385  retval = nand->controller->read_data(nand, id_buff + 3);
386  if (retval != ERROR_OK)
387  return retval;
388 
389  retval = nand->controller->read_data(nand, id_buff + 4);
390  if (retval != ERROR_OK)
391  return retval;
392 
393  retval = nand->controller->read_data(nand, id_buff + 5);
394  if (retval != ERROR_OK)
395  return retval;
396 
397  } else {
398  uint16_t data_buf;
399 
400  retval = nand->controller->read_data(nand, &data_buf);
401  if (retval != ERROR_OK)
402  return retval;
403  id_buff[3] = data_buf;
404 
405  retval = nand->controller->read_data(nand, &data_buf);
406  if (retval != ERROR_OK)
407  return retval;
408  id_buff[4] = data_buf;
409 
410  retval = nand->controller->read_data(nand, &data_buf);
411  if (retval != ERROR_OK)
412  return retval;
413  id_buff[5] = data_buf >> 8;
414  }
415  }
416 
417  /* page size */
418  if (nand->device->page_size == 0)
419  nand->page_size = 1 << (10 + (id_buff[4] & 3));
420  else if (nand->device->page_size == 256) {
421  LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
423  } else
424  nand->page_size = nand->device->page_size;
425 
426  /* number of address cycles */
427  if (nand->page_size <= 512) {
428  /* small page devices */
429  if (nand->device->chip_size <= 32)
430  nand->address_cycles = 3;
431  else if (nand->device->chip_size <= 8*1024)
432  nand->address_cycles = 4;
433  else {
434  LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
435  nand->address_cycles = 5;
436  }
437  } else {
438  /* large page devices */
439  if (nand->device->chip_size <= 128)
440  nand->address_cycles = 4;
441  else if (nand->device->chip_size <= 32*1024)
442  nand->address_cycles = 5;
443  else {
444  LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
445  nand->address_cycles = 6;
446  }
447  }
448 
449  /* erase size */
450  if (nand->device->erase_size == 0) {
451  switch ((id_buff[4] >> 4) & 3) {
452  case 0:
453  nand->erase_size = 64 << 10;
454  break;
455  case 1:
456  nand->erase_size = 128 << 10;
457  break;
458  case 2:
459  nand->erase_size = 256 << 10;
460  break;
461  case 3:
462  nand->erase_size = 512 << 10;
463  break;
464  }
465  } else
466  nand->erase_size = nand->device->erase_size;
467 
468  /* initialize controller, but leave parameters at the controllers default */
469  retval = nand->controller->init(nand);
470  if (retval != ERROR_OK) {
471  switch (retval) {
473  LOG_DEBUG("controller initialization failed");
476  LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
477  nand->bus_width,
478  nand->address_cycles,
479  nand->page_size);
481  default:
482  LOG_ERROR("BUG: unknown controller initialization failure");
484  }
485  }
486 
487  nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
488  nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
489 
490  for (i = 0; i < nand->num_blocks; i++) {
491  nand->blocks[i].size = nand->erase_size;
492  nand->blocks[i].offset = i * nand->erase_size;
493  nand->blocks[i].is_erased = -1;
494  nand->blocks[i].is_bad = -1;
495  }
496 
497  return ERROR_OK;
498 }
499 
500 int nand_erase(struct nand_device *nand, int first_block, int last_block)
501 {
502  int i;
503  uint32_t page;
504  uint8_t status;
505  int retval;
506 
507  if (!nand->device)
509 
510  if ((first_block < 0) || (last_block >= nand->num_blocks))
512 
513  /* make sure we know if a block is bad before erasing it */
514  for (i = first_block; i <= last_block; i++) {
515  if (nand->blocks[i].is_bad == -1) {
516  nand_build_bbt(nand, i, last_block);
517  break;
518  }
519  }
520 
521  for (i = first_block; i <= last_block; i++) {
522  /* Send erase setup command */
523  nand->controller->command(nand, NAND_CMD_ERASE1);
524 
525  page = i * (nand->erase_size / nand->page_size);
526 
527  /* Send page address */
528  if (nand->page_size <= 512) {
529  /* row */
530  nand->controller->address(nand, page & 0xff);
531  nand->controller->address(nand, (page >> 8) & 0xff);
532 
533  /* 3rd cycle only on devices with more than 32 MiB */
534  if (nand->address_cycles >= 4)
535  nand->controller->address(nand, (page >> 16) & 0xff);
536 
537  /* 4th cycle only on devices with more than 8 GiB */
538  if (nand->address_cycles >= 5)
539  nand->controller->address(nand, (page >> 24) & 0xff);
540  } else {
541  /* row */
542  nand->controller->address(nand, page & 0xff);
543  nand->controller->address(nand, (page >> 8) & 0xff);
544 
545  /* 3rd cycle only on devices with more than 128 MiB */
546  if (nand->address_cycles >= 5)
547  nand->controller->address(nand, (page >> 16) & 0xff);
548  }
549 
550  /* Send erase confirm command */
551  nand->controller->command(nand, NAND_CMD_ERASE2);
552 
553  retval = nand->controller->nand_ready ?
554  nand->controller->nand_ready(nand, 1000) :
555  nand_poll_ready(nand, 1000);
556  if (!retval) {
557  LOG_ERROR("timeout waiting for NAND flash block erase to complete");
559  }
560 
561  retval = nand_read_status(nand, &status);
562  if (retval != ERROR_OK) {
563  LOG_ERROR("couldn't read status");
565  }
566 
567  if (status & 0x1) {
568  LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
569  (nand->blocks[i].is_bad == 1)
570  ? "bad " : "",
571  i, status);
572  /* continue; other blocks might still be erasable */
573  }
574 
575  nand->blocks[i].is_erased = 1;
576  }
577 
578  return ERROR_OK;
579 }
580 
581 #if 0
582 static int nand_read_plain(struct nand_device *nand,
583  uint32_t address,
584  uint8_t *data,
585  uint32_t data_size)
586 {
587  uint8_t *page;
588 
589  if (!nand->device)
591 
592  if (address % nand->page_size) {
593  LOG_ERROR("reads need to be page aligned");
595  }
596 
597  page = malloc(nand->page_size);
598 
599  while (data_size > 0) {
600  uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
601  uint32_t page_address;
602 
603 
604  page_address = address / nand->page_size;
605 
606  nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
607 
608  memcpy(data, page, thisrun_size);
609 
610  address += thisrun_size;
611  data += thisrun_size;
612  data_size -= thisrun_size;
613  }
614 
615  free(page);
616 
617  return ERROR_OK;
618 }
619 
620 static int nand_write_plain(struct nand_device *nand,
621  uint32_t address,
622  uint8_t *data,
623  uint32_t data_size)
624 {
625  uint8_t *page;
626 
627  if (!nand->device)
629 
630  if (address % nand->page_size) {
631  LOG_ERROR("writes need to be page aligned");
633  }
634 
635  page = malloc(nand->page_size);
636 
637  while (data_size > 0) {
638  uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
639  uint32_t page_address;
640 
641  memset(page, 0xff, nand->page_size);
642  memcpy(page, data, thisrun_size);
643 
644  page_address = address / nand->page_size;
645 
646  nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
647 
648  address += thisrun_size;
649  data += thisrun_size;
650  data_size -= thisrun_size;
651  }
652 
653  free(page);
654 
655  return ERROR_OK;
656 }
657 #endif
658 
659 int nand_write_page(struct nand_device *nand, uint32_t page,
660  uint8_t *data, uint32_t data_size,
661  uint8_t *oob, uint32_t oob_size)
662 {
663  uint32_t block;
664 
665  if (!nand->device)
667 
668  block = page / (nand->erase_size / nand->page_size);
669  if (nand->blocks[block].is_erased == 1)
670  nand->blocks[block].is_erased = 0;
671 
672  if (nand->use_raw || !nand->controller->write_page)
673  return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
674  else
675  return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
676 }
677 
678 int nand_read_page(struct nand_device *nand, uint32_t page,
679  uint8_t *data, uint32_t data_size,
680  uint8_t *oob, uint32_t oob_size)
681 {
682  if (!nand->device)
684 
685  if (nand->use_raw || !nand->controller->read_page)
686  return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
687  else
688  return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
689 }
690 
691 int nand_page_command(struct nand_device *nand, uint32_t page,
692  uint8_t cmd, bool oob_only)
693 {
694  if (!nand->device)
696 
697  if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
699 
700  nand->controller->command(nand, cmd);
701 
702  if (nand->page_size <= 512) {
703  /* small page device */
704 
705  /* column (always 0, we start at the beginning of a page/OOB area) */
706  nand->controller->address(nand, 0x0);
707 
708  /* row */
709  nand->controller->address(nand, page & 0xff);
710  nand->controller->address(nand, (page >> 8) & 0xff);
711 
712  /* 4th cycle only on devices with more than 32 MiB */
713  if (nand->address_cycles >= 4)
714  nand->controller->address(nand, (page >> 16) & 0xff);
715 
716  /* 5th cycle only on devices with more than 8 GiB */
717  if (nand->address_cycles >= 5)
718  nand->controller->address(nand, (page >> 24) & 0xff);
719  } else {
720  /* large page device */
721 
722  /* column (0 when we start at the beginning of a page,
723  * or 2048 for the beginning of OOB area)
724  */
725  nand->controller->address(nand, 0x0);
726  if (oob_only)
727  nand->controller->address(nand, 0x8);
728  else
729  nand->controller->address(nand, 0x0);
730 
731  /* row */
732  nand->controller->address(nand, page & 0xff);
733  nand->controller->address(nand, (page >> 8) & 0xff);
734 
735  /* 5th cycle only on devices with more than 128 MiB */
736  if (nand->address_cycles >= 5)
737  nand->controller->address(nand, (page >> 16) & 0xff);
738 
739  /* large page devices need a start command if reading */
740  if (cmd == NAND_CMD_READ0)
741  nand->controller->command(nand, NAND_CMD_READSTART);
742  }
743 
744  if (nand->controller->nand_ready) {
745  if (!nand->controller->nand_ready(nand, 100))
747  } else {
748  /* nand_poll_read() cannot be used during nand read */
749  alive_sleep(1);
750  }
751 
752  return ERROR_OK;
753 }
754 
755 int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
756 {
757  int retval = ERROR_NAND_NO_BUFFER;
758 
759  if (nand->controller->read_block_data)
760  retval = (nand->controller->read_block_data)(nand, data, size);
761 
762  if (retval == ERROR_NAND_NO_BUFFER) {
763  uint32_t i;
764  int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
765 
766  retval = ERROR_OK;
767  for (i = 0; retval == ERROR_OK && i < size; i += incr) {
768  retval = nand->controller->read_data(nand, data);
769  data += incr;
770  }
771  }
772 
773  return retval;
774 }
775 
776 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
777  uint8_t *data, uint32_t data_size,
778  uint8_t *oob, uint32_t oob_size)
779 {
780  int retval;
781 
782  retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
783  if (retval != ERROR_OK)
784  return retval;
785 
786  if (data)
787  nand_read_data_page(nand, data, data_size);
788 
789  if (oob)
790  nand_read_data_page(nand, oob, oob_size);
791 
792  return ERROR_OK;
793 }
794 
795 int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
796 {
797  int retval = ERROR_NAND_NO_BUFFER;
798 
799  if (nand->controller->write_block_data)
800  retval = (nand->controller->write_block_data)(nand, data, size);
801 
802  if (retval == ERROR_NAND_NO_BUFFER) {
803  bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
804  uint32_t incr = is16bit ? 2 : 1;
805  uint16_t write_data;
806  uint32_t i;
807 
808  for (i = 0; i < size; i += incr) {
809  if (is16bit)
810  write_data = le_to_h_u16(data);
811  else
812  write_data = *data;
813 
814  retval = nand->controller->write_data(nand, write_data);
815  if (retval != ERROR_OK)
816  break;
817 
818  data += incr;
819  }
820  }
821 
822  return retval;
823 }
824 
826 {
827  int retval;
828  uint8_t status;
829 
830  nand->controller->command(nand, NAND_CMD_PAGEPROG);
831 
832  retval = nand->controller->nand_ready ?
833  nand->controller->nand_ready(nand, 100) :
834  nand_poll_ready(nand, 100);
835  if (!retval)
837 
838  retval = nand_read_status(nand, &status);
839  if (retval != ERROR_OK) {
840  LOG_ERROR("couldn't read status");
842  }
843 
844  if (status & NAND_STATUS_FAIL) {
845  LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
846  status);
848  }
849 
850  return ERROR_OK;
851 }
852 
853 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
854  uint8_t *data, uint32_t data_size,
855  uint8_t *oob, uint32_t oob_size)
856 {
857  int retval;
858 
859  retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
860  if (retval != ERROR_OK)
861  return retval;
862 
863  if (data) {
864  retval = nand_write_data_page(nand, data, data_size);
865  if (retval != ERROR_OK) {
866  LOG_ERROR("Unable to write data to NAND device");
867  return retval;
868  }
869  }
870 
871  if (oob) {
872  retval = nand_write_data_page(nand, oob, oob_size);
873  if (retval != ERROR_OK) {
874  LOG_ERROR("Unable to write OOB data to NAND device");
875  return retval;
876  }
877  }
878 
879  return nand_write_finish(nand);
880 }
const char * name
Definition: armv4_5.c:76
void command_print(struct command_invocation *cmd, const char *format,...)
Definition: command.c:371
#define CMD
Use this macro to access the command being handled, rather than accessing the variable directly.
Definition: command.h:141
#define CMD_ARGV
Use this macro to access the arguments for the command being handled, rather than accessing the varia...
Definition: command.h:156
#define ERROR_COMMAND_SYNTAX_ERROR
Definition: command.h:400
#define COMMAND_PARSE_NUMBER(type, in, out)
parses the string in into out as a type, or prints a command error and passes the error code to the c...
Definition: command.h:440
bool flash_driver_name_matches(const char *name, const char *expected)
Attempt to match the expected name with the name of a driver.
Definition: common.c:27
unsigned int get_flash_name_index(const char *name)
Parses the optional '.index' portion of a flash bank identifier.
Definition: common.c:14
uint32_t size
Size of dw_spi_transaction::buffer.
Definition: dw-spi-helper.h:4
uint32_t address
Starting address. Sector aligned.
Definition: dw-spi-helper.h:0
COMMAND_HELPER(nand_command_get_device, unsigned int name_index, struct nand_device **nand)
helper for parsing a nand device command argument string
int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
int nand_probe(struct nand_device *nand)
int nand_read_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
int nand_build_bbt(struct nand_device *nand, int first, int last)
int nand_erase(struct nand_device *nand, int first_block, int last_block)
int nand_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
struct nand_device * nand_devices
static int nand_poll_ready(struct nand_device *nand, int timeout)
int nand_read_status(struct nand_device *nand, uint8_t *status)
int nand_read_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
static struct nand_info nand_flash_ids[]
int nand_write_finish(struct nand_device *nand)
static struct nand_device * get_nand_device_by_name(const char *name)
Returns the flash bank specified by name, which matches the driver name and a suffix (option) specify...
static struct nand_manufacturer nand_manuf_ids[]
int nand_write_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
void nand_device_add(struct nand_device *c)
struct nand_device * get_nand_device_by_num(int num)
int nand_page_command(struct nand_device *nand, uint32_t page, uint8_t cmd, bool oob_only)
void alive_sleep(uint64_t ms)
Definition: log.c:468
#define LOG_WARNING(expr ...)
Definition: log.h:130
#define LOG_ERROR(expr ...)
Definition: log.h:133
#define LOG_DEBUG(expr ...)
Definition: log.h:110
#define ERROR_OK
Definition: log.h:168
#define ERROR_NAND_NO_BUFFER
Definition: nand/core.h:222
@ NAND_MFR_NATIONAL
Definition: nand/core.h:70
@ NAND_MFR_RENESAS
Definition: nand/core.h:71
@ NAND_MFR_STMICRO
Definition: nand/core.h:72
@ NAND_MFR_MICRON
Definition: nand/core.h:74
@ NAND_MFR_SAMSUNG
Definition: nand/core.h:68
@ NAND_MFR_FUJITSU
Definition: nand/core.h:69
@ NAND_MFR_TOSHIBA
Definition: nand/core.h:67
@ NAND_MFR_HYNIX
Definition: nand/core.h:73
#define ERROR_NAND_OPERATION_TIMEOUT
Definition: nand/core.h:218
#define ERROR_NAND_DEVICE_NOT_PROBED
Definition: nand/core.h:220
#define ERROR_NAND_OPERATION_FAILED
Definition: nand/core.h:217
@ NAND_CMD_SEQIN
Definition: nand/core.h:148
@ NAND_CMD_READSTART
Definition: nand/core.h:155
@ NAND_CMD_READOOB
Definition: nand/core.h:144
@ NAND_CMD_READ0
Definition: nand/core.h:140
@ NAND_CMD_READID
Definition: nand/core.h:150
@ NAND_CMD_STATUS
Definition: nand/core.h:146
@ NAND_CMD_ERASE2
Definition: nand/core.h:151
@ NAND_CMD_RESET
Definition: nand/core.h:152
@ NAND_CMD_PAGEPROG
Definition: nand/core.h:143
@ NAND_CMD_ERASE1
Definition: nand/core.h:145
@ NAND_STATUS_FAIL
Definition: nand/core.h:162
@ NAND_STATUS_READY
Definition: nand/core.h:165
#define ERROR_NAND_OPERATION_NOT_SUPPORTED
Definition: nand/core.h:219
@ LP_OPTIONS
Definition: nand/core.h:134
@ LP_OPTIONS16
Definition: nand/core.h:135
@ NAND_BUSWIDTH_16
Definition: nand/core.h:99
Representation of a single NAND block in a NAND device.
Definition: nand/core.h:21
int is_erased
True if the block has been erased.
Definition: nand/core.h:29
uint32_t offset
Offset to the block.
Definition: nand/core.h:23
int is_bad
True if the block is bad.
Definition: nand/core.h:32
uint32_t size
Size of the block.
Definition: nand/core.h:26
struct nand_flash_controller * controller
Definition: nand/core.h:50
int page_size
Definition: nand/core.h:56
struct nand_device * next
Definition: nand/core.h:61
int num_blocks
Definition: nand/core.h:59
struct nand_block * blocks
Definition: nand/core.h:60
bool use_raw
Definition: nand/core.h:58
int address_cycles
Definition: nand/core.h:55
int bus_width
Definition: nand/core.h:54
int erase_size
Definition: nand/core.h:57
const char * name
Definition: nand/core.h:48
struct nand_manufacturer * manufacturer
Definition: nand/core.h:52
struct nand_info * device
Definition: nand/core.h:53
int(* read_data)(struct nand_device *nand, void *data)
Read word of data from the NAND device.
Definition: nand/driver.h:51
int(* nand_ready)(struct nand_device *nand, int timeout)
Check if the NAND device is ready for more instructions with timeout.
Definition: nand/driver.h:68
int(* write_block_data)(struct nand_device *nand, uint8_t *data, int size)
Write a block of data to the NAND device.
Definition: nand/driver.h:54
int(* read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
Read a page from the NAND device.
Definition: nand/driver.h:64
int(* write_data)(struct nand_device *nand, uint16_t data)
Write word of data to the NAND device.
Definition: nand/driver.h:48
const char * name
Driver name that is used to select it from configuration files.
Definition: nand/driver.h:25
int(* command)(struct nand_device *nand, uint8_t command)
Issue a command to the NAND device.
Definition: nand/driver.h:42
int(* read_block_data)(struct nand_device *nand, uint8_t *data, int size)
Read a block of data from the NAND device.
Definition: nand/driver.h:57
int(* address)(struct nand_device *nand, uint8_t address)
Write an address to the NAND device.
Definition: nand/driver.h:45
int(* init)(struct nand_device *nand)
Initialize the NAND device.
Definition: nand/driver.h:36
int(* reset)(struct nand_device *nand)
Reset the NAND device.
Definition: nand/driver.h:39
int(* write_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
Write a page to the NAND device.
Definition: nand/driver.h:60
int chip_size
Definition: nand/core.h:86
int erase_size
Definition: nand/core.h:87
int page_size
Definition: nand/core.h:85
const char * name
Definition: nand/core.h:89
int options
Definition: nand/core.h:88
const char * name
Definition: nand/core.h:79
Definition: psoc6.c:83
static void write_data(FILE *f, const void *data, size_t len)
Definition: target.c:4189
static uint16_t le_to_h_u16(const uint8_t *buf)
Definition: types.h:122
#define NULL
Definition: usb.h:16
uint8_t status[4]
Definition: vdebug.c:17
uint8_t cmd
Definition: vdebug.c:1