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ecp2_3.c
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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 /***************************************************************************
4  * Copyright (C) 2022 by Daniel Anselmi *
5  * danselmi@gmx.ch *
6  ***************************************************************************/
7 
8 #ifdef HAVE_CONFIG_H
9 #include "config.h"
10 #endif
11 
12 #include "ecp2_3.h"
13 #include "lattice.h"
14 
15 #define LSCC_REFRESH 0x23
16 #define ISC_ENABLE 0x15
17 #define LSCC_RESET_ADDRESS 0x21
18 #define ISC_PROGRAM_USERCODE 0x1A
19 #define ISC_ERASE 0x03
20 #define READ_USERCODE 0x17
21 #define ISC_DISABLE 0x1E
22 #define LSCC_READ_STATUS 0x53
23 #define LSCC_BITSTREAM_BURST 0x02
24 #define PROGRAM_SPI 0x3A
25 
26 #define STATUS_DONE_BIT 0x00020000
27 #define STATUS_ERROR_BITS_ECP2 0x00040003
28 #define STATUS_ERROR_BITS_ECP3 0x00040007
29 #define REGISTER_ALL_BITS_1 0xffffffff
30 #define REGISTER_ALL_BITS_0 0x00000000
31 
32 int lattice_ecp2_3_read_status(struct jtag_tap *tap, uint32_t *status, uint32_t out, bool do_idle)
33 {
34  return lattice_read_u32_register(tap, LSCC_READ_STATUS, status, out, do_idle);
35 }
36 
37 int lattice_ecp2_3_read_usercode(struct jtag_tap *tap, uint32_t *usercode, uint32_t out)
38 {
39  return lattice_read_u32_register(tap, READ_USERCODE, usercode, out, false);
40 }
41 
42 int lattice_ecp2_3_write_usercode(struct lattice_pld_device *lattice_device, uint32_t usercode)
43 {
44  struct jtag_tap *tap = lattice_device->tap;
45  if (!tap)
46  return ERROR_FAIL;
47 
48  int retval = lattice_set_instr(tap, ISC_ENABLE, TAP_IDLE);
49  if (retval != ERROR_OK)
50  return retval;
51  jtag_add_runtest(5, TAP_IDLE);
52  jtag_add_sleep(20000);
53 
54  retval = lattice_set_instr(tap, ISC_PROGRAM_USERCODE, TAP_IDLE);
55  if (retval != ERROR_OK)
56  return retval;
57 
58  struct scan_field field;
59  uint8_t buffer[4];
60  h_u32_to_le(buffer, usercode);
61  field.num_bits = 32;
62  field.out_value = buffer;
63  field.in_value = NULL;
64  jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
65  jtag_add_runtest(5, TAP_IDLE);
66  jtag_add_sleep(2000);
67 
68  retval = lattice_set_instr(tap, ISC_DISABLE, TAP_IDLE);
69  if (retval != ERROR_OK)
70  return retval;
71  jtag_add_runtest(5, TAP_IDLE);
72  jtag_add_sleep(200000);
73 
74  retval = jtag_execute_queue();
75  if (retval != ERROR_OK)
76  return retval;
77  return lattice_verify_usercode(lattice_device, 0x0, usercode, REGISTER_ALL_BITS_1);
78 }
79 
80 static int lattice_ecp2_3_erase_device(struct lattice_pld_device *lattice_device)
81 {
82  struct jtag_tap *tap = lattice_device->tap;
83  if (!tap)
84  return ERROR_FAIL;
85 
86  /* program user code with all bits set */
87  int retval = lattice_set_instr(tap, ISC_PROGRAM_USERCODE, TAP_IRPAUSE);
88  if (retval != ERROR_OK)
89  return retval;
90  struct scan_field field;
91  uint8_t buffer[4] = {0xff, 0xff, 0xff, 0xff};
92  field.num_bits = 32;
93  field.out_value = buffer;
94  field.in_value = NULL;
95  jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
96  jtag_add_runtest(5, TAP_IDLE);
97  jtag_add_sleep(2000);
98 
99  /* verify every bit is set */
100  const uint32_t out = REGISTER_ALL_BITS_1;
101  const uint32_t mask = REGISTER_ALL_BITS_1;
102  const uint32_t expected_pre = REGISTER_ALL_BITS_1;
103  retval = lattice_verify_usercode(lattice_device, out, expected_pre, mask);
104  if (retval != ERROR_OK)
105  return retval;
106 
107  retval = lattice_set_instr(tap, ISC_ERASE, TAP_IDLE);
108  if (retval != ERROR_OK)
109  return retval;
110  jtag_add_runtest(5, TAP_IDLE);
111  if (lattice_device->family == LATTICE_ECP2)
112  jtag_add_sleep(100000);
113  else
114  jtag_add_sleep(2000000);
115 
116  retval = lattice_set_instr(tap, LSCC_RESET_ADDRESS, TAP_IDLE);
117  if (retval != ERROR_OK)
118  return retval;
119  jtag_add_runtest(5, TAP_IDLE);
120  jtag_add_sleep(2000);
121 
122  /* after erasing check all bits in user register are cleared */
123  const uint32_t expected_post = REGISTER_ALL_BITS_0;
124  return lattice_verify_usercode(lattice_device, out, expected_post, mask);
125 }
126 
127 static int lattice_ecp2_3_program_config_map(struct lattice_pld_device *lattice_device,
128  struct lattice_bit_file *bit_file)
129 {
130  struct jtag_tap *tap = lattice_device->tap;
131  if (!tap)
132  return ERROR_FAIL;
133 
134  int retval = lattice_set_instr(tap, LSCC_RESET_ADDRESS, TAP_IDLE);
135  if (retval != ERROR_OK)
136  return retval;
137  jtag_add_runtest(5, TAP_IDLE);
138  jtag_add_sleep(2000);
139 
140  struct scan_field field;
141  retval = lattice_set_instr(tap, LSCC_BITSTREAM_BURST, TAP_IDLE);
142  if (retval != ERROR_OK)
143  return retval;
144  field.num_bits = (bit_file->raw_bit.length - bit_file->offset) * 8;
145  field.out_value = bit_file->raw_bit.data + bit_file->offset;
146  field.in_value = NULL;
147  jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
148  jtag_add_runtest(256, TAP_IDLE);
149  jtag_add_sleep(2000);
150  return jtag_execute_queue();
151 }
152 
153 static int lattice_ecp2_3_exit_programming_mode(struct lattice_pld_device *lattice_device)
154 {
155  struct jtag_tap *tap = lattice_device->tap;
156  if (!tap)
157  return ERROR_FAIL;
158 
159  int retval = lattice_set_instr(tap, ISC_DISABLE, TAP_IDLE);
160  if (retval != ERROR_OK)
161  return retval;
162  jtag_add_runtest(5, TAP_IDLE);
163  jtag_add_sleep(200000);
164  retval = lattice_set_instr(tap, BYPASS, TAP_IDLE);
165  if (retval != ERROR_OK)
166  return retval;
167  jtag_add_runtest(100, TAP_IDLE);
168  jtag_add_sleep(1000);
169  return jtag_execute_queue();
170 }
171 
172 int lattice_ecp2_load(struct lattice_pld_device *lattice_device, struct lattice_bit_file *bit_file)
173 {
174  struct jtag_tap *tap = lattice_device->tap;
175  if (!tap)
176  return ERROR_FAIL;
177 
178  int retval = lattice_preload(lattice_device);
179  if (retval != ERROR_OK)
180  return retval;
181 
182  /* Enable the programming mode */
183  retval = lattice_set_instr(tap, LSCC_REFRESH, TAP_IDLE);
184  if (retval != ERROR_OK)
185  return retval;
186  retval = lattice_set_instr(tap, ISC_ENABLE, TAP_IDLE);
187  if (retval != ERROR_OK)
188  return retval;
189  jtag_add_runtest(5, TAP_IDLE);
190  jtag_add_sleep(20000);
191 
192  /* Erase the device */
193  retval = lattice_ecp2_3_erase_device(lattice_device);
194  if (retval != ERROR_OK)
195  return retval;
196 
197  /* Program Fuse Map */
198  retval = lattice_ecp2_3_program_config_map(lattice_device, bit_file);
199  if (retval != ERROR_OK)
200  return retval;
201 
202  retval = lattice_ecp2_3_exit_programming_mode(lattice_device);
203  if (retval != ERROR_OK)
204  return retval;
205 
206  const uint32_t out = REGISTER_ALL_BITS_1;
207  const uint32_t mask = STATUS_DONE_BIT | STATUS_ERROR_BITS_ECP2;
208  const uint32_t expected = STATUS_DONE_BIT;
209  return lattice_verify_status_register_u32(lattice_device, out, expected, mask, false);
210 }
211 
212 int lattice_ecp3_load(struct lattice_pld_device *lattice_device, struct lattice_bit_file *bit_file)
213 {
214  struct jtag_tap *tap = lattice_device->tap;
215  if (!tap)
216  return ERROR_FAIL;
217 
218  /* Program Bscan register */
219  int retval = lattice_preload(lattice_device);
220  if (retval != ERROR_OK)
221  return retval;
222 
223  /* Enable the programming mode */
224  retval = lattice_set_instr(tap, LSCC_REFRESH, TAP_IDLE);
225  if (retval != ERROR_OK)
226  return retval;
227  jtag_add_runtest(5, TAP_IDLE);
228  jtag_add_sleep(500000);
229  retval = lattice_set_instr(tap, ISC_ENABLE, TAP_IDLE);
230  if (retval != ERROR_OK)
231  return retval;
232  jtag_add_runtest(5, TAP_IDLE);
233  jtag_add_sleep(20000);
234 
235  retval = lattice_ecp2_3_erase_device(lattice_device);
236  if (retval != ERROR_OK)
237  return retval;
238 
239  /* Program Fuse Map */
240  retval = lattice_ecp2_3_program_config_map(lattice_device, bit_file);
241  if (retval != ERROR_OK)
242  return retval;
243 
244  retval = lattice_ecp2_3_exit_programming_mode(lattice_device);
245  if (retval != ERROR_OK)
246  return retval;
247 
248  const uint32_t out = REGISTER_ALL_BITS_1;
249  const uint32_t mask = STATUS_DONE_BIT | STATUS_ERROR_BITS_ECP3;
250  const uint32_t expected = STATUS_DONE_BIT;
251  return lattice_verify_status_register_u32(lattice_device, out, expected, mask, false);
252 }
253 
254 int lattice_ecp2_3_connect_spi_to_jtag(struct lattice_pld_device *pld_device_info)
255 {
256  if (!pld_device_info)
257  return ERROR_FAIL;
258 
259  struct jtag_tap *tap = pld_device_info->tap;
260  if (!tap)
261  return ERROR_FAIL;
262 
263  // erase configuration
264  int retval = lattice_set_instr(tap, ISC_ENABLE, TAP_IDLE);
265  if (retval != ERROR_OK)
266  return retval;
267  retval = lattice_set_instr(tap, ISC_ERASE, TAP_IDLE);
268  if (retval != ERROR_OK)
269  return retval;
270  retval = lattice_set_instr(tap, ISC_DISABLE, TAP_IDLE);
271  if (retval != ERROR_OK)
272  return retval;
273 
274  // connect jtag to spi pins
275  retval = lattice_set_instr(tap, PROGRAM_SPI, TAP_IDLE);
276  if (retval != ERROR_OK)
277  return retval;
278 
279  return jtag_execute_queue();
280 }
281 
282 int lattice_ecp2_3_disconnect_spi_from_jtag(struct lattice_pld_device *pld_device_info)
283 {
284  if (!pld_device_info)
285  return ERROR_FAIL;
286 
287  struct jtag_tap *tap = pld_device_info->tap;
288  if (!tap)
289  return ERROR_FAIL;
290 
291  int retval = lattice_set_instr(tap, BYPASS, TAP_IDLE);
292  if (retval != ERROR_OK)
293  return retval;
294 
295  return jtag_execute_queue();
296 }
297 
298 int lattice_ecp2_3_get_facing_read_bits(struct lattice_pld_device *pld_device_info, unsigned int *facing_read_bits)
299 {
300  if (!pld_device_info)
301  return ERROR_FAIL;
302 
303  *facing_read_bits = 1;
304 
305  return ERROR_OK;
306 }
307 
308 int lattice_ecp2_3_refresh(struct lattice_pld_device *lattice_device)
309 {
310  if (!lattice_device || !lattice_device->tap)
311  return ERROR_FAIL;
312 
313  int retval = lattice_set_instr(lattice_device->tap, LSCC_REFRESH, TAP_IDLE);
314  if (retval != ERROR_OK)
315  return retval;
316  return jtag_execute_queue();
317 }
lattice_ecp2_3_read_status
int lattice_ecp2_3_read_status(struct jtag_tap *tap, uint32_t *status, uint32_t out, bool do_idle)
Definition: ecp2_3.c:32
lattice_ecp2_3_disconnect_spi_from_jtag
int lattice_ecp2_3_disconnect_spi_from_jtag(struct lattice_pld_device *pld_device_info)
Definition: ecp2_3.c:282
lattice_ecp2_3_erase_device
static int lattice_ecp2_3_erase_device(struct lattice_pld_device *lattice_device)
Definition: ecp2_3.c:80
ISC_PROGRAM_USERCODE
#define ISC_PROGRAM_USERCODE
Definition: ecp2_3.c:18
LSCC_READ_STATUS
#define LSCC_READ_STATUS
Definition: ecp2_3.c:22
lattice_ecp2_3_read_usercode
int lattice_ecp2_3_read_usercode(struct jtag_tap *tap, uint32_t *usercode, uint32_t out)
Definition: ecp2_3.c:37
STATUS_DONE_BIT
#define STATUS_DONE_BIT
Definition: ecp2_3.c:26
lattice_ecp2_3_program_config_map
static int lattice_ecp2_3_program_config_map(struct lattice_pld_device *lattice_device, struct lattice_bit_file *bit_file)
Definition: ecp2_3.c:127
ISC_ENABLE
#define ISC_ENABLE
Definition: ecp2_3.c:16
READ_USERCODE
#define READ_USERCODE
Definition: ecp2_3.c:20
LSCC_REFRESH
#define LSCC_REFRESH
Definition: ecp2_3.c:15
lattice_ecp2_3_get_facing_read_bits
int lattice_ecp2_3_get_facing_read_bits(struct lattice_pld_device *pld_device_info, unsigned int *facing_read_bits)
Definition: ecp2_3.c:298
lattice_ecp3_load
int lattice_ecp3_load(struct lattice_pld_device *lattice_device, struct lattice_bit_file *bit_file)
Definition: ecp2_3.c:212
PROGRAM_SPI
#define PROGRAM_SPI
Definition: ecp2_3.c:24
ISC_DISABLE
#define ISC_DISABLE
Definition: ecp2_3.c:21
lattice_ecp2_3_exit_programming_mode
static int lattice_ecp2_3_exit_programming_mode(struct lattice_pld_device *lattice_device)
Definition: ecp2_3.c:153
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#define LSCC_BITSTREAM_BURST
Definition: ecp2_3.c:23
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#define LSCC_RESET_ADDRESS
Definition: ecp2_3.c:17
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int lattice_ecp2_3_write_usercode(struct lattice_pld_device *lattice_device, uint32_t usercode)
Definition: ecp2_3.c:42
lattice_ecp2_3_refresh
int lattice_ecp2_3_refresh(struct lattice_pld_device *lattice_device)
Definition: ecp2_3.c:308
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#define REGISTER_ALL_BITS_0
Definition: ecp2_3.c:30
ISC_ERASE
#define ISC_ERASE
Definition: ecp2_3.c:19
lattice_ecp2_3_connect_spi_to_jtag
int lattice_ecp2_3_connect_spi_to_jtag(struct lattice_pld_device *pld_device_info)
Definition: ecp2_3.c:254
STATUS_ERROR_BITS_ECP2
#define STATUS_ERROR_BITS_ECP2
Definition: ecp2_3.c:27
REGISTER_ALL_BITS_1
#define REGISTER_ALL_BITS_1
Definition: ecp2_3.c:29
STATUS_ERROR_BITS_ECP3
#define STATUS_ERROR_BITS_ECP3
Definition: ecp2_3.c:28
lattice_ecp2_load
int lattice_ecp2_load(struct lattice_pld_device *lattice_device, struct lattice_bit_file *bit_file)
Definition: ecp2_3.c:172
ecp2_3.h
mask
int mask
Definition: esirisc.c:1741
BYPASS
#define BYPASS
Definition: gatemate.c:19
jtag_add_runtest
void jtag_add_runtest(unsigned int num_cycles, tap_state_t state)
Goes to TAP_IDLE (if we're not already there), cycle precisely num_cycles in the TAP_IDLE state,...
Definition: jtag/core.c:592
jtag_execute_queue
int jtag_execute_queue(void)
For software FIFO implementations, the queued commands can be executed during this call or earlier.
Definition: jtag/core.c:1037
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void jtag_add_sleep(uint32_t us)
Definition: jtag/core.c:870
jtag_add_dr_scan
void jtag_add_dr_scan(struct jtag_tap *active, int in_num_fields, const struct scan_field *in_fields, tap_state_t state)
Generate a DR SCAN using the fields passed to the function.
Definition: jtag/core.c:451
TAP_IDLE
@ TAP_IDLE
Definition: jtag.h:53
TAP_IRPAUSE
@ TAP_IRPAUSE
Definition: jtag.h:52
lattice_verify_status_register_u32
int lattice_verify_status_register_u32(struct lattice_pld_device *lattice_device, uint32_t out, uint32_t expected, uint32_t mask, bool do_idle)
Definition: lattice.c:241
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int lattice_set_instr(struct jtag_tap *tap, uint8_t new_instr, tap_state_t endstate)
Definition: lattice.c:62
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int lattice_preload(struct lattice_pld_device *lattice_device)
Definition: lattice.c:147
lattice_read_u32_register
int lattice_read_u32_register(struct jtag_tap *tap, uint8_t cmd, uint32_t *in_val, uint32_t out_val, bool do_idle)
Definition: lattice.c:100
lattice_verify_usercode
int lattice_verify_usercode(struct lattice_pld_device *lattice_device, uint32_t out, uint32_t expected, uint32_t mask)
Definition: lattice.c:187
LATTICE_ECP2
@ LATTICE_ECP2
Definition: lattice_bit.h:24
ERROR_FAIL
#define ERROR_FAIL
Definition: log.h:170
ERROR_OK
#define ERROR_OK
Definition: log.h:164
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Definition: jtag.h:101
jtag_tap::expected
uint8_t * expected
Capture-IR expected value.
Definition: jtag.h:112
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Definition: lattice_bit.h:15
lattice_bit_file::offset
size_t offset
Definition: lattice_bit.h:17
lattice_bit_file::raw_bit
struct raw_bit_file raw_bit
Definition: lattice_bit.h:16
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Definition: lattice.h:17
lattice_pld_device::tap
struct jtag_tap * tap
Definition: lattice.h:18
lattice_pld_device::family
enum lattice_family_e family
Definition: lattice.h:20
raw_bit_file::data
uint8_t * data
Definition: raw_bit.h:16
raw_bit_file::length
size_t length
Definition: raw_bit.h:15
scan_field
This structure defines a single scan field in the scan.
Definition: jtag.h:87
scan_field::in_value
uint8_t * in_value
A pointer to a 32-bit memory location for data scanned out.
Definition: jtag.h:93
scan_field::out_value
const uint8_t * out_value
A pointer to value to be scanned into the device.
Definition: jtag.h:91
scan_field::num_bits
unsigned int num_bits
The number of bits this field specifies.
Definition: jtag.h:89
h_u32_to_le
static void h_u32_to_le(uint8_t *buf, uint32_t val)
Definition: types.h:178
NULL
#define NULL
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uint8_t status[4]
Definition: vdebug.c:17