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static uint32_t | arm_shift (uint8_t shift, uint32_t rm, uint32_t shift_amount, uint8_t *carry) |
static uint32_t | arm_shifter_operand (struct arm_sim_interface *sim, int variant, union arm_shifter_operand shifter_operand, uint8_t *shifter_carry_out) |
int | arm_simulate_step (struct target *target, uint32_t *dry_run_pc) |
static int | arm_simulate_step_core (struct target *target, uint32_t *dry_run_pc, struct arm_sim_interface *sim) |
static uint32_t | armv4_5_get_cpsr (struct arm_sim_interface *sim, int pos, int bits) |
static enum arm_mode | armv4_5_get_mode (struct arm_sim_interface *sim) |
static uint32_t | armv4_5_get_reg (struct arm_sim_interface *sim, int reg) |
static uint32_t | armv4_5_get_reg_mode (struct arm_sim_interface *sim, int reg) |
static enum arm_state | armv4_5_get_state (struct arm_sim_interface *sim) |
static void | armv4_5_set_reg (struct arm_sim_interface *sim, int reg, uint32_t value) |
static void | armv4_5_set_reg_mode (struct arm_sim_interface *sim, int reg, uint32_t value) |
static void | armv4_5_set_state (struct arm_sim_interface *sim, enum arm_state mode) |
static int | pass_condition (uint32_t cpsr, uint32_t opcode) |
static int | thumb_pass_branch_condition (uint32_t cpsr, uint16_t opcode) |
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Definition at line 23 of file arm_simulator.c.
Referenced by arm_shifter_operand(), and arm_simulate_step_core().
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Definition at line 86 of file arm_simulator.c.
References arm_shift(), ARM_STATE_ARM, arm_sim_interface::get_cpsr, arm_sim_interface::get_reg_mode, arm_sim_interface::get_state, arm_shifter_operand::immediate, arm_shifter_operand::immediate_shift, LOG_ERROR, arm_shifter_operand::register_shift, arm_shifter_operand::rm, rs, arm_shifter_operand::rs, arm_shifter_operand::shift, and arm_shifter_operand::shift_imm.
Referenced by arm_simulate_step_core().
int arm_simulate_step | ( | struct target * | target, |
uint32_t * | dry_run_pc | ||
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Definition at line 695 of file arm_simulator.c.
References arm_simulate_step_core(), armv4_5_get_cpsr(), armv4_5_get_mode(), armv4_5_get_reg(), armv4_5_get_reg_mode(), armv4_5_get_state(), armv4_5_set_reg(), armv4_5_set_reg_mode(), armv4_5_set_state(), arm_sim_interface::get_cpsr, arm_sim_interface::get_mode, arm_sim_interface::get_reg, arm_sim_interface::get_reg_mode, arm_sim_interface::get_state, arm_sim_interface::set_reg, arm_sim_interface::set_reg_mode, arm_sim_interface::set_state, target_to_arm(), and arm_sim_interface::user_data.
Referenced by arm11_step(), arm7_9_resume(), arm7_9_step(), xscale_resume(), xscale_step(), and xscale_step_inner().
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Definition at line 228 of file arm_simulator.c.
References arm_load_store_multiple_instr::addressing_mode, ARM_ADC, ARM_ADD, ARM_AND, ARM_B, ARM_BIC, ARM_BL, ARM_BLX, ARM_BX, ARM_CMN, ARM_EOR, arm_evaluate_opcode(), ARM_LDM, ARM_LDR, ARM_LDRSH, ARM_MOV, ARM_MVN, ARM_ORR, ARM_RSB, ARM_RSC, ARM_SBC, arm_shift(), arm_shifter_operand(), ARM_STATE_ARM, ARM_STATE_THUMB, ARM_STM, ARM_SUB, ARM_TST, ARMV4_5_CPSR, arm_instruction::b_bl_bx_blx, arm_instruction::data_proc, ERROR_FAIL, ERROR_OK, arm_sim_interface::get_cpsr, arm_sim_interface::get_reg, arm_sim_interface::get_reg_mode, arm_sim_interface::get_state, arm_load_store_instr::index_mode, arm_instruction::info, arm_instruction::instruction_size, arm_instruction::load_store, arm_instruction::load_store_multiple, LOG_ERROR, LOG_WARNING, offset, arm_load_store_instr::offset, arm_load_store_instr::offset_mode, arm_instruction::opcode, pass_condition(), arm_data_proc_instr::rd, arm_load_store_instr::rd, arm_b_bl_bx_blx_instr::reg_operand, arm_load_store_multiple_instr::register_list, arm_data_proc_instr::rn, arm_load_store_instr::rn, arm_load_store_multiple_instr::rn, arm_load_store_multiple_instr::s, arm_sim_interface::set_reg, arm_sim_interface::set_reg_mode, arm_sim_interface::set_state, arm_data_proc_instr::shifter_operand, arm_b_bl_bx_blx_instr::target_address, target_read_u16(), target_read_u32(), target_write_u32(), thumb_evaluate_opcode(), thumb_pass_branch_condition(), arm_instruction::type, arm_load_store_instr::u, arm_data_proc_instr::variant, and arm_load_store_multiple_instr::w.
Referenced by arm_simulate_step().
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Definition at line 667 of file arm_simulator.c.
References bits, buf_get_u32(), arm::cpsr, arm_sim_interface::user_data, and reg::value.
Referenced by arm_simulate_step().
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Definition at line 681 of file arm_simulator.c.
References arm::core_state, mode, and arm_sim_interface::user_data.
Referenced by arm_simulate_step().
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Definition at line 637 of file arm_simulator.c.
References buf_get_u32(), arm::core_cache, reg_cache::reg_list, arm_sim_interface::user_data, and reg::value.
Referenced by arm_simulate_step().
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Definition at line 651 of file arm_simulator.c.
References ARMV4_5_CORE_REG_MODE, buf_get_u32(), arm::core_cache, arm::core_mode, and arm_sim_interface::user_data.
Referenced by arm_simulate_step().
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Definition at line 667 of file arm_simulator.c.
Referenced by arm_simulate_step().
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Definition at line 644 of file arm_simulator.c.
References buf_set_u32(), arm::core_cache, reg_cache::reg_list, arm_sim_interface::user_data, and reg::value.
Referenced by arm_simulate_step().
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Definition at line 659 of file arm_simulator.c.
References ARMV4_5_CORE_REG_MODE, buf_set_u32(), arm::core_cache, arm::core_mode, and arm_sim_interface::user_data.
Referenced by arm_simulate_step().
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Definition at line 681 of file arm_simulator.c.
Referenced by arm_simulate_step().
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Definition at line 130 of file arm_simulator.c.
References LOG_ERROR.
Referenced by arm_simulate_step_core(), and thumb_pass_branch_condition().
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Definition at line 219 of file arm_simulator.c.
References pass_condition().
Referenced by arm_simulate_step_core().