OpenOCD
rtos_riot_stackings.c
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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 /***************************************************************************
4  * Copyright (C) 2015 by Daniel Krebs *
5  * Daniel Krebs - github@daniel-krebs.net *
6  ***************************************************************************/
7 
8 #ifdef HAVE_CONFIG_H
9 #include "config.h"
10 #endif
11 
12 #include "rtos.h"
13 #include "target/armv7m.h"
15 
16 /* This works for the M0 and M34 stackings as xPSR is in a fixed
17  * location
18  */
20  const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
21  target_addr_t stack_ptr)
22 {
23  const int XPSR_OFFSET = 0x40;
24  return rtos_cortex_m_stack_align(target, stack_data, stacking,
25  stack_ptr, XPSR_OFFSET);
26 }
27 
28 /* see thread_arch.c */
30  { ARMV7M_R0, 0x24, 32 }, /* r0 */
31  { ARMV7M_R1, 0x28, 32 }, /* r1 */
32  { ARMV7M_R2, 0x2c, 32 }, /* r2 */
33  { ARMV7M_R3, 0x30, 32 }, /* r3 */
34  { ARMV7M_R4, 0x14, 32 }, /* r4 */
35  { ARMV7M_R5, 0x18, 32 }, /* r5 */
36  { ARMV7M_R6, 0x1c, 32 }, /* r6 */
37  { ARMV7M_R7, 0x20, 32 }, /* r7 */
38  { ARMV7M_R8, 0x04, 32 }, /* r8 */
39  { ARMV7M_R9, 0x08, 32 }, /* r9 */
40  { ARMV7M_R10, 0x0c, 32 }, /* r10 */
41  { ARMV7M_R11, 0x10, 32 }, /* r11 */
42  { ARMV7M_R12, 0x34, 32 }, /* r12 */
43  { ARMV7M_R13, -2, 32 }, /* sp */
44  { ARMV7M_R14, 0x38, 32 }, /* lr */
45  { ARMV7M_PC, 0x3c, 32 }, /* pc */
46  { ARMV7M_XPSR, 0x40, 32 }, /* xPSR */
47 };
48 
50  .stack_registers_size = 0x44,
51  .stack_growth_direction = -1,
52  .num_output_registers = ARMV7M_NUM_CORE_REGS,
53  .calculate_process_stack = rtos_riot_cortex_m_stack_align,
54  .register_offsets = rtos_riot_cortex_m0_stack_offsets
55 };
56 
57 /* see thread_arch.c */
59  { ARMV7M_R0, 0x24, 32 }, /* r0 */
60  { ARMV7M_R1, 0x28, 32 }, /* r1 */
61  { ARMV7M_R2, 0x2c, 32 }, /* r2 */
62  { ARMV7M_R3, 0x30, 32 }, /* r3 */
63  { ARMV7M_R4, 0x04, 32 }, /* r4 */
64  { ARMV7M_R5, 0x08, 32 }, /* r5 */
65  { ARMV7M_R6, 0x0c, 32 }, /* r6 */
66  { ARMV7M_R7, 0x10, 32 }, /* r7 */
67  { ARMV7M_R8, 0x14, 32 }, /* r8 */
68  { ARMV7M_R9, 0x18, 32 }, /* r9 */
69  { ARMV7M_R10, 0x1c, 32 }, /* r10 */
70  { ARMV7M_R11, 0x20, 32 }, /* r11 */
71  { ARMV7M_R12, 0x34, 32 }, /* r12 */
72  { ARMV7M_R13, -2, 32 }, /* sp */
73  { ARMV7M_R14, 0x38, 32 }, /* lr */
74  { ARMV7M_PC, 0x3c, 32 }, /* pc */
75  { ARMV7M_XPSR, 0x40, 32 }, /* xPSR */
76 };
77 
79  .stack_registers_size = 0x44,
80  .stack_growth_direction = -1,
81  .num_output_registers = ARMV7M_NUM_CORE_REGS,
82  .calculate_process_stack = rtos_riot_cortex_m_stack_align,
83  .register_offsets = rtos_riot_cortex_m34_stack_offsets
84 };
@ ARMV7M_R1
Definition: armv7m.h:108
@ ARMV7M_R6
Definition: armv7m.h:114
@ ARMV7M_R2
Definition: armv7m.h:109
@ ARMV7M_R3
Definition: armv7m.h:110
@ ARMV7M_R14
Definition: armv7m.h:124
@ ARMV7M_R9
Definition: armv7m.h:118
@ ARMV7M_R12
Definition: armv7m.h:122
@ ARMV7M_R0
Definition: armv7m.h:107
@ ARMV7M_R13
Definition: armv7m.h:123
@ ARMV7M_PC
Definition: armv7m.h:125
@ ARMV7M_R7
Definition: armv7m.h:115
@ ARMV7M_R4
Definition: armv7m.h:112
@ ARMV7M_XPSR
Definition: armv7m.h:127
@ ARMV7M_R8
Definition: armv7m.h:117
@ ARMV7M_R11
Definition: armv7m.h:120
@ ARMV7M_R10
Definition: armv7m.h:119
@ ARMV7M_R5
Definition: armv7m.h:113
#define ARMV7M_NUM_CORE_REGS
Definition: armv7m.h:216
const struct rtos_register_stacking rtos_riot_cortex_m0_stacking
static target_addr_t rtos_riot_cortex_m_stack_align(struct target *target, const uint8_t *stack_data, const struct rtos_register_stacking *stacking, target_addr_t stack_ptr)
static const struct stack_register_offset rtos_riot_cortex_m0_stack_offsets[ARMV7M_NUM_CORE_REGS]
static const struct stack_register_offset rtos_riot_cortex_m34_stack_offsets[ARMV7M_NUM_CORE_REGS]
const struct rtos_register_stacking rtos_riot_cortex_m34_stacking
target_addr_t rtos_cortex_m_stack_align(struct target *target, const uint8_t *stack_data, const struct rtos_register_stacking *stacking, target_addr_t stack_ptr, size_t xpsr_offset)
unsigned char stack_registers_size
Definition: rtos.h:92
Definition: target.h:120
uint64_t target_addr_t
Definition: types.h:335