23 #define RPC_CMNCR 0x0000
24 #define RPC_CMNCR_MD BIT(31)
25 #define RPC_CMNCR_MOIIO0(val) (((val) & 0x3) << 16)
26 #define RPC_CMNCR_MOIIO1(val) (((val) & 0x3) << 18)
27 #define RPC_CMNCR_MOIIO2(val) (((val) & 0x3) << 20)
28 #define RPC_CMNCR_MOIIO3(val) (((val) & 0x3) << 22)
29 #define RPC_CMNCR_MOIIO_HIZ (RPC_CMNCR_MOIIO0(3) | RPC_CMNCR_MOIIO1(3) | \
30 RPC_CMNCR_MOIIO2(3) | RPC_CMNCR_MOIIO3(3))
31 #define RPC_CMNCR_IO0FV(val) (((val) & 0x3) << 8)
32 #define RPC_CMNCR_IO2FV(val) (((val) & 0x3) << 12)
33 #define RPC_CMNCR_IO3FV(val) (((val) & 0x3) << 14)
34 #define RPC_CMNCR_IOFV_HIZ (RPC_CMNCR_IO0FV(3) | RPC_CMNCR_IO2FV(3) | \
36 #define RPC_CMNCR_BSZ(val) (((val) & 0x3) << 0)
38 #define RPC_SSLDR 0x0004
39 #define RPC_SSLDR_SPNDL(d) (((d) & 0x7) << 16)
40 #define RPC_SSLDR_SLNDL(d) (((d) & 0x7) << 8)
41 #define RPC_SSLDR_SCKDL(d) (((d) & 0x7) << 0)
43 #define RPC_DRCR 0x000C
44 #define RPC_DRCR_SSLN BIT(24)
45 #define RPC_DRCR_RBURST(v) (((v) & 0x1F) << 16)
46 #define RPC_DRCR_RCF BIT(9)
47 #define RPC_DRCR_RBE BIT(8)
48 #define RPC_DRCR_SSLE BIT(0)
50 #define RPC_DRCMR 0x0010
51 #define RPC_DRCMR_CMD(c) (((c) & 0xFF) << 16)
52 #define RPC_DRCMR_OCMD(c) (((c) & 0xFF) << 0)
54 #define RPC_DREAR 0x0014
55 #define RPC_DREAR_EAV(v) (((v) & 0xFF) << 16)
56 #define RPC_DREAR_EAC(v) (((v) & 0x7) << 0)
58 #define RPC_DROPR 0x0018
59 #define RPC_DROPR_OPD3(o) (((o) & 0xFF) << 24)
60 #define RPC_DROPR_OPD2(o) (((o) & 0xFF) << 16)
61 #define RPC_DROPR_OPD1(o) (((o) & 0xFF) << 8)
62 #define RPC_DROPR_OPD0(o) (((o) & 0xFF) << 0)
64 #define RPC_DRENR 0x001C
65 #define RPC_DRENR_CDB(o) (uint32_t)((((o) & 0x3) << 30))
66 #define RPC_DRENR_OCDB(o) (((o) & 0x3) << 28)
67 #define RPC_DRENR_ADB(o) (((o) & 0x3) << 24)
68 #define RPC_DRENR_OPDB(o) (((o) & 0x3) << 20)
69 #define RPC_DRENR_SPIDB(o) (((o) & 0x3) << 16)
70 #define RPC_DRENR_DME BIT(15)
71 #define RPC_DRENR_CDE BIT(14)
72 #define RPC_DRENR_OCDE BIT(12)
73 #define RPC_DRENR_ADE(v) (((v) & 0xF) << 8)
74 #define RPC_DRENR_OPDE(v) (((v) & 0xF) << 4)
76 #define RPC_SMCR 0x0020
77 #define RPC_SMCR_SSLKP BIT(8)
78 #define RPC_SMCR_SPIRE BIT(2)
79 #define RPC_SMCR_SPIWE BIT(1)
80 #define RPC_SMCR_SPIE BIT(0)
82 #define RPC_SMCMR 0x0024
83 #define RPC_SMCMR_CMD(c) (((c) & 0xFF) << 16)
84 #define RPC_SMCMR_OCMD(c) (((c) & 0xFF) << 0)
86 #define RPC_SMADR 0x0028
87 #define RPC_SMOPR 0x002C
88 #define RPC_SMOPR_OPD0(o) (((o) & 0xFF) << 0)
89 #define RPC_SMOPR_OPD1(o) (((o) & 0xFF) << 8)
90 #define RPC_SMOPR_OPD2(o) (((o) & 0xFF) << 16)
91 #define RPC_SMOPR_OPD3(o) (((o) & 0xFF) << 24)
93 #define RPC_SMENR 0x0030
94 #define RPC_SMENR_CDB(o) (((o) & 0x3) << 30)
95 #define RPC_SMENR_OCDB(o) (((o) & 0x3) << 28)
96 #define RPC_SMENR_ADB(o) (((o) & 0x3) << 24)
97 #define RPC_SMENR_OPDB(o) (((o) & 0x3) << 20)
98 #define RPC_SMENR_SPIDB(o) (((o) & 0x3) << 16)
99 #define RPC_SMENR_DME BIT(15)
100 #define RPC_SMENR_CDE BIT(14)
101 #define RPC_SMENR_OCDE BIT(12)
102 #define RPC_SMENR_ADE(v) (((v) & 0xF) << 8)
103 #define RPC_SMENR_OPDE(v) (((v) & 0xF) << 4)
104 #define RPC_SMENR_SPIDE(v) (((v) & 0xF) << 0)
106 #define RPC_SMRDR0 0x0038
107 #define RPC_SMRDR1 0x003C
108 #define RPC_SMWDR0 0x0040
109 #define RPC_SMWDR1 0x0044
110 #define RPC_CMNSR 0x0048
111 #define RPC_CMNSR_SSLF BIT(1)
112 #define RPC_CMNSR_TEND BIT(0)
114 #define RPC_DRDMCR 0x0058
115 #define RPC_DRDMCR_DMCYC(v) (((v) & 0xF) << 0)
117 #define RPC_DRDRENR 0x005C
118 #define RPC_DRDRENR_HYPE (0x5 << 12)
119 #define RPC_DRDRENR_ADDRE BIT(8)
120 #define RPC_DRDRENR_OPDRE BIT(4)
121 #define RPC_DRDRENR_DRDRE BIT(0)
123 #define RPC_SMDMCR 0x0060
124 #define RPC_SMDMCR_DMCYC(v) (((v) & 0xF) << 0)
126 #define RPC_SMDRENR 0x0064
127 #define RPC_SMDRENR_HYPE (0x5 << 12)
128 #define RPC_SMDRENR_ADDRE BIT(8)
129 #define RPC_SMDRENR_OPDRE BIT(4)
130 #define RPC_SMDRENR_SPIDRE BIT(0)
132 #define RPC_PHYCNT 0x007C
133 #define RPC_PHYCNT_CAL BIT(31)
134 #define PRC_PHYCNT_OCTA_AA BIT(22)
135 #define PRC_PHYCNT_OCTA_SA BIT(23)
136 #define PRC_PHYCNT_EXDS BIT(21)
137 #define RPC_PHYCNT_OCT BIT(20)
138 #define RPC_PHYCNT_WBUF2 BIT(4)
139 #define RPC_PHYCNT_WBUF BIT(2)
140 #define RPC_PHYCNT_MEM(v) (((v) & 0x3) << 0)
142 #define RPC_PHYINT 0x0088
143 #define RPC_PHYINT_RSTEN BIT(18)
144 #define RPC_PHYINT_WPEN BIT(17)
145 #define RPC_PHYINT_INTEN BIT(16)
146 #define RPC_PHYINT_RST BIT(2)
147 #define RPC_PHYINT_WP BIT(1)
148 #define RPC_PHYINT_INT BIT(0)
150 #define RPC_WBUF 0x8000
151 #define RPC_WBUF_SIZE 0x100
187 uint32_t clr, uint32_t set)
265 bool write,
const uint8_t *wbuf,
unsigned int wbuf_size)
270 if (wbuf_size != 0) {
287 wbuf_size / 4, wbuf);
334 if (wbuf_size == 0) {
335 buf_bswap32((uint8_t *)&wdata, (uint8_t *)&wdata, 4);
371 buf_bswap32((uint8_t *)&val32, (uint8_t *)&val32, 4);
403 for (i = 0; i <
count; i++) {
408 buffer[(2 * i) + 0] = rdata & 0xff;
409 buffer[(2 * i) + 1] = (rdata >> 8) & 0xff;
424 cfi_info =
bank->driver_priv;
432 uint32_t wordcount, uint32_t address)
442 uint32_t buffermask = buffersize - 1;
443 uint32_t bufferwsize = buffersize / 2;
446 if (address & buffermask) {
448 ", address 0x%" PRIx32
" not aligned to 2^%d boundary",
454 if (wordcount > bufferwsize) {
455 LOG_ERROR(
"Number of data words %" PRIu32
" exceeds available buffersize %"
456 PRIu32, wordcount, buffersize);
479 ", address 0x%" PRIx32
", size 0x%" PRIx32,
bank->base, address,
488 uint32_t wordcount, uint32_t address)
511 if (cfi_info->
qry[0] !=
'Q')
515 write_p = address & ~(
bank->bus_width - 1);
516 align = address - write_p;
518 LOG_INFO(
"Fixup %d unaligned head bytes", align);
526 for (
unsigned int i = align; (i <
bank->bus_width) && (
count > 0); i++,
count--) {
529 current_word[
bank->bus_width - i] = *
buffer++;
531 current_word[i] = *
buffer++;
537 write_p +=
bank->bus_width;
544 uint32_t buffermask = buffersize-1;
545 uint32_t bufferwsize = buffersize /
bank->bus_width;
548 while (
count >= (uint32_t)
bank->bus_width) {
550 if ((write_p & 0xff) == 0) {
551 LOG_INFO(
"Programming at 0x%08" PRIx32
", count 0x%08"
552 PRIx32
" bytes remaining", write_p,
count);
555 if ((bufferwsize > 0) && (
count >= buffersize) &&
556 !(write_p & buffermask)) {
560 write_p += buffersize;
568 for (
unsigned int i = 0; i <
bank->bus_width; i++)
569 current_word[i] = *
buffer++;
575 write_p +=
bank->bus_width;
595 for (
unsigned int i = 0; (i <
bank->bus_width) && (
count > 0); i++,
count--)
598 current_word[
bank->bus_width - i] = *
buffer++;
600 current_word[i] = *
buffer++;
616 LOG_DEBUG(
"reading buffer of %" PRIu32
" byte at 0x%8.8" PRIx32,
627 if (cfi_info->
qry[0] !=
'Q')
636 .flash_bank_command = rpchf_flash_bank_command,
Support functions to access arbitrary bits in a byte array.
uint32_t cfi_flash_address(struct flash_bank *bank, int sector, uint32_t offset)
int cfi_write_word(struct flash_bank *bank, uint8_t *word, uint32_t address)
int cfi_protect_check(struct flash_bank *bank)
int cfi_probe(struct flash_bank *bank)
int cfi_auto_probe(struct flash_bank *bank)
int cfi_get_info(struct flash_bank *bank, struct command_invocation *cmd)
int cfi_reset(struct flash_bank *bank)
int cfi_target_read_memory(struct flash_bank *bank, target_addr_t addr, uint32_t count, uint8_t *buffer)
int cfi_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last)
int cfi_send_command(struct flash_bank *bank, uint8_t cmd, uint32_t address)
int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char **argv)
int cfi_spansion_wait_status_busy(struct flash_bank *bank, int timeout)
int cfi_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
int cfi_spansion_unlock_seq(struct flash_bank *bank)
#define CFI_MAX_BUS_WIDTH
#define CMD_ARGV
Use this macro to access the arguments for the command being handled, rather than accessing the varia...
#define CMD_ARGC
Use this macro to access the number of arguments for the command being handled, rather than accessing...
#define ERROR_FLASH_OPER_UNSUPPORTED
#define ERROR_FLASH_BANK_NOT_PROBED
#define ERROR_FLASH_OPERATION_FAILED
#define ERROR_FLASH_DST_OUT_OF_BANK
int default_flash_blank_check(struct flash_bank *bank)
Provides default erased-bank check handling.
void default_flash_free_driver_priv(struct flash_bank *bank)
Deallocates bank->driver_priv.
void alive_sleep(uint64_t ms)
#define LOG_ERROR(expr ...)
#define ERROR_TIMEOUT_REACHED
#define LOG_INFO(expr ...)
#define LOG_DEBUG(expr ...)
static int rpchf_spansion_write_words(struct flash_bank *bank, const uint8_t *word, uint32_t wordcount, uint32_t address)
FLASH_BANK_COMMAND_HANDLER(rpchf_flash_bank_command)
const struct flash_driver renesas_rpchf_flash
static int rpchf_target_read_memory(struct flash_bank *bank, target_addr_t addr, uint32_t count, uint8_t *buffer)
#define RPC_CMNCR_BSZ(val)
#define RPC_SMDRENR_SPIDRE
#define RPC_SMDRENR_ADDRE
#define RPC_SMENR_OPDB(o)
#define RPC_SMENR_SPIDE(v)
static int rpc_hf_mode(struct target *target, bool manual)
static int rpchf_target_write_memory(struct flash_bank *bank, target_addr_t addr, uint32_t count, const uint8_t *buffer)
static int rpc_hf_xfer(struct target *target, target_addr_t addr, uint32_t wdata, uint32_t *rdata, enum rpc_hf_size size, bool write, const uint8_t *wbuf, unsigned int wbuf_size)
static int rpchf_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
#define RPC_SMENR_SPIDB(o)
#define RPC_DRDRENR_ADDRE
#define RPC_SMDMCR_DMCYC(v)
#define RPC_DRDMCR_DMCYC(v)
#define RPC_DRENR_SPIDB(o)
static int clrsetbits_u32(struct target *target, uint32_t reg, uint32_t clr, uint32_t set)
static int rpchf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
#define RPC_PHYCNT_MEM(v)
#define RPC_SMENR_OCDB(o)
static int rpchf_write_words(struct flash_bank *bank, const uint8_t *word, uint32_t wordcount, uint32_t address)
#define RPC_CMNCR_MOIIO_HIZ
#define RPC_CMNCR_IOFV_HIZ
#define RPC_DRENR_OCDB(o)
static int rpc_hf_wait_tend(struct target *target)
#define RPC_DRDRENR_DRDRE
#define RPC_DRCR_RBURST(v)
size_t size
Size of the control block search area.
int(* read_mem)(struct flash_bank *bank, target_addr_t addr, uint32_t count, uint8_t *buffer)
uint16_t max_buf_write_size
unsigned word_write_timeout
int(* write_mem)(struct flash_bank *bank, target_addr_t addr, uint32_t count, const uint8_t *buffer)
Provides details of a flash bank, available either on-chip or through a major interface.
Provides the implementation-independent structure that defines all of the callbacks required by OpenO...
const char * name
Gives a human-readable name of this flash driver, This field is used to select and initialize the dri...
int target_write_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
Write count items of size bytes to the memory of target at the address given.
int target_write_u32(struct target *target, target_addr_t address, uint32_t value)
int target_read_u32(struct target *target, target_addr_t address, uint32_t *value)
int target_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
Read count items of size bytes from the memory of target at the address given.
#define ERROR_TARGET_NOT_HALTED
static void buf_bswap32(uint8_t *dst, const uint8_t *src, size_t len)
Byte-swap buffer 32-bit.