OpenOCD
rtos_nuttx_stackings.c
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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 #ifdef HAVE_CONFIG_H
4 #include "config.h"
5 #endif
6 
7 #include "rtos.h"
8 #include "target/armv7m.h"
9 #include "rtos_nuttx_stackings.h"
10 #include "rtos_standard_stackings.h"
11 #include <target/riscv/riscv.h>
12 
13 /* see arch/arm/include/armv7-m/irq_cmnvector.h */
14 static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
15  { ARMV7M_R0, 0x28, 32 }, /* r0 */
16  { ARMV7M_R1, 0x2c, 32 }, /* r1 */
17  { ARMV7M_R2, 0x30, 32 }, /* r2 */
18  { ARMV7M_R3, 0x34, 32 }, /* r3 */
19  { ARMV7M_R4, 0x08, 32 }, /* r4 */
20  { ARMV7M_R5, 0x0c, 32 }, /* r5 */
21  { ARMV7M_R6, 0x10, 32 }, /* r6 */
22  { ARMV7M_R7, 0x14, 32 }, /* r7 */
23  { ARMV7M_R8, 0x18, 32 }, /* r8 */
24  { ARMV7M_R9, 0x1c, 32 }, /* r9 */
25  { ARMV7M_R10, 0x20, 32 }, /* r10 */
26  { ARMV7M_R11, 0x24, 32 }, /* r11 */
27  { ARMV7M_R12, 0x38, 32 }, /* r12 */
28  { ARMV7M_R13, 0, 32 }, /* sp */
29  { ARMV7M_R14, 0x3c, 32 }, /* lr */
30  { ARMV7M_PC, 0x40, 32 }, /* pc */
31  { ARMV7M_XPSR, 0x44, 32 }, /* xPSR */
32 };
33 
34 const struct rtos_register_stacking nuttx_stacking_cortex_m = {
35  .stack_registers_size = 0x48,
36  .stack_growth_direction = -1,
37  .num_output_registers = 17,
38  .register_offsets = nuttx_stack_offsets_cortex_m,
39 };
40 
41 static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = {
42  { ARMV7M_R0, 0x6c, 32 }, /* r0 */
43  { ARMV7M_R1, 0x70, 32 }, /* r1 */
44  { ARMV7M_R2, 0x74, 32 }, /* r2 */
45  { ARMV7M_R3, 0x78, 32 }, /* r3 */
46  { ARMV7M_R4, 0x08, 32 }, /* r4 */
47  { ARMV7M_R5, 0x0c, 32 }, /* r5 */
48  { ARMV7M_R6, 0x10, 32 }, /* r6 */
49  { ARMV7M_R7, 0x14, 32 }, /* r7 */
50  { ARMV7M_R8, 0x18, 32 }, /* r8 */
51  { ARMV7M_R9, 0x1c, 32 }, /* r9 */
52  { ARMV7M_R10, 0x20, 32 }, /* r10 */
53  { ARMV7M_R11, 0x24, 32 }, /* r11 */
54  { ARMV7M_R12, 0x7c, 32 }, /* r12 */
55  { ARMV7M_R13, 0, 32 }, /* sp */
56  { ARMV7M_R14, 0x80, 32 }, /* lr */
57  { ARMV7M_PC, 0x84, 32 }, /* pc */
58  { ARMV7M_XPSR, 0x88, 32 }, /* xPSR */
59 };
60 
61 const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
62  .stack_registers_size = 0x8c,
63  .stack_growth_direction = -1,
64  .num_output_registers = 17,
65  .register_offsets = nuttx_stack_offsets_cortex_m_fpu,
66 };
67 
68 static const struct stack_register_offset nuttx_stack_offsets_riscv[] = {
69  { GDB_REGNO_ZERO, -1, 32 },
70  { GDB_REGNO_RA, 0x04, 32 },
71  { GDB_REGNO_SP, 0x08, 32 },
72  { GDB_REGNO_GP, 0x0c, 32 },
73  { GDB_REGNO_TP, 0x10, 32 },
74  { GDB_REGNO_T0, 0x14, 32 },
75  { GDB_REGNO_T1, 0x18, 32 },
76  { GDB_REGNO_T2, 0x1c, 32 },
77  { GDB_REGNO_FP, 0x20, 32 },
78  { GDB_REGNO_S1, 0x24, 32 },
79  { GDB_REGNO_A0, 0x28, 32 },
80  { GDB_REGNO_A1, 0x2c, 32 },
81  { GDB_REGNO_A2, 0x30, 32 },
82  { GDB_REGNO_A3, 0x34, 32 },
83  { GDB_REGNO_A4, 0x38, 32 },
84  { GDB_REGNO_A5, 0x3c, 32 },
85  { GDB_REGNO_A6, 0x40, 32 },
86  { GDB_REGNO_A7, 0x44, 32 },
87  { GDB_REGNO_S2, 0x48, 32 },
88  { GDB_REGNO_S3, 0x4c, 32 },
89  { GDB_REGNO_S4, 0x50, 32 },
90  { GDB_REGNO_S5, 0x54, 32 },
91  { GDB_REGNO_S6, 0x58, 32 },
92  { GDB_REGNO_S7, 0x5c, 32 },
93  { GDB_REGNO_S8, 0x60, 32 },
94  { GDB_REGNO_S9, 0x64, 32 },
95  { GDB_REGNO_S10, 0x68, 32 },
96  { GDB_REGNO_S11, 0x6c, 32 },
97  { GDB_REGNO_T3, 0x70, 32 },
98  { GDB_REGNO_T4, 0x74, 32 },
99  { GDB_REGNO_T5, 0x78, 32 },
100  { GDB_REGNO_T6, 0x7c, 32 },
101  { GDB_REGNO_PC, 0x00, 32 },
102 };
103 
104 const struct rtos_register_stacking nuttx_riscv_stacking = {
105  .stack_registers_size = 33 * 4,
106  .stack_growth_direction = -1,
107  .num_output_registers = 33,
108  .calculate_process_stack = rtos_generic_stack_align8,
109  .register_offsets = nuttx_stack_offsets_riscv,
110 };
111 
112 static int nuttx_esp_xtensa_stack_read(struct target *target,
113  int64_t stack_ptr, const struct rtos_register_stacking *stacking,
114  uint8_t *stack_data)
115 {
116  int retval = target_read_buffer(target, stack_ptr, stacking->stack_registers_size, stack_data);
117  if (retval != ERROR_OK)
118  return retval;
119 
120  stack_data[4] &= ~0x10; /* Clear exception bit in PS */
121 
122  return ERROR_OK;
123 }
124 
125 static const struct stack_register_offset nuttx_stack_offsets_esp32[] = {
126  { 0, 0x00, 32 }, /* PC */
127  { 1, 0x08, 32 }, /* A0 */
128  { 2, 0x0c, 32 }, /* A1 */
129  { 3, 0x10, 32 }, /* A2 */
130  { 4, 0x14, 32 }, /* A3 */
131  { 5, 0x18, 32 }, /* A4 */
132  { 6, 0x1c, 32 }, /* A5 */
133  { 7, 0x20, 32 }, /* A6 */
134  { 8, 0x24, 32 }, /* A7 */
135  { 9, 0x28, 32 }, /* A8 */
136  { 10, 0x2c, 32 }, /* A9 */
137  { 11, 0x30, 32 }, /* A10 */
138  { 12, 0x34, 32 }, /* A11 */
139  { 13, 0x38, 32 }, /* A12 */
140  { 14, 0x3c, 32 }, /* A13 */
141  { 15, 0x40, 32 }, /* A14 */
142  { 16, 0x44, 32 }, /* A15 */
143  /* A16-A63 aren't in the stack frame because they've been flushed to the stack earlier */
144  { 17, -1, 32 }, /* A16 */
145  { 18, -1, 32 }, /* A17 */
146  { 19, -1, 32 }, /* A18 */
147  { 20, -1, 32 }, /* A19 */
148  { 21, -1, 32 }, /* A20 */
149  { 22, -1, 32 }, /* A21 */
150  { 23, -1, 32 }, /* A22 */
151  { 24, -1, 32 }, /* A23 */
152  { 25, -1, 32 }, /* A24 */
153  { 26, -1, 32 }, /* A25 */
154  { 27, -1, 32 }, /* A26 */
155  { 28, -1, 32 }, /* A27 */
156  { 29, -1, 32 }, /* A28 */
157  { 30, -1, 32 }, /* A29 */
158  { 31, -1, 32 }, /* A30 */
159  { 32, -1, 32 }, /* A31 */
160  { 33, -1, 32 }, /* A32 */
161  { 34, -1, 32 }, /* A33 */
162  { 35, -1, 32 }, /* A34 */
163  { 36, -1, 32 }, /* A35 */
164  { 37, -1, 32 }, /* A36 */
165  { 38, -1, 32 }, /* A37 */
166  { 39, -1, 32 }, /* A38 */
167  { 40, -1, 32 }, /* A39 */
168  { 41, -1, 32 }, /* A40 */
169  { 42, -1, 32 }, /* A41 */
170  { 43, -1, 32 }, /* A42 */
171  { 44, -1, 32 }, /* A43 */
172  { 45, -1, 32 }, /* A44 */
173  { 46, -1, 32 }, /* A45 */
174  { 47, -1, 32 }, /* A46 */
175  { 48, -1, 32 }, /* A47 */
176  { 49, -1, 32 }, /* A48 */
177  { 50, -1, 32 }, /* A49 */
178  { 51, -1, 32 }, /* A50 */
179  { 52, -1, 32 }, /* A51 */
180  { 53, -1, 32 }, /* A52 */
181  { 54, -1, 32 }, /* A53 */
182  { 55, -1, 32 }, /* A54 */
183  { 56, -1, 32 }, /* A55 */
184  { 57, -1, 32 }, /* A56 */
185  { 58, -1, 32 }, /* A57 */
186  { 59, -1, 32 }, /* A58 */
187  { 60, -1, 32 }, /* A59 */
188  { 61, -1, 32 }, /* A60 */
189  { 62, -1, 32 }, /* A61 */
190  { 63, -1, 32 }, /* A62 */
191  { 64, -1, 32 }, /* A63 */
192  { 65, 0x58, 32 }, /* lbeg */
193  { 66, 0x5c, 32 }, /* lend */
194  { 67, 0x60, 32 }, /* lcount */
195  { 68, 0x48, 32 }, /* SAR */
196  { 69, -1, 32 }, /* windowbase */
197  { 70, -1, 32 }, /* windowstart */
198  { 71, -1, 32 }, /* configid0 */
199  { 72, -1, 32 }, /* configid1 */
200  { 73, 0x04, 32 }, /* PS */
201  { 74, -1, 32 }, /* threadptr */
202  { 75, -1, 32 }, /* br */
203  { 76, 0x54, 32 }, /* scompare1 */
204  { 77, -1, 32 }, /* acclo */
205  { 78, -1, 32 }, /* acchi */
206  { 79, -1, 32 }, /* m0 */
207  { 80, -1, 32 }, /* m1 */
208  { 81, -1, 32 }, /* m2 */
209  { 82, -1, 32 }, /* m3 */
210  { 83, -1, 32 }, /* expstate */
211  { 84, -1, 32 }, /* f64r_lo */
212  { 85, -1, 32 }, /* f64r_hi */
213  { 86, -1, 32 }, /* f64s */
214  { 87, -1, 32 }, /* f0 */
215  { 88, -1, 32 }, /* f1 */
216  { 89, -1, 32 }, /* f2 */
217  { 90, -1, 32 }, /* f3 */
218  { 91, -1, 32 }, /* f4 */
219  { 92, -1, 32 }, /* f5 */
220  { 93, -1, 32 }, /* f6 */
221  { 94, -1, 32 }, /* f7 */
222  { 95, -1, 32 }, /* f8 */
223  { 96, -1, 32 }, /* f9 */
224  { 97, -1, 32 }, /* f10 */
225  { 98, -1, 32 }, /* f11 */
226  { 99, -1, 32 }, /* f12 */
227  { 100, -1, 32 }, /* f13 */
228  { 101, -1, 32 }, /* f14 */
229  { 102, -1, 32 }, /* f15 */
230  { 103, -1, 32 }, /* fcr */
231  { 104, -1, 32 }, /* fsr */
232 };
233 
234 const struct rtos_register_stacking nuttx_esp32_stacking = {
235  .stack_registers_size = 26 * 4,
236  .stack_growth_direction = -1,
237  .num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_esp32),
238  .calculate_process_stack = rtos_generic_stack_align8,
239  .register_offsets = nuttx_stack_offsets_esp32,
240  .read_stack = nuttx_esp_xtensa_stack_read,
241 };
242 
243 static const struct stack_register_offset nuttx_stack_offsets_esp32s2[] = {
244  { 0, 0x00, 32 }, /* PC */
245  { 1, 0x08, 32 }, /* A0 */
246  { 2, 0x0c, 32 }, /* A1 */
247  { 3, 0x10, 32 }, /* A2 */
248  { 4, 0x14, 32 }, /* A3 */
249  { 5, 0x18, 32 }, /* A4 */
250  { 6, 0x1c, 32 }, /* A5 */
251  { 7, 0x20, 32 }, /* A6 */
252  { 8, 0x24, 32 }, /* A7 */
253  { 9, 0x28, 32 }, /* A8 */
254  { 10, 0x2c, 32 }, /* A9 */
255  { 11, 0x30, 32 }, /* A10 */
256  { 12, 0x34, 32 }, /* A11 */
257  { 13, 0x38, 32 }, /* A12 */
258  { 14, 0x3c, 32 }, /* A13 */
259  { 15, 0x40, 32 }, /* A14 */
260  { 16, 0x44, 32 }, /* A15 */
261  /* A16-A63 aren't in the stack frame because they've been flushed to the stack earlier */
262  { 17, -1, 32 }, /* A16 */
263  { 18, -1, 32 }, /* A17 */
264  { 19, -1, 32 }, /* A18 */
265  { 20, -1, 32 }, /* A19 */
266  { 21, -1, 32 }, /* A20 */
267  { 22, -1, 32 }, /* A21 */
268  { 23, -1, 32 }, /* A22 */
269  { 24, -1, 32 }, /* A23 */
270  { 25, -1, 32 }, /* A24 */
271  { 26, -1, 32 }, /* A25 */
272  { 27, -1, 32 }, /* A26 */
273  { 28, -1, 32 }, /* A27 */
274  { 29, -1, 32 }, /* A28 */
275  { 30, -1, 32 }, /* A29 */
276  { 31, -1, 32 }, /* A30 */
277  { 32, -1, 32 }, /* A31 */
278  { 33, -1, 32 }, /* A32 */
279  { 34, -1, 32 }, /* A33 */
280  { 35, -1, 32 }, /* A34 */
281  { 36, -1, 32 }, /* A35 */
282  { 37, -1, 32 }, /* A36 */
283  { 38, -1, 32 }, /* A37 */
284  { 39, -1, 32 }, /* A38 */
285  { 40, -1, 32 }, /* A39 */
286  { 41, -1, 32 }, /* A40 */
287  { 42, -1, 32 }, /* A41 */
288  { 43, -1, 32 }, /* A42 */
289  { 44, -1, 32 }, /* A43 */
290  { 45, -1, 32 }, /* A44 */
291  { 46, -1, 32 }, /* A45 */
292  { 47, -1, 32 }, /* A46 */
293  { 48, -1, 32 }, /* A47 */
294  { 49, -1, 32 }, /* A48 */
295  { 50, -1, 32 }, /* A49 */
296  { 51, -1, 32 }, /* A50 */
297  { 52, -1, 32 }, /* A51 */
298  { 53, -1, 32 }, /* A52 */
299  { 54, -1, 32 }, /* A53 */
300  { 55, -1, 32 }, /* A54 */
301  { 56, -1, 32 }, /* A55 */
302  { 57, -1, 32 }, /* A56 */
303  { 58, -1, 32 }, /* A57 */
304  { 59, -1, 32 }, /* A58 */
305  { 60, -1, 32 }, /* A59 */
306  { 61, -1, 32 }, /* A60 */
307  { 62, -1, 32 }, /* A61 */
308  { 63, -1, 32 }, /* A62 */
309  { 64, -1, 32 }, /* A63 */
310  { 65, 0x48, 32 }, /* SAR */
311  { 66, -1, 32 }, /* windowbase */
312  { 67, -1, 32 }, /* windowstart */
313  { 68, -1, 32 }, /* configid0 */
314  { 69, -1, 32 }, /* configid1 */
315  { 70, 0x04, 32 }, /* PS */
316  { 71, -1, 32 }, /* threadptr */
317  { 72, -1, 32 }, /* gpio_out */
318 };
319 
320 const struct rtos_register_stacking nuttx_esp32s2_stacking = {
321  .stack_registers_size = 25 * 4,
322  .stack_growth_direction = -1,
323  .num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_esp32s2),
324  .calculate_process_stack = rtos_generic_stack_align8,
325  .register_offsets = nuttx_stack_offsets_esp32s2,
326  .read_stack = nuttx_esp_xtensa_stack_read,
327 };
328 
329 static const struct stack_register_offset nuttx_stack_offsets_esp32s3[] = {
330  { 0, 0x00, 32 }, /* PC */
331  { 1, 0x08, 32 }, /* A0 */
332  { 2, 0x0c, 32 }, /* A1 */
333  { 3, 0x10, 32 }, /* A2 */
334  { 4, 0x14, 32 }, /* A3 */
335  { 5, 0x18, 32 }, /* A4 */
336  { 6, 0x1c, 32 }, /* A5 */
337  { 7, 0x20, 32 }, /* A6 */
338  { 8, 0x24, 32 }, /* A7 */
339  { 9, 0x28, 32 }, /* A8 */
340  { 10, 0x2c, 32 }, /* A9 */
341  { 11, 0x30, 32 }, /* A10 */
342  { 12, 0x34, 32 }, /* A11 */
343  { 13, 0x38, 32 }, /* A12 */
344  { 14, 0x3c, 32 }, /* A13 */
345  { 15, 0x40, 32 }, /* A14 */
346  { 16, 0x44, 32 }, /* A15 */
347  /* A16-A63 aren't in the stack frame because they've been flushed to the stack earlier */
348  { 17, -1, 32 }, /* A16 */
349  { 18, -1, 32 }, /* A17 */
350  { 19, -1, 32 }, /* A18 */
351  { 20, -1, 32 }, /* A19 */
352  { 21, -1, 32 }, /* A20 */
353  { 22, -1, 32 }, /* A21 */
354  { 23, -1, 32 }, /* A22 */
355  { 24, -1, 32 }, /* A23 */
356  { 25, -1, 32 }, /* A24 */
357  { 26, -1, 32 }, /* A25 */
358  { 27, -1, 32 }, /* A26 */
359  { 28, -1, 32 }, /* A27 */
360  { 29, -1, 32 }, /* A28 */
361  { 30, -1, 32 }, /* A29 */
362  { 31, -1, 32 }, /* A30 */
363  { 32, -1, 32 }, /* A31 */
364  { 33, -1, 32 }, /* A32 */
365  { 34, -1, 32 }, /* A33 */
366  { 35, -1, 32 }, /* A34 */
367  { 36, -1, 32 }, /* A35 */
368  { 37, -1, 32 }, /* A36 */
369  { 38, -1, 32 }, /* A37 */
370  { 39, -1, 32 }, /* A38 */
371  { 40, -1, 32 }, /* A39 */
372  { 41, -1, 32 }, /* A40 */
373  { 42, -1, 32 }, /* A41 */
374  { 43, -1, 32 }, /* A42 */
375  { 44, -1, 32 }, /* A43 */
376  { 45, -1, 32 }, /* A44 */
377  { 46, -1, 32 }, /* A45 */
378  { 47, -1, 32 }, /* A46 */
379  { 48, -1, 32 }, /* A47 */
380  { 49, -1, 32 }, /* A48 */
381  { 50, -1, 32 }, /* A49 */
382  { 51, -1, 32 }, /* A50 */
383  { 52, -1, 32 }, /* A51 */
384  { 53, -1, 32 }, /* A52 */
385  { 54, -1, 32 }, /* A53 */
386  { 55, -1, 32 }, /* A54 */
387  { 56, -1, 32 }, /* A55 */
388  { 57, -1, 32 }, /* A56 */
389  { 58, -1, 32 }, /* A57 */
390  { 59, -1, 32 }, /* A58 */
391  { 60, -1, 32 }, /* A59 */
392  { 61, -1, 32 }, /* A60 */
393  { 62, -1, 32 }, /* A61 */
394  { 63, -1, 32 }, /* A62 */
395  { 64, -1, 32 }, /* A63 */
396  { 65, 0x58, 32 }, /* lbeg */
397  { 66, 0x5c, 32 }, /* lend */
398  { 67, 0x60, 32 }, /* lcount */
399  { 68, 0x48, 32 }, /* SAR */
400  { 69, -1, 32 }, /* windowbase */
401  { 70, -1, 32 }, /* windowstart */
402  { 71, -1, 32 }, /* configid0 */
403  { 72, -1, 32 }, /* configid1 */
404  { 73, 0x04, 32 }, /* PS */
405  { 74, -1, 32 }, /* threadptr */
406  { 75, -1, 32 }, /* br */
407  { 76, 0x54, 32 }, /* scompare1 */
408  { 77, -1, 32 }, /* acclo */
409  { 78, -1, 32 }, /* acchi */
410  { 79, -1, 32 }, /* m0 */
411  { 80, -1, 32 }, /* m1 */
412  { 81, -1, 32 }, /* m2 */
413  { 82, -1, 32 }, /* m3 */
414  { 83, -1, 32 }, /* gpio_out */
415  { 84, -1, 32 }, /* f0 */
416  { 85, -1, 32 }, /* f1 */
417  { 86, -1, 32 }, /* f2 */
418  { 87, -1, 32 }, /* f3 */
419  { 88, -1, 32 }, /* f4 */
420  { 89, -1, 32 }, /* f5 */
421  { 90, -1, 32 }, /* f6 */
422  { 91, -1, 32 }, /* f7 */
423  { 92, -1, 32 }, /* f8 */
424  { 93, -1, 32 }, /* f9 */
425  { 94, -1, 32 }, /* f10 */
426  { 95, -1, 32 }, /* f11 */
427  { 96, -1, 32 }, /* f12 */
428  { 97, -1, 32 }, /* f13 */
429  { 98, -1, 32 }, /* f14 */
430  { 99, -1, 32 }, /* f15 */
431  { 100, -1, 32 }, /* fcr */
432  { 101, -1, 32 }, /* fsr */
433  { 102, -1, 32 }, /* accx_0 */
434  { 103, -1, 32 }, /* accx_1 */
435  { 104, -1, 32 }, /* qacc_h_0 */
436  { 105, -1, 32 }, /* qacc_h_1 */
437  { 106, -1, 32 }, /* qacc_h_2 */
438  { 107, -1, 32 }, /* qacc_h_3 */
439  { 108, -1, 32 }, /* qacc_h_4 */
440  { 109, -1, 32 }, /* qacc_l_0 */
441  { 110, -1, 32 }, /* qacc_l_1 */
442  { 111, -1, 32 }, /* qacc_l_2 */
443  { 112, -1, 32 }, /* qacc_l_3 */
444  { 113, -1, 32 }, /* qacc_l_4 */
445  { 114, -1, 32 }, /* sar_byte */
446  { 115, -1, 32 }, /* fft_bit_width */
447  { 116, -1, 32 }, /* ua_state_0 */
448  { 117, -1, 32 }, /* ua_state_1 */
449  { 118, -1, 32 }, /* ua_state_2 */
450  { 119, -1, 32 }, /* ua_state_3 */
451  { 120, -1, 128 }, /* q0 */
452  { 121, -1, 128 }, /* q1 */
453  { 122, -1, 128 }, /* q2 */
454  { 123, -1, 128 }, /* q3 */
455  { 124, -1, 128 }, /* q4 */
456  { 125, -1, 128 }, /* q5 */
457  { 126, -1, 128 }, /* q6 */
458  { 127, -1, 128 }, /* q7 */
459 };
460 
461 const struct rtos_register_stacking nuttx_esp32s3_stacking = {
462  .stack_registers_size = 26 * 4,
463  .stack_growth_direction = -1,
464  .num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_esp32s3),
465  .calculate_process_stack = rtos_generic_stack_align8,
466  .register_offsets = nuttx_stack_offsets_esp32s3,
467  .read_stack = nuttx_esp_xtensa_stack_read,
468 };
ARMV7M_R1
@ ARMV7M_R1
Definition: armv7m.h:108
ARMV7M_R6
@ ARMV7M_R6
Definition: armv7m.h:114
ARMV7M_R2
@ ARMV7M_R2
Definition: armv7m.h:109
ARMV7M_R3
@ ARMV7M_R3
Definition: armv7m.h:110
ARMV7M_R14
@ ARMV7M_R14
Definition: armv7m.h:124
ARMV7M_R9
@ ARMV7M_R9
Definition: armv7m.h:118
ARMV7M_R12
@ ARMV7M_R12
Definition: armv7m.h:122
ARMV7M_R0
@ ARMV7M_R0
Definition: armv7m.h:107
ARMV7M_R13
@ ARMV7M_R13
Definition: armv7m.h:123
ARMV7M_PC
@ ARMV7M_PC
Definition: armv7m.h:125
ARMV7M_R7
@ ARMV7M_R7
Definition: armv7m.h:115
ARMV7M_R4
@ ARMV7M_R4
Definition: armv7m.h:112
ARMV7M_XPSR
@ ARMV7M_XPSR
Definition: armv7m.h:127
ARMV7M_R8
@ ARMV7M_R8
Definition: armv7m.h:117
ARMV7M_R11
@ ARMV7M_R11
Definition: armv7m.h:120
ARMV7M_R10
@ ARMV7M_R10
Definition: armv7m.h:119
ARMV7M_R5
@ ARMV7M_R5
Definition: armv7m.h:113
GDB_REGNO_S8
@ GDB_REGNO_S8
Definition: gdb_regs.h:35
GDB_REGNO_S4
@ GDB_REGNO_S4
Definition: gdb_regs.h:31
GDB_REGNO_S11
@ GDB_REGNO_S11
Definition: gdb_regs.h:38
GDB_REGNO_ZERO
@ GDB_REGNO_ZERO
Definition: gdb_regs.h:9
GDB_REGNO_S5
@ GDB_REGNO_S5
Definition: gdb_regs.h:32
GDB_REGNO_T5
@ GDB_REGNO_T5
Definition: gdb_regs.h:41
GDB_REGNO_T6
@ GDB_REGNO_T6
Definition: gdb_regs.h:42
GDB_REGNO_A4
@ GDB_REGNO_A4
Definition: gdb_regs.h:24
GDB_REGNO_GP
@ GDB_REGNO_GP
Definition: gdb_regs.h:12
GDB_REGNO_S7
@ GDB_REGNO_S7
Definition: gdb_regs.h:34
GDB_REGNO_A1
@ GDB_REGNO_A1
Definition: gdb_regs.h:21
GDB_REGNO_A5
@ GDB_REGNO_A5
Definition: gdb_regs.h:25
GDB_REGNO_T2
@ GDB_REGNO_T2
Definition: gdb_regs.h:16
GDB_REGNO_S1
@ GDB_REGNO_S1
Definition: gdb_regs.h:19
GDB_REGNO_T3
@ GDB_REGNO_T3
Definition: gdb_regs.h:39
GDB_REGNO_SP
@ GDB_REGNO_SP
Definition: gdb_regs.h:11
GDB_REGNO_A6
@ GDB_REGNO_A6
Definition: gdb_regs.h:27
GDB_REGNO_FP
@ GDB_REGNO_FP
Definition: gdb_regs.h:18
GDB_REGNO_A0
@ GDB_REGNO_A0
Definition: gdb_regs.h:20
GDB_REGNO_A2
@ GDB_REGNO_A2
Definition: gdb_regs.h:22
GDB_REGNO_A7
@ GDB_REGNO_A7
Definition: gdb_regs.h:28
GDB_REGNO_RA
@ GDB_REGNO_RA
Definition: gdb_regs.h:10
GDB_REGNO_S9
@ GDB_REGNO_S9
Definition: gdb_regs.h:36
GDB_REGNO_PC
@ GDB_REGNO_PC
Definition: gdb_regs.h:45
GDB_REGNO_T4
@ GDB_REGNO_T4
Definition: gdb_regs.h:40
GDB_REGNO_S10
@ GDB_REGNO_S10
Definition: gdb_regs.h:37
GDB_REGNO_S2
@ GDB_REGNO_S2
Definition: gdb_regs.h:29
GDB_REGNO_TP
@ GDB_REGNO_TP
Definition: gdb_regs.h:13
GDB_REGNO_T1
@ GDB_REGNO_T1
Definition: gdb_regs.h:15
GDB_REGNO_S6
@ GDB_REGNO_S6
Definition: gdb_regs.h:33
GDB_REGNO_S3
@ GDB_REGNO_S3
Definition: gdb_regs.h:30
GDB_REGNO_T0
@ GDB_REGNO_T0
Definition: gdb_regs.h:14
GDB_REGNO_A3
@ GDB_REGNO_A3
Definition: gdb_regs.h:23
ERROR_OK
#define ERROR_OK
Definition: log.h:164
nuttx_stack_offsets_esp32s2
static const struct stack_register_offset nuttx_stack_offsets_esp32s2[]
Definition: rtos_nuttx_stackings.c:243
nuttx_stack_offsets_cortex_m_fpu
static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[]
Definition: rtos_nuttx_stackings.c:41
nuttx_stack_offsets_cortex_m
static const struct stack_register_offset nuttx_stack_offsets_cortex_m[]
Definition: rtos_nuttx_stackings.c:14
nuttx_esp32s2_stacking
const struct rtos_register_stacking nuttx_esp32s2_stacking
Definition: rtos_nuttx_stackings.c:320
nuttx_riscv_stacking
const struct rtos_register_stacking nuttx_riscv_stacking
Definition: rtos_nuttx_stackings.c:104
nuttx_esp32s3_stacking
const struct rtos_register_stacking nuttx_esp32s3_stacking
Definition: rtos_nuttx_stackings.c:461
nuttx_esp32_stacking
const struct rtos_register_stacking nuttx_esp32_stacking
Definition: rtos_nuttx_stackings.c:234
nuttx_stacking_cortex_m_fpu
const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu
Definition: rtos_nuttx_stackings.c:61
nuttx_stacking_cortex_m
const struct rtos_register_stacking nuttx_stacking_cortex_m
Definition: rtos_nuttx_stackings.c:34
nuttx_stack_offsets_esp32
static const struct stack_register_offset nuttx_stack_offsets_esp32[]
Definition: rtos_nuttx_stackings.c:125
nuttx_stack_offsets_esp32s3
static const struct stack_register_offset nuttx_stack_offsets_esp32s3[]
Definition: rtos_nuttx_stackings.c:329
nuttx_esp_xtensa_stack_read
static int nuttx_esp_xtensa_stack_read(struct target *target, int64_t stack_ptr, const struct rtos_register_stacking *stacking, uint8_t *stack_data)
Definition: rtos_nuttx_stackings.c:112
nuttx_stack_offsets_riscv
static const struct stack_register_offset nuttx_stack_offsets_riscv[]
Definition: rtos_nuttx_stackings.c:68
rtos_nuttx_stackings.h
rtos_generic_stack_align8
target_addr_t rtos_generic_stack_align8(struct target *target, const uint8_t *stack_data, const struct rtos_register_stacking *stacking, target_addr_t stack_ptr)
Definition: rtos_standard_stackings.c:126
rtos_standard_stackings.h
rtos_register_stacking
Definition: rtos.h:91
rtos_register_stacking::stack_registers_size
unsigned char stack_registers_size
Definition: rtos.h:92
stack_register_offset
Definition: rtos.h:83
target
Definition: target.h:116
target_read_buffer
int target_read_buffer(struct target *target, target_addr_t address, uint32_t size, uint8_t *buffer)
Definition: target.c:2407
ARRAY_SIZE
#define ARRAY_SIZE(x)
Compute the number of elements of a variable length array.
Definition: types.h:57