Go to the source code of this file.
Functions | |
| COMMAND_HANDLER (cortex_a_handle_cache_info_command) | |
| COMMAND_HANDLER (cortex_a_handle_dbginit_command) | |
| COMMAND_HANDLER (handle_cortex_a_dacrfixup_command) | |
| COMMAND_HANDLER (handle_cortex_a_mask_interrupts_command) | |
| static int | cortex_a_add_breakpoint (struct target *target, struct breakpoint *breakpoint) |
| static int | cortex_a_add_context_breakpoint (struct target *target, struct breakpoint *breakpoint) |
| static int | cortex_a_add_hybrid_breakpoint (struct target *target, struct breakpoint *breakpoint) |
| static int | cortex_a_add_watchpoint (struct target *target, struct watchpoint *watchpoint) |
| Add a watchpoint to an Cortex-A target. More... | |
| static int | cortex_a_assert_reset (struct target *target) |
| static int | cortex_a_bpwp_disable (struct arm_dpm *dpm, unsigned index_t) |
| static int | cortex_a_bpwp_enable (struct arm_dpm *dpm, unsigned index_t, uint32_t addr, uint32_t control) |
| static int | cortex_a_dap_write_memap_register_u32 (struct target *target, uint32_t address, uint32_t value) |
| static int | cortex_a_deassert_reset (struct target *target) |
| static int | cortex_a_debug_entry (struct target *target) |
| static void | cortex_a_deinit_target (struct target *target) |
| static int | cortex_a_dfsr_to_error_code (uint32_t dfsr) |
| static int | cortex_a_dpm_finish (struct arm_dpm *dpm) |
| static int | cortex_a_dpm_prepare (struct arm_dpm *dpm) |
| static int | cortex_a_dpm_setup (struct cortex_a_common *a, uint32_t didr) |
| static int | cortex_a_examine (struct target *target) |
| static int | cortex_a_examine_first (struct target *target) |
| static int | cortex_a_exec_opcode (struct target *target, uint32_t opcode, uint32_t *dscr_p) |
| static int | cortex_a_halt (struct target *target) |
| static int | cortex_a_halt_smp (struct target *target) |
| static int | cortex_a_handle_target_request (void *priv) |
| static int | cortex_a_init_arch_info (struct target *target, struct cortex_a_common *cortex_a, struct adiv5_dap *dap) |
| static int | cortex_a_init_debug_access (struct target *target) |
| static int | cortex_a_init_target (struct command_context *cmd_ctx, struct target *target) |
| static int | cortex_a_instr_cpsr_sync (struct arm_dpm *dpm) |
| static int | cortex_a_instr_read_data_dcc (struct arm_dpm *dpm, uint32_t opcode, uint32_t *data) |
| static int | cortex_a_instr_read_data_r0 (struct arm_dpm *dpm, uint32_t opcode, uint32_t *data) |
| static int | cortex_a_instr_read_data_r0_r1 (struct arm_dpm *dpm, uint32_t opcode, uint64_t *data) |
| static int | cortex_a_instr_read_data_rt_dcc (struct arm_dpm *dpm, uint8_t rt, uint32_t *data) |
| static int | cortex_a_instr_write_data_dcc (struct arm_dpm *dpm, uint32_t opcode, uint32_t data) |
| static int | cortex_a_instr_write_data_r0 (struct arm_dpm *dpm, uint32_t opcode, uint32_t data) |
| static int | cortex_a_instr_write_data_r0_r1 (struct arm_dpm *dpm, uint32_t opcode, uint64_t data) |
| static int | cortex_a_instr_write_data_rt_dcc (struct arm_dpm *dpm, uint8_t rt, uint32_t data) |
| static int | cortex_a_internal_restart (struct target *target) |
| static int | cortex_a_internal_restore (struct target *target, int current, target_addr_t *address, int handle_breakpoints, int debug_execution) |
| static int | cortex_a_mmu (struct target *target, int *enabled) |
| static int | cortex_a_mmu_modify (struct target *target, int enable) |
| static int | cortex_a_poll (struct target *target) |
| static int | cortex_a_post_debug_entry (struct target *target) |
| static int | cortex_a_post_memaccess (struct target *target, int phys_access) |
| static int | cortex_a_prep_memaccess (struct target *target, int phys_access) |
| static int | cortex_a_read_buffer (struct target *target, target_addr_t address, uint32_t count, uint8_t *buffer) |
| static int | cortex_a_read_copro (struct target *target, uint32_t opcode, uint32_t *data, uint32_t *dscr) |
| static int | cortex_a_read_cpu_memory (struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) |
| static int | cortex_a_read_cpu_memory_fast (struct target *target, uint32_t count, uint8_t *buffer, uint32_t *dscr) |
| static int | cortex_a_read_cpu_memory_slow (struct target *target, uint32_t size, uint32_t count, uint8_t *buffer, uint32_t *dscr) |
| static int | cortex_a_read_dcc (struct cortex_a_common *a, uint32_t *data, uint32_t *dscr_p) |
| static int | cortex_a_read_dfar_dfsr (struct target *target, uint32_t *dfar, uint32_t *dfsr, uint32_t *dscr) |
| static int | cortex_a_read_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) |
| static int | cortex_a_read_phys_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) |
| static int | cortex_a_remove_breakpoint (struct target *target, struct breakpoint *breakpoint) |
| static int | cortex_a_remove_watchpoint (struct target *target, struct watchpoint *watchpoint) |
| Remove a watchpoint from an Cortex-A target. More... | |
| static int | cortex_a_restore_context (struct target *target, bool bpwp) |
| static int | cortex_a_restore_cp15_control_reg (struct target *target) |
| static int | cortex_a_restore_smp (struct target *target, int handle_breakpoints) |
| static int | cortex_a_resume (struct target *target, int current, target_addr_t address, int handle_breakpoints, int debug_execution) |
| static int | cortex_a_set_breakpoint (struct target *target, struct breakpoint *breakpoint, uint8_t matchmode) |
| static int | cortex_a_set_context_breakpoint (struct target *target, struct breakpoint *breakpoint, uint8_t matchmode) |
| static int | cortex_a_set_dcc_mode (struct target *target, uint32_t mode, uint32_t *dscr) |
| static int | cortex_a_set_dscr_bits (struct target *target, unsigned long bit_mask, unsigned long value) |
| static int | cortex_a_set_hybrid_breakpoint (struct target *target, struct breakpoint *breakpoint) |
| static int | cortex_a_set_watchpoint (struct target *target, struct watchpoint *watchpoint) |
| Sets a watchpoint for an Cortex-A target in one of the watchpoint units. More... | |
| static int | cortex_a_step (struct target *target, int current, target_addr_t address, int handle_breakpoints) |
| static int | cortex_a_target_create (struct target *target, Jim_Interp *interp) |
| static int | cortex_a_unset_breakpoint (struct target *target, struct breakpoint *breakpoint) |
| static int | cortex_a_unset_watchpoint (struct target *target, struct watchpoint *watchpoint) |
| Unset an existing watchpoint and clear the used watchpoint unit. More... | |
| static int | cortex_a_virt2phys (struct target *target, target_addr_t virt, target_addr_t *phys) |
| static int | cortex_a_wait_dscr_bits (struct target *target, uint32_t mask, uint32_t value, uint32_t *dscr) |
| static int | cortex_a_wait_instrcmpl (struct target *target, uint32_t *dscr, bool force) |
| static int | cortex_a_write_buffer (struct target *target, target_addr_t address, uint32_t count, const uint8_t *buffer) |
| static int | cortex_a_write_copro (struct target *target, uint32_t opcode, uint32_t data, uint32_t *dscr) |
| static int | cortex_a_write_cpu_memory (struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer) |
| static int | cortex_a_write_cpu_memory_fast (struct target *target, uint32_t count, const uint8_t *buffer, uint32_t *dscr) |
| static int | cortex_a_write_cpu_memory_slow (struct target *target, uint32_t size, uint32_t count, const uint8_t *buffer, uint32_t *dscr) |
| static int | cortex_a_write_dcc (struct cortex_a_common *a, uint32_t data) |
| static int | cortex_a_write_dfar_dfsr (struct target *target, uint32_t dfar, uint32_t dfsr, uint32_t *dscr) |
| static int | cortex_a_write_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer) |
| static int | cortex_a_write_phys_memory (struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer) |
| static int | cortex_r4_target_create (struct target *target, Jim_Interp *interp) |
| static struct cortex_a_common * | dpm_to_a (struct arm_dpm *dpm) |
| static struct target * | get_cortex_a (struct target *target, int32_t coreid) |
| static unsigned int | ilog2 (unsigned int x) |
| static int | update_halt_gdb (struct target *target) |
Variables | |
| static const struct command_registration | cortex_a_command_handlers [] |
| static const struct command_registration | cortex_a_exec_command_handlers [] |
| static const struct command_registration | cortex_r4_command_handlers [] |
| static const struct command_registration | cortex_r4_exec_command_handlers [] |
| struct target_type | cortexa_target |
| struct target_type | cortexr4_target |
Function Documentation
◆ COMMAND_HANDLER() [1/4]
| COMMAND_HANDLER | ( | cortex_a_handle_cache_info_command | ) |
Definition at line 3268 of file cortex_a.c.
References armv7a_mmu_common::armv7a_cache, armv7a_handle_cache_info_command(), armv7a_common::armv7a_mmu, CMD, CMD_CTX, get_current_target(), and target_to_armv7a().
◆ COMMAND_HANDLER() [2/4]
| COMMAND_HANDLER | ( | cortex_a_handle_dbginit_command | ) |
Definition at line 3278 of file cortex_a.c.
References CMD_CTX, cortex_a_init_debug_access(), ERROR_FAIL, get_current_target(), LOG_ERROR, and target_was_examined().
◆ COMMAND_HANDLER() [3/4]
| COMMAND_HANDLER | ( | handle_cortex_a_dacrfixup_command | ) |
Definition at line 3317 of file cortex_a.c.
References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), CORTEX_A_DACRFIXUP_OFF, CORTEX_A_DACRFIXUP_ON, cortex_a_common::dacrfixup_mode, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), nvp::name, NULL, nvp_name2value(), nvp_value2name(), target_to_cortex_a(), and nvp::value.
◆ COMMAND_HANDLER() [4/4]
| COMMAND_HANDLER | ( | handle_cortex_a_mask_interrupts_command | ) |
Definition at line 3289 of file cortex_a.c.
References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), CORTEX_A_ISRMASK_OFF, CORTEX_A_ISRMASK_ON, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), cortex_a_common::isrmasking_mode, LOG_ERROR, nvp::name, NULL, nvp_name2value(), nvp_value2name(), target_to_cortex_a(), and nvp::value.
◆ cortex_a_add_breakpoint()
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Definition at line 1634 of file cortex_a.c.
References BKPT_HARD, cortex_a_common::brp_num_available, cortex_a_set_breakpoint(), ERROR_TARGET_RESOURCE_NOT_AVAILABLE, LOG_INFO, target_to_cortex_a(), and breakpoint::type.
◆ cortex_a_add_context_breakpoint()
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Definition at line 1650 of file cortex_a.c.
References BKPT_HARD, cortex_a_common::brp_num_available, cortex_a_set_context_breakpoint(), ERROR_TARGET_RESOURCE_NOT_AVAILABLE, LOG_INFO, target_to_cortex_a(), and breakpoint::type.
◆ cortex_a_add_hybrid_breakpoint()
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Definition at line 1666 of file cortex_a.c.
References BKPT_HARD, cortex_a_common::brp_num_available, cortex_a_set_hybrid_breakpoint(), ERROR_TARGET_RESOURCE_NOT_AVAILABLE, LOG_INFO, target_to_cortex_a(), and breakpoint::type.
◆ cortex_a_add_watchpoint()
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Add a watchpoint to an Cortex-A target.
If there are no watchpoint units available, an error response is returned.
- Parameters
-
target Pointer to the Cortex-A target to add a watchpoint to watchpoint Pointer to the watchpoint to be added
- Returns
- Error status while trying to add the watchpoint
Definition at line 1862 of file cortex_a.c.
References cortex_a_set_watchpoint(), ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, LOG_INFO, target_to_cortex_a(), and cortex_a_common::wrp_num_available.
◆ cortex_a_assert_reset()
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Definition at line 1903 of file cortex_a.c.
References adapter_assert_reset(), armv7a_common::arm, arm::core_cache, ERROR_FAIL, ERROR_OK, jtag_get_reset_config(), LOG_DEBUG, LOG_ERROR, register_cache_invalidate(), target::reset_halt, RESET_HAS_SRST, RESET_SRST_NO_GATING, target::state, TARGET_EVENT_RESET_ASSERT, target_handle_event(), target_has_event_action(), target_name(), TARGET_RESET, target_to_armv7a(), target_was_examined(), and transport_is_jtag().
◆ cortex_a_bpwp_disable()
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Definition at line 623 of file cortex_a.c.
References arm_dpm::arm, cortex_a_common::armv7a_common, cortex_a_dap_write_memap_register_u32(), CPUDBG_BCR_BASE, CPUDBG_WCR_BASE, armv7a_common::debug_base, dpm_to_a(), ERROR_FAIL, LOG_DEBUG, and arm::target.
Referenced by cortex_a_dpm_setup().
◆ cortex_a_bpwp_enable()
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Definition at line 587 of file cortex_a.c.
References addr, arm_dpm::arm, cortex_a_common::armv7a_common, cortex_a_dap_write_memap_register_u32(), CPUDBG_BCR_BASE, CPUDBG_BVR_BASE, CPUDBG_WCR_BASE, CPUDBG_WVR_BASE, armv7a_common::debug_base, dpm_to_a(), ERROR_FAIL, ERROR_OK, LOG_DEBUG, and arm::target.
Referenced by cortex_a_dpm_setup().
◆ cortex_a_dap_write_memap_register_u32()
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Definition at line 318 of file cortex_a.c.
References armv7a_common::debug_ap, mem_ap_write_atomic_u32(), and target_to_armv7a().
Referenced by cortex_a_bpwp_disable(), cortex_a_bpwp_enable(), cortex_a_set_breakpoint(), cortex_a_set_context_breakpoint(), cortex_a_set_hybrid_breakpoint(), cortex_a_set_watchpoint(), cortex_a_unset_breakpoint(), and cortex_a_unset_watchpoint().
◆ cortex_a_deassert_reset()
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Definition at line 1943 of file cortex_a.c.
References adapter_deassert_reset(), cortex_a_poll(), CPUDBG_DRCR, armv7a_common::debug_ap, armv7a_common::debug_base, DRCR_HALT, ERROR_OK, LOG_DEBUG, LOG_WARNING, mem_ap_write_atomic_u32(), target::reset_halt, target::state, TARGET_HALTED, target_name(), target_to_armv7a(), TARGET_UNKNOWN, and target_was_examined().
◆ cortex_a_debug_entry()
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Definition at line 1036 of file cortex_a.c.
References armv7a_common::arm, arm_dpm_read_current_registers(), arm_dpm_read_reg(), arm_dpm_report_dscr(), arm_dpm_report_wfar(), CPUDBG_DSCR, cortex_a_common::cpudbg_dscr, CPUDBG_WFAR, DBG_REASON_WATCHPOINT, armv7a_common::debug_ap, armv7a_common::debug_base, target::debug_reason, armv7a_common::dpm, DSCR_ITR_EN, ERROR_OK, LOG_DEBUG, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), armv7a_common::post_debug_entry, arm::spsr, target_to_armv7a(), and target_to_cortex_a().
Referenced by cortex_a_poll().
◆ cortex_a_deinit_target()
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Definition at line 3195 of file cortex_a.c.
References arm_dpm::arm, arm_free_reg_cache(), cortex_a_common::armv7a_common, cortex_a_common::brp_list, CPUDBG_DSCR, dap_put_ap(), arm_dpm::dbp, armv7a_common::debug_ap, armv7a_common::debug_base, armv7a_common::dpm, arm_dpm::dscr, DSCR_HALT_DBG_MODE, arm_dpm::dwp, ERROR_OK, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), target::private_config, target_to_cortex_a(), target_was_examined(), and cortex_a_common::wrp_list.
◆ cortex_a_dfsr_to_error_code()
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Definition at line 2130 of file cortex_a.c.
References ERROR_TARGET_DATA_ABORT, ERROR_TARGET_TRANSLATION_FAULT, ERROR_TARGET_UNALIGNED_ACCESS, and status.
Referenced by cortex_a_read_cpu_memory(), and cortex_a_write_cpu_memory().
◆ cortex_a_dpm_finish()
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◆ cortex_a_dpm_prepare()
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Definition at line 382 of file cortex_a.c.
References arm_dpm::arm, armv7a_common::arm, ARMV4_5_MRC, cortex_a_common::armv7a_common, cortex_a_exec_opcode(), cortex_a_wait_instrcmpl(), dpm_to_a(), DSCR_DTR_RX_FULL, ERROR_OK, LOG_ERROR, and arm::target.
Referenced by cortex_a_dpm_setup().
◆ cortex_a_dpm_setup()
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Definition at line 647 of file cortex_a.c.
References arm_dpm::arm, armv7a_common::arm, arm_dpm_initialize(), arm_dpm_setup(), cortex_a_common::armv7a_common, arm_dpm::bpwp_disable, arm_dpm::bpwp_enable, cortex_a_bpwp_disable(), cortex_a_bpwp_enable(), cortex_a_dpm_finish(), cortex_a_dpm_prepare(), cortex_a_instr_cpsr_sync(), cortex_a_instr_read_data_dcc(), cortex_a_instr_read_data_r0(), cortex_a_instr_read_data_r0_r1(), cortex_a_instr_write_data_dcc(), cortex_a_instr_write_data_r0(), cortex_a_instr_write_data_r0_r1(), arm_dpm::didr, armv7a_common::dpm, ERROR_OK, arm_dpm::finish, arm_dpm::instr_cpsr_sync, arm_dpm::instr_read_data_dcc, arm_dpm::instr_read_data_r0, arm_dpm::instr_read_data_r0_r1, arm_dpm::instr_write_data_dcc, arm_dpm::instr_write_data_r0, arm_dpm::instr_write_data_r0_r1, and arm_dpm::prepare.
Referenced by cortex_a_examine_first().
◆ cortex_a_examine()
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Definition at line 3098 of file cortex_a.c.
References cortex_a_examine_first(), cortex_a_init_debug_access(), and ERROR_OK.
◆ cortex_a_examine_first()
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Definition at line 2912 of file cortex_a.c.
References adiv5_ap::ap_num, adiv5_private_config::ap_num, AP_TYPE_APB_AP, adiv5_dap::apsel, armv7a_common::arm, ARM_CORE_TYPE_SEC_EXT, ARM_CORE_TYPE_VIRT_EXT, ARM_CS_C9_DEVTYPE_CORE_DEBUG, cortex_a_common::armv7a_common, BRP_CONTEXT, cortex_a_common::brp_list, BRP_NORMAL, cortex_a_common::brp_num, cortex_a_common::brp_num_available, cortex_a_common::brp_num_context, cortex_a_brp::brpn, target::cmd_name, cortex_a_brp::control, cortex_a_wrp::control, arm::core_type, target::coreid, cortex_a_dpm_setup(), CPUDBG_CPUID, CPUDBG_DIDR, CPUDBG_ID_PFR1, CPUDBG_OSLAR, CPUDBG_OSLSR, CPUDBG_PRSR, cortex_a_common::cpuid, arm::dap, dap_find_get_ap(), dap_get_ap(), dap_lookup_cs_component(), target::dbgbase, target::dbgbase_set, armv7a_common::debug_ap, armv7a_common::debug_base, cortex_a_common::didr, DP_APSEL_INVALID, ERROR_FAIL, ERROR_OK, ERROR_TARGET_INIT_FAILED, LOG_DEBUG, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_WARNING, mem_ap_init(), mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), adiv5_ap::memaccess_tck, OSLSR_OSLK, OSLSR_OSLM, OSLSR_OSLM0, OSLSR_OSLM1, target::private_config, PRSR_POWERUP_STATUS, PRSR_STICKY_RESET_STATUS, target::state, TARGET_ADDR_FMT, target_name(), target_set_examined(), target_to_cortex_a(), TARGET_UNKNOWN, target_was_examined(), cortex_a_brp::type, cortex_a_brp::used, cortex_a_wrp::used, cortex_a_brp::value, cortex_a_wrp::value, cortex_a_common::wrp_list, cortex_a_common::wrp_num, cortex_a_common::wrp_num_available, and cortex_a_wrp::wrpn.
Referenced by cortex_a_examine().
◆ cortex_a_exec_opcode()
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Definition at line 283 of file cortex_a.c.
References cortex_a_wait_instrcmpl(), CPUDBG_ITR, armv7a_common::debug_ap, armv7a_common::debug_base, ERROR_OK, LOG_DEBUG, LOG_ERROR, mem_ap_write_u32(), and target_to_armv7a().
Referenced by cortex_a_dpm_prepare(), cortex_a_instr_cpsr_sync(), cortex_a_instr_read_data_dcc(), cortex_a_instr_read_data_r0(), cortex_a_instr_read_data_rt_dcc(), cortex_a_instr_write_data_dcc(), cortex_a_instr_write_data_r0(), cortex_a_instr_write_data_r0_r1(), cortex_a_instr_write_data_rt_dcc(), cortex_a_read_copro(), cortex_a_read_cpu_memory(), cortex_a_read_cpu_memory_fast(), cortex_a_read_cpu_memory_slow(), cortex_a_write_copro(), cortex_a_write_cpu_memory(), and cortex_a_write_cpu_memory_slow().
◆ cortex_a_halt()
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Definition at line 806 of file cortex_a.c.
References cortex_a_wait_dscr_bits(), CPUDBG_DRCR, DBG_REASON_DBGRQ, armv7a_common::debug_ap, armv7a_common::debug_base, target::debug_reason, DRCR_HALT, DSCR_CORE_HALTED, ERROR_OK, LOG_ERROR, mem_ap_write_atomic_u32(), and target_to_armv7a().
Referenced by cortex_a_halt_smp().
◆ cortex_a_halt_smp()
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Definition at line 689 of file cortex_a.c.
References cortex_a_halt(), foreach_smp_target, target::smp_targets, target::state, target_list::target, TARGET_HALTED, and target_was_examined().
Referenced by update_halt_gdb().
◆ cortex_a_handle_target_request()
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Definition at line 2871 of file cortex_a.c.
References CPUDBG_DSCR, CPUDBG_DTRTX, target::dbg_msg_enabled, armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_DTR_TX_FULL, ERROR_FAIL, ERROR_OK, LOG_ERROR, mem_ap_read_atomic_u32(), priv, target::state, target_request(), TARGET_RUNNING, target_to_armv7a(), target_was_examined(), and timeval_ms().
Referenced by cortex_a_init_arch_info().
◆ cortex_a_init_arch_info()
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Definition at line 3124 of file cortex_a.c.
References armv7a_common::arm, cortex_a_common::armv7a_common, armv7a_init_arch_info(), armv7a_common::armv7a_mmu, cortex_a_common::common_magic, CORTEX_A_COMMON_MAGIC, cortex_a_handle_target_request(), cortex_a_post_debug_entry(), cortex_a_read_phys_memory(), arm::dap, ERROR_OK, armv7a_common::examine_debug_reason, NULL, armv7a_common::post_debug_entry, armv7a_common::pre_restore_context, armv7a_mmu_common::read_physical_memory, target_register_timer_callback(), and TARGET_TIMER_TYPE_PERIODIC.
Referenced by cortex_a_target_create(), and cortex_r4_target_create().
◆ cortex_a_init_debug_access()
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Definition at line 208 of file cortex_a.c.
References cortex_a_poll(), CPUDBG_DSCCR, CPUDBG_DSCR, CPUDBG_DSMCR, CPUDBG_LOCKACCESS, adiv5_ap::dap, dap_run(), armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_HALT_DBG_MODE, ERROR_OK, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), mem_ap_write_u32(), and target_to_armv7a().
Referenced by COMMAND_HANDLER(), and cortex_a_examine().
◆ cortex_a_init_target()
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Definition at line 3116 of file cortex_a.c.
References arm_semihosting_init(), and ERROR_OK.
◆ cortex_a_instr_cpsr_sync()
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Definition at line 496 of file cortex_a.c.
References arm_dpm::arm, ARMV4_5_MCR, cortex_a_exec_opcode(), DSCR_INSTR_COMP, and arm::target.
Referenced by cortex_a_dpm_setup().
◆ cortex_a_instr_read_data_dcc()
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Definition at line 507 of file cortex_a.c.
References armv7a_common::arm, cortex_a_common::armv7a_common, cortex_a_exec_opcode(), cortex_a_read_dcc(), dpm_to_a(), DSCR_INSTR_COMP, ERROR_OK, and arm::target.
Referenced by cortex_a_dpm_setup().
◆ cortex_a_instr_read_data_r0()
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Definition at line 545 of file cortex_a.c.
References armv7a_common::arm, cortex_a_common::armv7a_common, cortex_a_exec_opcode(), cortex_a_instr_read_data_rt_dcc(), dpm_to_a(), DSCR_INSTR_COMP, ERROR_OK, and arm::target.
Referenced by cortex_a_dpm_setup(), and cortex_a_instr_read_data_r0_r1().
◆ cortex_a_instr_read_data_r0_r1()
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Definition at line 564 of file cortex_a.c.
References cortex_a_instr_read_data_r0(), cortex_a_instr_read_data_rt_dcc(), and ERROR_OK.
Referenced by cortex_a_dpm_setup().
◆ cortex_a_instr_read_data_rt_dcc()
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Definition at line 525 of file cortex_a.c.
References armv7a_common::arm, ARMV4_5_MCR, cortex_a_common::armv7a_common, cortex_a_exec_opcode(), cortex_a_read_dcc(), dpm_to_a(), DSCR_INSTR_COMP, ERROR_OK, ERROR_TARGET_INVALID, and arm::target.
Referenced by cortex_a_instr_read_data_r0(), and cortex_a_instr_read_data_r0_r1().
◆ cortex_a_instr_write_data_dcc()
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Definition at line 416 of file cortex_a.c.
References armv7a_common::arm, cortex_a_common::armv7a_common, cortex_a_exec_opcode(), cortex_a_write_dcc(), dpm_to_a(), DSCR_INSTR_COMP, ERROR_OK, and arm::target.
Referenced by cortex_a_dpm_setup().
◆ cortex_a_instr_write_data_r0()
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Definition at line 454 of file cortex_a.c.
References armv7a_common::arm, cortex_a_common::armv7a_common, cortex_a_exec_opcode(), cortex_a_instr_write_data_rt_dcc(), dpm_to_a(), DSCR_INSTR_COMP, ERROR_OK, and arm::target.
Referenced by cortex_a_dpm_setup().
◆ cortex_a_instr_write_data_r0_r1()
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Definition at line 474 of file cortex_a.c.
References armv7a_common::arm, cortex_a_common::armv7a_common, cortex_a_exec_opcode(), cortex_a_instr_write_data_rt_dcc(), dpm_to_a(), DSCR_INSTR_COMP, ERROR_OK, and arm::target.
Referenced by cortex_a_dpm_setup().
◆ cortex_a_instr_write_data_rt_dcc()
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Definition at line 433 of file cortex_a.c.
References armv7a_common::arm, ARMV4_5_MRC, cortex_a_common::armv7a_common, cortex_a_exec_opcode(), cortex_a_write_dcc(), dpm_to_a(), DSCR_INSTR_COMP, ERROR_OK, ERROR_TARGET_INVALID, and arm::target.
Referenced by cortex_a_instr_write_data_r0(), and cortex_a_instr_write_data_r0_r1().
◆ cortex_a_internal_restart()
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Definition at line 932 of file cortex_a.c.
References armv7a_common::arm, arm::core_cache, cortex_a_wait_dscr_bits(), CPUDBG_DRCR, CPUDBG_DSCR, DBG_REASON_NOTHALTED, armv7a_common::debug_ap, armv7a_common::debug_base, target::debug_reason, DRCR_CLEAR_EXCEPTIONS, DRCR_RESTART, DSCR_CORE_RESTARTED, DSCR_INSTR_COMP, DSCR_ITR_EN, ERROR_OK, LOG_ERROR, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), register_cache_invalidate(), target::state, TARGET_RUNNING, and target_to_armv7a().
Referenced by cortex_a_restore_smp(), and cortex_a_resume().
◆ cortex_a_internal_restore()
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Definition at line 834 of file cortex_a.c.
References breakpoint::address, armv7a_common::arm, arm_dpm_modeswitch(), ARM_MODE_ANY, ARM_STATE_AARCH64, ARM_STATE_ARM, ARM_STATE_JAZELLE, ARM_STATE_THUMB, ARM_STATE_THUMB_EE, ARMV7M_PRIMASK, ARMV7M_XPSR, breakpoint_find(), buf_get_u32(), buf_set_u32(), arm::core_cache, arm::core_state, cortex_a_restore_context(), cortex_a_restore_cp15_control_reg(), DBG_REASON_NOTHALTED, target::debug_reason, reg::dirty, armv7a_common::dpm, ERROR_FAIL, ERROR_OK, LOG_DEBUG, LOG_ERROR, arm::pc, register_cache_invalidate(), target::state, target_free_all_working_areas(), TARGET_RUNNING, target_to_armv7a(), reg::valid, and reg::value.
Referenced by cortex_a_restore_smp(), and cortex_a_resume().
◆ cortex_a_mmu()
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Definition at line 3225 of file cortex_a.c.
References cortex_a_common::armv7a_common, armv7a_common::armv7a_mmu, ERROR_OK, ERROR_TARGET_NOT_HALTED, armv7a_common::is_armv7r, LOG_TARGET_ERROR, armv7a_mmu_common::mmu_enabled, target::state, TARGET_HALTED, target_to_armv7a(), and target_to_cortex_a().
Referenced by cortex_a_post_memaccess(), cortex_a_prep_memaccess(), and cortex_a_virt2phys().
◆ cortex_a_mmu_modify()
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Definition at line 168 of file cortex_a.c.
References armv7a_common::arm, cortex_a_common::cp15_control_reg, cortex_a_common::cp15_control_reg_curr, ERROR_FAIL, ERROR_OK, LOG_DEBUG, LOG_ERROR, arm::mcr, target_to_armv7a(), and target_to_cortex_a().
Referenced by cortex_a_post_memaccess(), cortex_a_prep_memaccess(), and cortex_a_virt2phys().
◆ cortex_a_poll()
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Definition at line 749 of file cortex_a.c.
References arm_semihosting(), cortex_a_common::armv7a_common, gdb_service::core, cortex_a_debug_entry(), CPUDBG_DSCR, cortex_a_common::cpudbg_dscr, armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_CORE_HALTED, DSCR_CORE_RESTARTED, DSCR_RUN_MODE, ERROR_OK, target::gdb_service, get_cortex_a(), LOG_DEBUG, mem_ap_read_atomic_u32(), target::smp, target::state, gdb_service::target, target_call_event_callbacks(), TARGET_DEBUG_RUNNING, TARGET_EVENT_DEBUG_HALTED, TARGET_EVENT_HALTED, TARGET_HALTED, TARGET_RUNNING, target_to_cortex_a(), and update_halt_gdb().
Referenced by cortex_a_deassert_reset(), cortex_a_init_debug_access(), cortex_a_step(), and update_halt_gdb().
◆ cortex_a_post_debug_entry()
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Definition at line 1115 of file cortex_a.c.
References armv7a_common::arm, arm_dpm_modeswitch(), ARM_MODE_ANY, ARM_MODE_SVC, armv7a_mmu_common::armv7a_cache, cortex_a_common::armv7a_common, armv7a_identify_cache(), armv7a_common::armv7a_mmu, armv7a_read_ttbcr(), arm::core_mode, cortex_a_common::cp15_control_reg, cortex_a_common::cp15_control_reg_curr, cortex_a_common::cp15_dacr_reg, cortex_a_common::curr_mode, armv7a_cache_common::d_u_cache_enabled, armv7a_common::dpm, ERROR_OK, armv7a_cache_common::i_cache_enabled, armv7a_cache_common::info, armv7a_common::is_armv7r, LOG_DEBUG, armv7a_mmu_common::mmu_enabled, arm::mrc, and target_to_cortex_a().
Referenced by cortex_a_init_arch_info().
◆ cortex_a_post_memaccess()
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Definition at line 142 of file cortex_a.c.
References armv7a_common::arm, arm_dpm_modeswitch(), ARM_MODE_ANY, CORTEX_A_DACRFIXUP_ON, cortex_a_mmu(), cortex_a_mmu_modify(), cortex_a_common::cp15_dacr_reg, cortex_a_common::dacrfixup_mode, armv7a_common::dpm, ERROR_OK, arm::mcr, target_to_armv7a(), and target_to_cortex_a().
Referenced by cortex_a_read_memory(), cortex_a_read_phys_memory(), cortex_a_write_memory(), and cortex_a_write_phys_memory().
◆ cortex_a_prep_memaccess()
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Definition at line 112 of file cortex_a.c.
References armv7a_common::arm, arm_dpm_modeswitch(), ARM_MODE_SVC, CORTEX_A_DACRFIXUP_ON, cortex_a_mmu(), cortex_a_mmu_modify(), cortex_a_common::dacrfixup_mode, armv7a_common::dpm, ERROR_OK, arm::mcr, target_to_armv7a(), and target_to_cortex_a().
Referenced by cortex_a_read_memory(), cortex_a_read_phys_memory(), cortex_a_write_memory(), and cortex_a_write_phys_memory().
◆ cortex_a_read_buffer()
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Definition at line 2803 of file cortex_a.c.
References buffer, count, ERROR_OK, size, and target_read_memory().
◆ cortex_a_read_copro()
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Definition at line 2027 of file cortex_a.c.
References ARMV4_5_MCR, cortex_a_exec_opcode(), cortex_a_wait_dscr_bits(), CPUDBG_DTRTX, armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_DTRTX_FULL_LATCHED, ERROR_OK, mem_ap_read_atomic_u32(), and target_to_armv7a().
Referenced by cortex_a_read_dfar_dfsr().
◆ cortex_a_read_cpu_memory()
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Definition at line 2579 of file cortex_a.c.
References armv7a_common::arm, arm_reg_current(), ARMV4_5_MRC, buffer, cortex_a_dfsr_to_error_code(), cortex_a_exec_opcode(), cortex_a_read_cpu_memory_fast(), cortex_a_read_cpu_memory_slow(), cortex_a_read_dfar_dfsr(), cortex_a_set_dcc_mode(), cortex_a_wait_instrcmpl(), cortex_a_write_dfar_dfsr(), count, CPUDBG_DRCR, CPUDBG_DSCR, CPUDBG_DTRRX, CPUDBG_DTRTX, armv7a_common::debug_ap, armv7a_common::debug_base, reg::dirty, DRCR_CLEAR_EXCEPTIONS, DSCR_DTRRX_FULL_LATCHED, DSCR_DTRTX_FULL_LATCHED, DSCR_EXT_DCC_NON_BLOCKING, DSCR_STICKY_ABORT_IMPRECISE, DSCR_STICKY_ABORT_PRECISE, dummy, ERROR_OK, ERROR_TARGET_DATA_ABORT, ERROR_TARGET_NOT_HALTED, LOG_DEBUG, LOG_ERROR, LOG_TARGET_ERROR, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), size, target::state, TARGET_HALTED, and target_to_armv7a().
Referenced by cortex_a_read_memory(), and cortex_a_read_phys_memory().
◆ cortex_a_read_cpu_memory_fast()
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Definition at line 2492 of file cortex_a.c.
References ARMV4_5_LDC, buffer, cortex_a_exec_opcode(), cortex_a_set_dcc_mode(), cortex_a_wait_dscr_bits(), cortex_a_wait_instrcmpl(), count, CPUDBG_DTRTX, CPUDBG_ITR, armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_DTRTX_FULL_LATCHED, DSCR_EXT_DCC_FAST_MODE, DSCR_EXT_DCC_NON_BLOCKING, DSCR_STICKY_ABORT_IMPRECISE, DSCR_STICKY_ABORT_PRECISE, ERROR_OK, mem_ap_read_atomic_u32(), mem_ap_read_buf_noincr(), mem_ap_write_atomic_u32(), target_buffer_set_u32(), and target_to_armv7a().
Referenced by cortex_a_read_cpu_memory().
◆ cortex_a_read_cpu_memory_slow()
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Definition at line 2415 of file cortex_a.c.
References armv7a_common::arm, arm_reg_current(), ARMV4_5_LDRB_IP, ARMV4_5_LDRH_IP, ARMV4_5_LDRW_IP, ARMV4_5_MCR, buffer, cortex_a_exec_opcode(), cortex_a_set_dcc_mode(), cortex_a_wait_dscr_bits(), count, CPUDBG_DTRTX, armv7a_common::debug_ap, armv7a_common::debug_base, reg::dirty, DSCR_DTRTX_FULL_LATCHED, DSCR_EXT_DCC_NON_BLOCKING, DSCR_STICKY_ABORT_IMPRECISE, DSCR_STICKY_ABORT_PRECISE, ERROR_OK, mem_ap_read_atomic_u32(), size, target_buffer_set_u16(), target_buffer_set_u32(), and target_to_armv7a().
Referenced by cortex_a_read_cpu_memory().
◆ cortex_a_read_dcc()
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Definition at line 353 of file cortex_a.c.
References armv7a_common::arm, cortex_a_common::armv7a_common, cortex_a_wait_dscr_bits(), CPUDBG_DTRTX, armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_DTR_TX_FULL, DSCR_INSTR_COMP, ERROR_OK, LOG_ERROR, mem_ap_read_atomic_u32(), and arm::target.
Referenced by cortex_a_instr_read_data_dcc(), and cortex_a_instr_read_data_rt_dcc().
◆ cortex_a_read_dfar_dfsr()
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Definition at line 2061 of file cortex_a.c.
References ARMV4_5_MRC, cortex_a_read_copro(), and ERROR_OK.
Referenced by cortex_a_read_cpu_memory(), and cortex_a_write_cpu_memory().
◆ cortex_a_read_memory()
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Definition at line 2749 of file cortex_a.c.
References buffer, cortex_a_post_memaccess(), cortex_a_prep_memaccess(), cortex_a_read_cpu_memory(), count, LOG_DEBUG, size, and TARGET_ADDR_FMT.
◆ cortex_a_read_phys_memory()
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Definition at line 2729 of file cortex_a.c.
References buffer, cortex_a_post_memaccess(), cortex_a_prep_memaccess(), cortex_a_read_cpu_memory(), count, ERROR_COMMAND_SYNTAX_ERROR, LOG_DEBUG, size, and TARGET_ADDR_FMT.
Referenced by cortex_a_init_arch_info().
◆ cortex_a_remove_breakpoint()
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Definition at line 1683 of file cortex_a.c.
References BKPT_HARD, cortex_a_common::brp_num_available, cortex_a_unset_breakpoint(), ERROR_OK, ERROR_TARGET_NOT_HALTED, breakpoint::is_set, LOG_WARNING, target::state, TARGET_HALTED, target_to_cortex_a(), and breakpoint::type.
◆ cortex_a_remove_watchpoint()
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Remove a watchpoint from an Cortex-A target.
The watchpoint will be unset and the used watchpoint unit will be reopened.
- Parameters
-
target Pointer to the target to remove a watchpoint from watchpoint Pointer to the watchpoint to be removed
- Returns
- Result of trying to unset the watchpoint
Definition at line 1887 of file cortex_a.c.
References cortex_a_unset_watchpoint(), ERROR_OK, watchpoint::is_set, target_to_cortex_a(), and cortex_a_common::wrp_num_available.
◆ cortex_a_restore_context()
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Definition at line 1277 of file cortex_a.c.
References arm_dpm_write_dirty_registers(), armv7a_common::dpm, LOG_DEBUG, armv7a_common::pre_restore_context, and target_to_armv7a().
Referenced by cortex_a_internal_restore().
◆ cortex_a_restore_cp15_control_reg()
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Definition at line 90 of file cortex_a.c.
References armv7a_common::arm, cortex_a_common::cp15_control_reg, cortex_a_common::cp15_control_reg_curr, ERROR_OK, arm::mcr, target_to_armv7a(), and target_to_cortex_a().
Referenced by cortex_a_internal_restore().
◆ cortex_a_restore_smp()
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Definition at line 982 of file cortex_a.c.
References cortex_a_internal_restart(), cortex_a_internal_restore(), foreach_smp_target, target::smp_targets, target::state, target_list::target, TARGET_RUNNING, and target_was_examined().
Referenced by cortex_a_resume().
◆ cortex_a_resume()
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Definition at line 1001 of file cortex_a.c.
References gdb_service::core, cortex_a_internal_restart(), cortex_a_internal_restore(), cortex_a_restore_smp(), ERROR_OK, target::gdb_service, LOG_DEBUG, NULL, target::smp, target::state, gdb_service::target, TARGET_ADDR_FMT, target_call_event_callbacks(), TARGET_DEBUG_RUNNING, TARGET_EVENT_DEBUG_RESUMED, TARGET_EVENT_RESUMED, and TARGET_RUNNING.
Referenced by cortex_a_step().
◆ cortex_a_set_breakpoint()
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Definition at line 1294 of file cortex_a.c.
References breakpoint::address, ARMV5_BKPT, ARMV5_T_BKPT, armv7a_mmu_common::armv7a_cache, armv7a_cache_flush_virt(), cortex_a_common::armv7a_common, armv7a_l1_d_cache_inval_virt(), armv7a_l1_i_cache_inval_virt(), armv7a_common::armv7a_mmu, armv7a_cache_common::auto_cache_enabled, BKPT_HARD, BKPT_SOFT, breakpoint_hw_set(), cortex_a_common::brp_list, cortex_a_common::brp_num, cortex_a_brp::brpn, buf_set_u32(), cortex_a_brp::control, cortex_a_dap_write_memap_register_u32(), CPUDBG_BCR_BASE, CPUDBG_BVR_BASE, armv7a_common::debug_base, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, breakpoint::is_set, breakpoint::length, LOG_DEBUG, LOG_ERROR, LOG_WARNING, breakpoint::orig_instr, target_read_memory(), target_to_cortex_a(), target_write_memory(), breakpoint::type, cortex_a_brp::used, and cortex_a_brp::value.
Referenced by cortex_a_add_breakpoint(), and cortex_a_step().
◆ cortex_a_set_context_breakpoint()
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Definition at line 1388 of file cortex_a.c.
References cortex_a_common::armv7a_common, breakpoint::asid, breakpoint_hw_set(), BRP_CONTEXT, cortex_a_common::brp_list, cortex_a_common::brp_num, cortex_a_brp::brpn, cortex_a_brp::control, cortex_a_dap_write_memap_register_u32(), CPUDBG_BCR_BASE, CPUDBG_BVR_BASE, armv7a_common::debug_base, ERROR_FAIL, ERROR_OK, breakpoint::is_set, LOG_DEBUG, LOG_ERROR, LOG_WARNING, target_to_cortex_a(), type, cortex_a_brp::used, and cortex_a_brp::value.
Referenced by cortex_a_add_context_breakpoint().
◆ cortex_a_set_dcc_mode()
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Definition at line 1976 of file cortex_a.c.
References CPUDBG_DSCR, armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_EXT_DCC_MASK, ERROR_OK, mem_ap_write_atomic_u32(), mode, and target_to_armv7a().
Referenced by cortex_a_read_cpu_memory(), cortex_a_read_cpu_memory_fast(), cortex_a_read_cpu_memory_slow(), cortex_a_write_cpu_memory(), cortex_a_write_cpu_memory_fast(), and cortex_a_write_cpu_memory_slow().
◆ cortex_a_set_dscr_bits()
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Definition at line 1162 of file cortex_a.c.
References CPUDBG_DSCR, armv7a_common::debug_ap, armv7a_common::debug_base, ERROR_OK, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), and target_to_armv7a().
Referenced by cortex_a_step().
◆ cortex_a_set_hybrid_breakpoint()
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Definition at line 1437 of file cortex_a.c.
References breakpoint::address, cortex_a_common::armv7a_common, breakpoint::asid, breakpoint_hw_set(), BRP_CONTEXT, cortex_a_common::brp_list, BRP_NORMAL, cortex_a_common::brp_num, cortex_a_brp::brpn, cortex_a_brp::control, cortex_a_dap_write_memap_register_u32(), CPUDBG_BCR_BASE, CPUDBG_BVR_BASE, armv7a_common::debug_base, ERROR_FAIL, ERROR_OK, breakpoint::is_set, breakpoint::linked_brp, LOG_DEBUG, LOG_ERROR, LOG_WARNING, target_to_cortex_a(), type, cortex_a_brp::used, and cortex_a_brp::value.
Referenced by cortex_a_add_hybrid_breakpoint().
◆ cortex_a_set_watchpoint()
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Sets a watchpoint for an Cortex-A target in one of the watchpoint units.
It is considered a bug to call this function when there are no available watchpoint units.
- Parameters
-
target Pointer to an Cortex-A target to set a watchpoint on watchpoint Pointer to the watchpoint to be set
- Returns
- Error status if watchpoint set fails or the result of executing the JTAG queue
Definition at line 1715 of file cortex_a.c.
References watchpoint::address, cortex_a_common::armv7a_common, BIT, cortex_a_wrp::control, cortex_a_dap_write_memap_register_u32(), CPUDBG_WCR_BASE, CPUDBG_WVR_BASE, armv7a_common::debug_base, ERROR_FAIL, ERROR_OK, ilog2(), watchpoint::is_set, watchpoint::length, LOG_DEBUG, LOG_ERROR, LOG_WARNING, target_to_cortex_a(), cortex_a_wrp::used, cortex_a_wrp::value, watchpoint_set(), cortex_a_common::wrp_list, cortex_a_common::wrp_num, and cortex_a_wrp::wrpn.
Referenced by cortex_a_add_watchpoint().
◆ cortex_a_step()
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Definition at line 1185 of file cortex_a.c.
References breakpoint::address, armv7a_common::arm, ARM_STATE_THUMB, breakpoint::asid, BKPT_HARD, breakpoint_find(), buf_get_u32(), buf_set_u32(), arm::core_state, CORTEX_A_ISRMASK_ON, cortex_a_poll(), cortex_a_resume(), cortex_a_set_breakpoint(), cortex_a_set_dscr_bits(), cortex_a_unset_breakpoint(), DBG_REASON_BREAKPOINT, DBG_REASON_SINGLESTEP, target::debug_reason, DSCR_INT_DIS, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, breakpoint::is_set, cortex_a_common::isrmasking_mode, breakpoint::length, LOG_DEBUG, LOG_ERROR, LOG_TARGET_ERROR, NULL, arm::pc, target::state, TARGET_HALTED, target_to_armv7a(), target_to_cortex_a(), timeval_ms(), breakpoint::type, and reg::value.
◆ cortex_a_target_create()
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Definition at line 3153 of file cortex_a.c.
References armv7a_common::arm, ARM_VFP_V3, arm::arm_vfp_version, cortex_a_common::armv7a_common, cortex_a_common::common_magic, CORTEX_A_COMMON_MAGIC, cortex_a_init_arch_info(), adiv5_private_config::dap, ERROR_FAIL, armv7a_common::is_armv7r, LOG_ERROR, and target::private_config.
◆ cortex_a_unset_breakpoint()
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Definition at line 1518 of file cortex_a.c.
References breakpoint::address, armv7a_mmu_common::armv7a_cache, armv7a_cache_flush_virt(), cortex_a_common::armv7a_common, armv7a_l1_d_cache_inval_virt(), armv7a_l1_i_cache_inval_virt(), armv7a_common::armv7a_mmu, breakpoint::asid, armv7a_cache_common::auto_cache_enabled, BKPT_HARD, cortex_a_common::brp_list, cortex_a_common::brp_num, cortex_a_brp::brpn, cortex_a_brp::control, cortex_a_dap_write_memap_register_u32(), CPUDBG_BCR_BASE, CPUDBG_BVR_BASE, armv7a_common::debug_base, ERROR_OK, breakpoint::is_set, breakpoint::length, breakpoint::linked_brp, LOG_DEBUG, LOG_WARNING, breakpoint::number, breakpoint::orig_instr, target_to_cortex_a(), target_write_memory(), breakpoint::type, cortex_a_brp::used, and cortex_a_brp::value.
Referenced by cortex_a_remove_breakpoint(), and cortex_a_step().
◆ cortex_a_unset_watchpoint()
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Unset an existing watchpoint and clear the used watchpoint unit.
- Parameters
-
target Pointer to the target to have the watchpoint removed watchpoint Pointer to the watchpoint to be removed
- Returns
- Error status while trying to unset the watchpoint or the result of executing the JTAG queue
Definition at line 1817 of file cortex_a.c.
References cortex_a_common::armv7a_common, cortex_a_wrp::control, cortex_a_dap_write_memap_register_u32(), CPUDBG_WCR_BASE, CPUDBG_WVR_BASE, armv7a_common::debug_base, ERROR_OK, watchpoint::is_set, LOG_DEBUG, LOG_WARNING, watchpoint::number, target_to_cortex_a(), cortex_a_wrp::used, cortex_a_wrp::value, cortex_a_common::wrp_list, cortex_a_common::wrp_num, and cortex_a_wrp::wrpn.
Referenced by cortex_a_remove_watchpoint().
◆ cortex_a_virt2phys()
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Definition at line 3242 of file cortex_a.c.
References armv7a_mmu_translate_va_pa(), cortex_a_mmu(), cortex_a_mmu_modify(), and ERROR_OK.
◆ cortex_a_wait_dscr_bits()
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Definition at line 1998 of file cortex_a.c.
References CPUDBG_DSCR, armv7a_common::debug_ap, armv7a_common::debug_base, ERROR_FAIL, ERROR_OK, LOG_ERROR, mask, mem_ap_read_atomic_u32(), target_to_armv7a(), and timeval_ms().
Referenced by cortex_a_halt(), cortex_a_internal_restart(), cortex_a_read_copro(), cortex_a_read_cpu_memory_fast(), cortex_a_read_cpu_memory_slow(), cortex_a_read_dcc(), cortex_a_wait_instrcmpl(), cortex_a_write_copro(), cortex_a_write_cpu_memory(), and cortex_a_write_cpu_memory_slow().
◆ cortex_a_wait_instrcmpl()
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Definition at line 255 of file cortex_a.c.
References cortex_a_wait_dscr_bits(), CPUDBG_DSCR, armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_INSTR_COMP, ERROR_OK, LOG_ERROR, mem_ap_read_atomic_u32(), and target_to_armv7a().
Referenced by cortex_a_dpm_prepare(), cortex_a_exec_opcode(), cortex_a_read_cpu_memory(), cortex_a_read_cpu_memory_fast(), and cortex_a_write_cpu_memory().
◆ cortex_a_write_buffer()
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Definition at line 2837 of file cortex_a.c.
References buffer, count, ERROR_OK, size, and target_write_memory().
◆ cortex_a_write_copro()
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Definition at line 2081 of file cortex_a.c.
References ARMV4_5_MRC, cortex_a_exec_opcode(), cortex_a_wait_dscr_bits(), CPUDBG_DTRRX, armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_DTRRX_FULL_LATCHED, ERROR_OK, mem_ap_write_atomic_u32(), and target_to_armv7a().
Referenced by cortex_a_write_dfar_dfsr().
◆ cortex_a_write_cpu_memory()
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Definition at line 2262 of file cortex_a.c.
References armv7a_common::arm, arm_reg_current(), ARMV4_5_MRC, buffer, cortex_a_dfsr_to_error_code(), cortex_a_exec_opcode(), cortex_a_read_dfar_dfsr(), cortex_a_set_dcc_mode(), cortex_a_wait_dscr_bits(), cortex_a_wait_instrcmpl(), cortex_a_write_cpu_memory_fast(), cortex_a_write_cpu_memory_slow(), cortex_a_write_dfar_dfsr(), count, CPUDBG_DRCR, CPUDBG_DSCR, CPUDBG_DTRRX, CPUDBG_DTRTX, armv7a_common::debug_ap, armv7a_common::debug_base, reg::dirty, DRCR_CLEAR_EXCEPTIONS, DSCR_DTRRX_FULL_LATCHED, DSCR_DTRTX_FULL_LATCHED, DSCR_EXT_DCC_NON_BLOCKING, DSCR_STICKY_ABORT_IMPRECISE, DSCR_STICKY_ABORT_PRECISE, dummy, ERROR_OK, ERROR_TARGET_DATA_ABORT, ERROR_TARGET_NOT_HALTED, LOG_DEBUG, LOG_ERROR, LOG_TARGET_ERROR, mem_ap_read_atomic_u32(), mem_ap_write_atomic_u32(), size, target::state, TARGET_HALTED, and target_to_armv7a().
Referenced by cortex_a_write_memory(), and cortex_a_write_phys_memory().
◆ cortex_a_write_cpu_memory_fast()
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Definition at line 2233 of file cortex_a.c.
References ARMV4_5_STC, buffer, cortex_a_set_dcc_mode(), count, CPUDBG_DTRRX, CPUDBG_ITR, armv7a_common::debug_ap, armv7a_common::debug_base, DSCR_EXT_DCC_FAST_MODE, ERROR_OK, mem_ap_write_atomic_u32(), mem_ap_write_buf_noincr(), and target_to_armv7a().
Referenced by cortex_a_write_cpu_memory().
◆ cortex_a_write_cpu_memory_slow()
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Definition at line 2157 of file cortex_a.c.
References armv7a_common::arm, arm_reg_current(), ARMV4_5_MRC, ARMV4_5_STRB_IP, ARMV4_5_STRH_IP, ARMV4_5_STRW_IP, buffer, cortex_a_exec_opcode(), cortex_a_set_dcc_mode(), cortex_a_wait_dscr_bits(), count, CPUDBG_DTRRX, armv7a_common::debug_ap, armv7a_common::debug_base, reg::dirty, DSCR_DTRRX_FULL_LATCHED, DSCR_EXT_DCC_NON_BLOCKING, DSCR_STICKY_ABORT_IMPRECISE, DSCR_STICKY_ABORT_PRECISE, ERROR_OK, mem_ap_write_atomic_u32(), size, target_buffer_get_u16(), target_buffer_get_u32(), and target_to_armv7a().
Referenced by cortex_a_write_cpu_memory().
◆ cortex_a_write_dcc()
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Definition at line 346 of file cortex_a.c.
References cortex_a_common::armv7a_common, CPUDBG_DTRRX, armv7a_common::debug_ap, armv7a_common::debug_base, LOG_DEBUG, and mem_ap_write_u32().
Referenced by cortex_a_instr_write_data_dcc(), and cortex_a_instr_write_data_rt_dcc().
◆ cortex_a_write_dfar_dfsr()
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Definition at line 2114 of file cortex_a.c.
References ARMV4_5_MCR, cortex_a_write_copro(), and ERROR_OK.
Referenced by cortex_a_read_cpu_memory(), and cortex_a_write_cpu_memory().
◆ cortex_a_write_memory()
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Definition at line 2785 of file cortex_a.c.
References armv7a_cache_auto_flush_on_write(), buffer, cortex_a_post_memaccess(), cortex_a_prep_memaccess(), cortex_a_write_cpu_memory(), count, LOG_DEBUG, size, and TARGET_ADDR_FMT.
◆ cortex_a_write_phys_memory()
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Definition at line 2765 of file cortex_a.c.
References buffer, cortex_a_post_memaccess(), cortex_a_prep_memaccess(), cortex_a_write_cpu_memory(), count, ERROR_COMMAND_SYNTAX_ERROR, LOG_DEBUG, size, and TARGET_ADDR_FMT.
◆ cortex_r4_target_create()
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Definition at line 3175 of file cortex_a.c.
References adiv5_verify_config(), cortex_a_common::armv7a_common, cortex_a_common::common_magic, CORTEX_A_COMMON_MAGIC, cortex_a_init_arch_info(), adiv5_private_config::dap, ERROR_FAIL, ERROR_OK, armv7a_common::is_armv7r, LOG_ERROR, and target::private_config.
◆ dpm_to_a()
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Definition at line 341 of file cortex_a.c.
References container_of, and armv7a_common::dpm.
Referenced by cortex_a_bpwp_disable(), cortex_a_bpwp_enable(), cortex_a_dpm_prepare(), cortex_a_instr_read_data_dcc(), cortex_a_instr_read_data_r0(), cortex_a_instr_read_data_rt_dcc(), cortex_a_instr_write_data_dcc(), cortex_a_instr_write_data_r0(), cortex_a_instr_write_data_r0_r1(), and cortex_a_instr_write_data_rt_dcc().
◆ get_cortex_a()
Definition at line 676 of file cortex_a.c.
References target::coreid, foreach_smp_target, target::smp_targets, target::state, target, target_list::target, and TARGET_HALTED.
Referenced by cortex_a_poll().
◆ ilog2()
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Definition at line 78 of file cortex_a.c.
Referenced by cortex_a_set_watchpoint().
◆ update_halt_gdb()
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Definition at line 703 of file cortex_a.c.
References gdb_service::core, target::coreid, cortex_a_halt_smp(), cortex_a_poll(), foreach_smp_target, target::gdb_service, NULL, target::smp, target::smp_targets, target::state, target, gdb_service::target, target_list::target, TARGET_HALTED, and target_was_examined().
Referenced by cortex_a_poll().
Variable Documentation
◆ cortex_a_command_handlers
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Definition at line 3317 of file cortex_a.c.
◆ cortex_a_exec_command_handlers
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Definition at line 3317 of file cortex_a.c.
◆ cortex_r4_command_handlers
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Definition at line 3317 of file cortex_a.c.
◆ cortex_r4_exec_command_handlers
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Definition at line 3317 of file cortex_a.c.
◆ cortexa_target
| struct target_type cortexa_target |
Definition at line 3317 of file cortex_a.c.
◆ cortexr4_target
| struct target_type cortexr4_target |
Definition at line 3317 of file cortex_a.c.
