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fm4.c
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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 /*
4  * Spansion FM4 flash
5  *
6  * Copyright (c) 2015 Andreas Färber
7  *
8  * Based on S6E2DH_MN709-00013 for S6E2DH/DF/D5/D3 series
9  * Based on S6E2CC_MN709-00007 for S6E2CC/C5/C4/C3/C2/C1 series
10  * Based on MB9B560R_MN709-00005 for MB9BFx66/x67/x68 series
11  * Based on MB9B560L_MN709-00006 for MB9BFx64/x65/x66 series
12  */
13 
14 #ifdef HAVE_CONFIG_H
15 #include "config.h"
16 #endif
17 
18 #include "imp.h"
19 #include <helper/binarybuffer.h>
20 #include <target/algorithm.h>
21 #include <target/armv7m.h>
22 
23 #define FLASH_BASE 0x40000000
24 #define FASZR (FLASH_BASE + 0x000)
25 #define DFCTRLR (FLASH_BASE + 0x030)
26 #define DFCTRLR_DFE (1UL << 0)
27 
28 #define WDG_BASE 0x40011000
29 #define WDG_CTL (WDG_BASE + 0x008)
30 #define WDG_LCK (WDG_BASE + 0xC00)
31 
38 
42 
44 };
45 
47  enum fm4_variant variant;
48  int macro_nr;
49  bool probed;
50 };
51 
53 {
54  int retval;
55 
56  retval = target_write_u32(target, WDG_LCK, 0x1ACCE551);
57  if (retval != ERROR_OK)
58  return retval;
59 
60  retval = target_write_u32(target, WDG_LCK, 0xE5331AAE);
61  if (retval != ERROR_OK)
62  return retval;
63 
64  retval = target_write_u32(target, WDG_CTL, 0);
65  if (retval != ERROR_OK)
66  return retval;
67 
68  return ERROR_OK;
69 }
70 
72 {
73  uint32_t u32_value;
74  int retval;
75 
76  /* FASZR ASZ = CPU programming mode */
77  retval = target_write_u32(target, FASZR, 0x00000001);
78  if (retval != ERROR_OK)
79  return retval;
80  retval = target_read_u32(target, FASZR, &u32_value);
81  if (retval != ERROR_OK)
82  return retval;
83 
84  return ERROR_OK;
85 }
86 
88 {
89  uint32_t u32_value;
90  int retval;
91 
92  /* FASZR ASZ = CPU ROM mode */
93  retval = target_write_u32(target, FASZR, 0x00000002);
94  if (retval != ERROR_OK)
95  return retval;
96  retval = target_read_u32(target, FASZR, &u32_value);
97  if (retval != ERROR_OK)
98  return retval;
99 
100  return ERROR_OK;
101 }
102 
103 static int fm4_flash_erase(struct flash_bank *bank, unsigned int first,
104  unsigned int last)
105 {
106  struct target *target = bank->target;
107  struct working_area *workarea;
108  struct reg_param reg_params[4];
109  struct armv7m_algorithm armv7m_algo;
110  unsigned i;
111  int retval;
112  const uint8_t erase_sector_code[] = {
113 #include "../../../contrib/loaders/flash/fm4/erase.inc"
114  };
115 
116  if (target->state != TARGET_HALTED) {
117  LOG_WARNING("Cannot communicate... target not halted.");
119  }
120 
121  LOG_DEBUG("Spansion FM4 erase sectors %u to %u", first, last);
122 
124  if (retval != ERROR_OK)
125  return retval;
126 
128  if (retval != ERROR_OK)
129  return retval;
130 
131  retval = target_alloc_working_area(target, sizeof(erase_sector_code),
132  &workarea);
133  if (retval != ERROR_OK) {
134  LOG_ERROR("No working area available.");
136  goto err_alloc_code;
137  }
138  retval = target_write_buffer(target, workarea->address,
139  sizeof(erase_sector_code), erase_sector_code);
140  if (retval != ERROR_OK)
141  goto err_write_code;
142 
143  armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
144  armv7m_algo.core_mode = ARM_MODE_THREAD;
145 
146  init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
147  init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
148  init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
149  init_reg_param(&reg_params[3], "r3", 32, PARAM_IN);
150 
151  for (unsigned int sector = first; sector <= last; sector++) {
152  uint32_t addr = bank->base + bank->sectors[sector].offset;
153  uint32_t result;
154 
155  buf_set_u32(reg_params[0].value, 0, 32, (addr & ~0xffff) | 0xAA8);
156  buf_set_u32(reg_params[1].value, 0, 32, (addr & ~0xffff) | 0x554);
157  buf_set_u32(reg_params[2].value, 0, 32, addr);
158 
159  retval = target_run_algorithm(target,
160  0, NULL,
161  ARRAY_SIZE(reg_params), reg_params,
162  workarea->address, 0,
163  1000, &armv7m_algo);
164  if (retval != ERROR_OK) {
165  LOG_ERROR("Error executing flash sector erase "
166  "programming algorithm");
168  goto err_run;
169  }
170 
171  result = buf_get_u32(reg_params[3].value, 0, 32);
172  if (result == 2) {
173  LOG_ERROR("Timeout error from flash sector erase programming algorithm");
175  goto err_run_ret;
176  } else if (result != 0) {
177  LOG_ERROR("Unexpected error %" PRIu32 " from flash sector erase programming algorithm", result);
179  goto err_run_ret;
180  } else
181  retval = ERROR_OK;
182  }
183 
184 err_run_ret:
185 err_run:
186  for (i = 0; i < ARRAY_SIZE(reg_params); i++)
187  destroy_reg_param(&reg_params[i]);
188 
189 err_write_code:
190  target_free_working_area(target, workarea);
191 
192 err_alloc_code:
193  if (retval != ERROR_OK)
195  else
197 
198  return retval;
199 }
200 
201 static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
202  uint32_t offset, uint32_t byte_count)
203 {
204  struct target *target = bank->target;
205  struct working_area *code_workarea, *data_workarea;
206  struct reg_param reg_params[6];
207  struct armv7m_algorithm armv7m_algo;
208  uint32_t halfword_count = DIV_ROUND_UP(byte_count, 2);
209  uint32_t result;
210  unsigned i;
211  int retval, retval2 = ERROR_OK;
212  const uint8_t write_block_code[] = {
213 #include "../../../contrib/loaders/flash/fm4/write.inc"
214  };
215 
216  LOG_DEBUG("Spansion FM4 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)",
217  offset, byte_count);
218 
219  if (offset & 0x1) {
220  LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment",
221  offset);
223  }
224  if (byte_count & 0x1) {
225  LOG_WARNING("length %" PRIu32 " is not 2-byte aligned, rounding up",
226  byte_count);
227  }
228 
229  if (target->state != TARGET_HALTED) {
230  LOG_WARNING("Cannot communicate... target not halted.");
232  }
233 
235  if (retval != ERROR_OK)
236  return retval;
237 
238  retval = target_alloc_working_area(target, sizeof(write_block_code),
239  &code_workarea);
240  if (retval != ERROR_OK) {
241  LOG_ERROR("No working area available for write code.");
243  }
244  retval = target_write_buffer(target, code_workarea->address,
245  sizeof(write_block_code), write_block_code);
246  if (retval != ERROR_OK)
247  goto err_write_code;
248 
250  MIN(halfword_count * 2, target_get_working_area_avail(target)),
251  &data_workarea);
252  if (retval != ERROR_OK) {
253  LOG_ERROR("No working area available for write data.");
255  goto err_alloc_data;
256  }
257 
258  armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
259  armv7m_algo.core_mode = ARM_MODE_THREAD;
260 
261  init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
262  init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
263  init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
264  init_reg_param(&reg_params[3], "r3", 32, PARAM_OUT);
265  init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT);
266  init_reg_param(&reg_params[5], "r5", 32, PARAM_IN);
267 
269  if (retval != ERROR_OK)
270  goto err_flash_mode;
271 
272  while (byte_count > 0) {
273  uint32_t halfwords = MIN(halfword_count, data_workarea->size / 2);
274  uint32_t addr = bank->base + offset;
275 
276  LOG_DEBUG("copying %" PRIu32 " bytes to SRAM " TARGET_ADDR_FMT,
277  MIN(halfwords * 2, byte_count), data_workarea->address);
278 
279  retval = target_write_buffer(target, data_workarea->address,
280  MIN(halfwords * 2, byte_count), buffer);
281  if (retval != ERROR_OK) {
282  LOG_ERROR("Error writing data buffer");
284  goto err_write_data;
285  }
286 
287  LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRIu32 "x)",
288  addr, addr + halfwords * 2 - 1, halfwords);
289 
290  buf_set_u32(reg_params[0].value, 0, 32, (addr & ~0xffff) | 0xAA8);
291  buf_set_u32(reg_params[1].value, 0, 32, (addr & ~0xffff) | 0x554);
292  buf_set_u32(reg_params[2].value, 0, 32, addr);
293  buf_set_u32(reg_params[3].value, 0, 32, data_workarea->address);
294  buf_set_u32(reg_params[4].value, 0, 32, halfwords);
295 
296  retval = target_run_algorithm(target,
297  0, NULL,
298  ARRAY_SIZE(reg_params), reg_params,
299  code_workarea->address, 0,
300  5 * 60 * 1000, &armv7m_algo);
301  if (retval != ERROR_OK) {
302  LOG_ERROR("Error executing flash sector erase "
303  "programming algorithm");
305  goto err_run;
306  }
307 
308  result = buf_get_u32(reg_params[5].value, 0, 32);
309  if (result == 2) {
310  LOG_ERROR("Timeout error from flash write "
311  "programming algorithm");
313  goto err_run_ret;
314  } else if (result != 0) {
315  LOG_ERROR("Unexpected error %" PRIu32 " from flash write "
316  "programming algorithm", result);
318  goto err_run_ret;
319  } else
320  retval = ERROR_OK;
321 
322  halfword_count -= halfwords;
323  offset += halfwords * 2;
324  buffer += halfwords * 2;
325  byte_count -= MIN(halfwords * 2, byte_count);
326  }
327 
328 err_run_ret:
329 err_run:
330 err_write_data:
332 
333 err_flash_mode:
334  for (i = 0; i < ARRAY_SIZE(reg_params); i++)
335  destroy_reg_param(&reg_params[i]);
336 
337  target_free_working_area(target, data_workarea);
338 err_alloc_data:
339 err_write_code:
340  target_free_working_area(target, code_workarea);
341 
342  if (retval != ERROR_OK)
343  return retval;
344  return retval2;
345 }
346 
347 static int mb9bf_probe(struct flash_bank *bank)
348 {
349  struct fm4_flash_bank *fm4_bank = bank->driver_priv;
350  uint32_t flash_addr = bank->base;
351 
352  switch (fm4_bank->variant) {
353  case MB9BFX64:
354  bank->num_sectors = 8;
355  break;
356  case MB9BFX65:
357  bank->num_sectors = 10;
358  break;
359  case MB9BFX66:
360  bank->num_sectors = 12;
361  break;
362  case MB9BFX67:
363  bank->num_sectors = 16;
364  break;
365  case MB9BFX68:
366  bank->num_sectors = 20;
367  break;
368  default:
370  }
371 
372  LOG_DEBUG("%u sectors", bank->num_sectors);
373  bank->sectors = calloc(bank->num_sectors,
374  sizeof(struct flash_sector));
375  for (unsigned int i = 0; i < bank->num_sectors; i++) {
376  if (i < 4)
377  bank->sectors[i].size = 8 * 1024;
378  else if (i == 4)
379  bank->sectors[i].size = 32 * 1024;
380  else
381  bank->sectors[i].size = 64 * 1024;
382  bank->sectors[i].offset = flash_addr - bank->base;
383  bank->sectors[i].is_erased = -1;
384  bank->sectors[i].is_protected = -1;
385 
386  bank->size += bank->sectors[i].size;
387  flash_addr += bank->sectors[i].size;
388  }
389 
390  return ERROR_OK;
391 }
392 
393 static void s6e2cc_init_sector(struct flash_sector *sector, int sa)
394 {
395  if (sa < 8)
396  sector->size = 8 * 1024;
397  else if (sa == 8)
398  sector->size = 32 * 1024;
399  else
400  sector->size = 64 * 1024;
401 
402  sector->is_erased = -1;
403  sector->is_protected = -1;
404 }
405 
406 static int s6e2cc_probe(struct flash_bank *bank)
407 {
408  struct target *target = bank->target;
409  struct fm4_flash_bank *fm4_bank = bank->driver_priv;
410  uint32_t u32_value;
411  uint32_t flash_addr = bank->base;
412  int retval;
413  unsigned int i, num_extra_sectors, num_sectors;
414 
415  retval = target_read_u32(target, DFCTRLR, &u32_value);
416  if (retval != ERROR_OK)
417  return retval;
418  if (u32_value & DFCTRLR_DFE) {
419  LOG_WARNING("Dual Flash mode is not implemented.");
421  }
422 
423  switch (fm4_bank->variant) {
424  case S6E2CX8:
425  num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 0;
426  break;
427  case S6E2CX9:
428  num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 12;
429  break;
430  case S6E2CXA:
431  num_sectors = 20;
432  break;
433  default:
435  }
436  num_extra_sectors = (fm4_bank->macro_nr == 0) ? 1 : 4;
437  bank->num_sectors = num_sectors + num_extra_sectors;
438 
439  LOG_DEBUG("%u sectors", bank->num_sectors);
440  bank->sectors = calloc(bank->num_sectors,
441  sizeof(struct flash_sector));
442  for (i = 0; i < num_sectors; i++) {
443  int sa = 4 + i;
444  bank->sectors[i].offset = flash_addr - bank->base;
445  s6e2cc_init_sector(&bank->sectors[i], sa);
446 
447  bank->size += bank->sectors[i].size;
448  flash_addr += bank->sectors[i].size;
449  }
450 
451  flash_addr = (fm4_bank->macro_nr == 0) ? 0x00406000 : 0x00408000;
452  for (; i < bank->num_sectors; i++) {
453  int sa = 4 - num_extra_sectors + (i - num_sectors);
454  bank->sectors[i].offset = flash_addr - bank->base;
455  s6e2cc_init_sector(&bank->sectors[i], sa);
456 
457  /*
458  * Don't increase bank->size for these sectors
459  * to avoid an overlap between Flash Macros #0 and #1.
460  */
461  flash_addr += bank->sectors[i].size;
462  }
463 
464  return ERROR_OK;
465 }
466 
467 static int s6e2dh_probe(struct flash_bank *bank)
468 {
469  uint32_t flash_addr = bank->base;
470 
471  bank->num_sectors = 10;
472  bank->sectors = calloc(bank->num_sectors,
473  sizeof(struct flash_sector));
474  for (unsigned int i = 0; i < bank->num_sectors; i++) {
475  if (i < 4)
476  bank->sectors[i].size = 8 * 1024;
477  else if (i == 4)
478  bank->sectors[i].size = 32 * 1024;
479  else
480  bank->sectors[i].size = 64 * 1024;
481  bank->sectors[i].offset = flash_addr - bank->base;
482  bank->sectors[i].is_erased = -1;
483  bank->sectors[i].is_protected = -1;
484 
485  bank->size += bank->sectors[i].size;
486  flash_addr += bank->sectors[i].size;
487  }
488 
489  return ERROR_OK;
490 }
491 
492 static int fm4_probe(struct flash_bank *bank)
493 {
494  struct fm4_flash_bank *fm4_bank = bank->driver_priv;
495  int retval;
496 
497  if (fm4_bank->probed)
498  return ERROR_OK;
499 
500  if (bank->target->state != TARGET_HALTED) {
501  LOG_WARNING("Cannot communicate... target not halted.");
503  }
504 
505  switch (fm4_bank->variant) {
506  case MB9BFX64:
507  case MB9BFX65:
508  case MB9BFX66:
509  case MB9BFX67:
510  case MB9BFX68:
511  retval = mb9bf_probe(bank);
512  break;
513  case S6E2CX8:
514  case S6E2CX9:
515  case S6E2CXA:
516  retval = s6e2cc_probe(bank);
517  break;
518  case S6E2DX:
519  retval = s6e2dh_probe(bank);
520  break;
521  default:
523  }
524  if (retval != ERROR_OK)
525  return retval;
526 
527  fm4_bank->probed = true;
528 
529  return ERROR_OK;
530 }
531 
532 static int fm4_auto_probe(struct flash_bank *bank)
533 {
534  struct fm4_flash_bank *fm4_bank = bank->driver_priv;
535 
536  if (fm4_bank->probed)
537  return ERROR_OK;
538 
539  return fm4_probe(bank);
540 }
541 
543 {
544  struct fm4_flash_bank *fm4_bank = bank->driver_priv;
545  const char *name;
546 
547  if (bank->target->state != TARGET_HALTED) {
548  LOG_WARNING("Cannot communicate... target not halted.");
550  }
551 
552  switch (fm4_bank->variant) {
553  case MB9BFX64:
554  name = "MB9BFx64";
555  break;
556  case MB9BFX65:
557  name = "MB9BFx65";
558  break;
559  case MB9BFX66:
560  name = "MB9BFx66";
561  break;
562  case MB9BFX67:
563  name = "MB9BFx67";
564  break;
565  case MB9BFX68:
566  name = "MB9BFx68";
567  break;
568  case S6E2CX8:
569  name = "S6E2Cx8";
570  break;
571  case S6E2CX9:
572  name = "S6E2Cx9";
573  break;
574  case S6E2CXA:
575  name = "S6E2CxA";
576  break;
577  case S6E2DX:
578  name = "S6E2Dx";
579  break;
580  default:
581  name = "unknown";
582  break;
583  }
584 
585  switch (fm4_bank->variant) {
586  case S6E2CX8:
587  case S6E2CX9:
588  case S6E2CXA:
589  command_print_sameline(cmd, "%s MainFlash Macro #%i", name, fm4_bank->macro_nr);
590  break;
591  default:
592  command_print_sameline(cmd, "%s MainFlash", name);
593  break;
594  }
595 
596  return ERROR_OK;
597 }
598 
599 static bool fm4_name_match(const char *s, const char *pattern)
600 {
601  int i = 0;
602 
603  while (s[i]) {
604  /* If the match string is shorter, ignore excess */
605  if (!pattern[i])
606  return true;
607  /* Use x as wildcard */
608  if (pattern[i] != 'x' && tolower(s[i]) != tolower(pattern[i]))
609  return false;
610  i++;
611  }
612  return true;
613 }
614 
615 static int mb9bf_bank_setup(struct flash_bank *bank, const char *variant)
616 {
617  struct fm4_flash_bank *fm4_bank = bank->driver_priv;
618 
619  if (fm4_name_match(variant, "MB9BFx64")) {
620  fm4_bank->variant = MB9BFX64;
621  } else if (fm4_name_match(variant, "MB9BFx65")) {
622  fm4_bank->variant = MB9BFX65;
623  } else if (fm4_name_match(variant, "MB9BFx66")) {
624  fm4_bank->variant = MB9BFX66;
625  } else if (fm4_name_match(variant, "MB9BFx67")) {
626  fm4_bank->variant = MB9BFX67;
627  } else if (fm4_name_match(variant, "MB9BFx68")) {
628  fm4_bank->variant = MB9BFX68;
629  } else {
630  LOG_WARNING("MB9BF variant %s not recognized.", variant);
632  }
633 
634  return ERROR_OK;
635 }
636 
637 static int s6e2cc_bank_setup(struct flash_bank *bank, const char *variant)
638 {
639  struct fm4_flash_bank *fm4_bank = bank->driver_priv;
640 
641  if (fm4_name_match(variant, "S6E2Cx8")) {
642  fm4_bank->variant = S6E2CX8;
643  } else if (fm4_name_match(variant, "S6E2Cx9")) {
644  fm4_bank->variant = S6E2CX9;
645  } else if (fm4_name_match(variant, "S6E2CxA")) {
646  fm4_bank->variant = S6E2CXA;
647  } else {
648  LOG_WARNING("S6E2CC variant %s not recognized.", variant);
650  }
651 
652  return ERROR_OK;
653 }
654 
655 FLASH_BANK_COMMAND_HANDLER(fm4_flash_bank_command)
656 {
657  struct fm4_flash_bank *fm4_bank;
658  const char *variant;
659  int ret;
660 
661  if (CMD_ARGC < 7)
663 
664  variant = CMD_ARGV[6];
665 
666  fm4_bank = malloc(sizeof(struct fm4_flash_bank));
667  if (!fm4_bank)
669 
670  fm4_bank->probed = false;
671  fm4_bank->macro_nr = (bank->base == 0x00000000) ? 0 : 1;
672 
673  bank->driver_priv = fm4_bank;
674 
675  if (fm4_name_match(variant, "MB9BF"))
676  ret = mb9bf_bank_setup(bank, variant);
677  else if (fm4_name_match(variant, "S6E2Cx"))
679  else if (fm4_name_match(variant, "S6E2Dx")) {
680  fm4_bank->variant = S6E2DX;
681  ret = ERROR_OK;
682  } else {
683  LOG_WARNING("Family %s not recognized.", variant);
685  }
686  if (ret != ERROR_OK)
687  free(fm4_bank);
688  return ret;
689 }
690 
691 const struct flash_driver fm4_flash = {
692  .name = "fm4",
693  .flash_bank_command = fm4_flash_bank_command,
694  .info = fm4_get_info_command,
695  .probe = fm4_probe,
696  .auto_probe = fm4_auto_probe,
697  .read = default_flash_read,
698  .erase = fm4_flash_erase,
699  .erase_check = default_flash_blank_check,
700  .write = fm4_flash_write,
701  .free_driver_priv = default_flash_free_driver_priv,
702 };
void init_reg_param(struct reg_param *param, char *reg_name, uint32_t size, enum param_direction direction)
Definition: algorithm.c:29
void destroy_reg_param(struct reg_param *param)
Definition: algorithm.c:37
@ PARAM_OUT
Definition: algorithm.h:16
@ PARAM_IN
Definition: algorithm.h:15
@ ARM_MODE_THREAD
Definition: arm.h:86
const char * name
Definition: armv4_5.c:76
#define ARMV7M_COMMON_MAGIC
Definition: armv7m.h:218
Support functions to access arbitrary bits in a byte array.
static uint32_t buf_get_u32(const uint8_t *_buffer, unsigned first, unsigned num)
Retrieves num bits from _buffer, starting at the first bit, returning the bits in a 32-bit word.
Definition: binarybuffer.h:98
static void buf_set_u32(uint8_t *_buffer, unsigned first, unsigned num, uint32_t value)
Sets num bits in _buffer, starting at the first bit, using the bits in value.
Definition: binarybuffer.h:30
void command_print_sameline(struct command_invocation *cmd, const char *format,...)
Definition: command.c:450
#define CMD_ARGV
Use this macro to access the arguments for the command being handled, rather than accessing the varia...
Definition: command.h:155
#define ERROR_COMMAND_SYNTAX_ERROR
Definition: command.h:385
#define CMD_ARGC
Use this macro to access the number of arguments for the command being handled, rather than accessing...
Definition: command.h:150
uint8_t bank
Definition: esirisc.c:135
#define ERROR_FLASH_OPER_UNSUPPORTED
Definition: flash/common.h:36
#define ERROR_FLASH_OPERATION_FAILED
Definition: flash/common.h:30
#define ERROR_FLASH_DST_BREAKS_ALIGNMENT
Definition: flash/common.h:32
int default_flash_blank_check(struct flash_bank *bank)
Provides default erased-bank check handling.
int default_flash_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
Provides default read implementation for flash memory.
void default_flash_free_driver_priv(struct flash_bank *bank)
Deallocates bank->driver_priv.
static int s6e2dh_probe(struct flash_bank *bank)
Definition: fm4.c:467
#define FASZR
Definition: fm4.c:24
static int mb9bf_probe(struct flash_bank *bank)
Definition: fm4.c:347
#define DFCTRLR_DFE
Definition: fm4.c:26
static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t byte_count)
Definition: fm4.c:201
static int fm4_enter_flash_cpu_programming_mode(struct target *target)
Definition: fm4.c:71
static int fm4_probe(struct flash_bank *bank)
Definition: fm4.c:492
static int fm4_enter_flash_cpu_rom_mode(struct target *target)
Definition: fm4.c:87
FLASH_BANK_COMMAND_HANDLER(fm4_flash_bank_command)
Definition: fm4.c:655
static int fm4_disable_hw_watchdog(struct target *target)
Definition: fm4.c:52
#define WDG_CTL
Definition: fm4.c:29
static int mb9bf_bank_setup(struct flash_bank *bank, const char *variant)
Definition: fm4.c:615
static bool fm4_name_match(const char *s, const char *pattern)
Definition: fm4.c:599
#define DFCTRLR
Definition: fm4.c:25
static void s6e2cc_init_sector(struct flash_sector *sector, int sa)
Definition: fm4.c:393
static int fm4_flash_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
Definition: fm4.c:103
static int s6e2cc_bank_setup(struct flash_bank *bank, const char *variant)
Definition: fm4.c:637
const struct flash_driver fm4_flash
Definition: fm4.c:691
fm4_variant
Definition: fm4.c:32
@ MB9BFX64
Definition: fm4.c:33
@ MB9BFX67
Definition: fm4.c:36
@ MB9BFX66
Definition: fm4.c:35
@ S6E2CXA
Definition: fm4.c:41
@ S6E2CX9
Definition: fm4.c:40
@ S6E2DX
Definition: fm4.c:43
@ MB9BFX65
Definition: fm4.c:34
@ S6E2CX8
Definition: fm4.c:39
@ MB9BFX68
Definition: fm4.c:37
#define WDG_LCK
Definition: fm4.c:30
static int fm4_auto_probe(struct flash_bank *bank)
Definition: fm4.c:532
static int fm4_get_info_command(struct flash_bank *bank, struct command_invocation *cmd)
Definition: fm4.c:542
static int s6e2cc_probe(struct flash_bank *bank)
Definition: fm4.c:406
#define LOG_WARNING(expr ...)
Definition: log.h:120
#define LOG_ERROR(expr ...)
Definition: log.h:123
#define LOG_DEBUG(expr ...)
Definition: log.h:109
#define ERROR_OK
Definition: log.h:155
uint32_t addr
Definition: nuttx.c:65
#define MIN(a, b)
Definition: replacements.h:22
unsigned int common_magic
Definition: armv7m.h:293
enum arm_mode core_mode
Definition: armv7m.h:295
When run_command is called, a new instance will be created on the stack, filled with the proper value...
Definition: command.h:76
Provides details of a flash bank, available either on-chip or through a major interface.
Definition: nor/core.h:75
Provides the implementation-independent structure that defines all of the callbacks required by OpenO...
Definition: nor/driver.h:39
const char * name
Gives a human-readable name of this flash driver, This field is used to select and initialize the dri...
Definition: nor/driver.h:44
Describes the geometry and status of a single flash sector within a flash bank.
Definition: nor/core.h:28
int is_erased
Indication of erasure status: 0 = not erased, 1 = erased, other = unknown.
Definition: nor/core.h:42
int is_protected
Indication of protection status: 0 = unprotected/unlocked, 1 = protected/locked, other = unknown.
Definition: nor/core.h:55
uint32_t size
Number of bytes in this flash sector.
Definition: nor/core.h:32
enum fm4_variant variant
Definition: fm4.c:47
bool probed
Definition: fm4.c:49
int macro_nr
Definition: fm4.c:48
Definition: target.h:120
enum target_state state
Definition: target.h:162
uint32_t size
Definition: target.h:91
target_addr_t address
Definition: target.h:90
int target_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
Definition: target.c:2408
uint32_t target_get_working_area_avail(struct target *target)
Definition: target.c:2233
int target_alloc_working_area(struct target *target, uint32_t size, struct working_area **area)
Definition: target.c:2129
int target_write_u32(struct target *target, target_addr_t address, uint32_t value)
Definition: target.c:2707
int target_free_working_area(struct target *target, struct working_area *area)
Free a working area.
Definition: target.c:2187
int target_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, target_addr_t entry_point, target_addr_t exit_point, int timeout_ms, void *arch_info)
Downloads a target-specific native code algorithm to the target, and executes it.
Definition: target.c:846
int target_read_u32(struct target *target, target_addr_t address, uint32_t *value)
Definition: target.c:2616
#define ERROR_TARGET_NOT_HALTED
Definition: target.h:792
@ TARGET_HALTED
Definition: target.h:55
#define ERROR_TARGET_RESOURCE_NOT_AVAILABLE
Definition: target.h:796
#define TARGET_ADDR_FMT
Definition: types.h:342
#define ARRAY_SIZE(x)
Compute the number of elements of a variable length array.
Definition: types.h:57
#define DIV_ROUND_UP(m, n)
Rounds m up to the nearest multiple of n using division.
Definition: types.h:79
#define NULL
Definition: usb.h:16
uint8_t cmd
Definition: vdebug.c:1
uint8_t offset[4]
Definition: vdebug.c:9